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- Timestamp:
- Mar 10, 2015, 3:24:01 PM (10 years ago)
- File:
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- 1 edited
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soft/giet_vm/giet_boot/boot.c (modified) (12 diffs)
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soft/giet_vm/giet_boot/boot.c
r513 r524 1037 1037 xcu = &periph[periph_id]; 1038 1038 1039 if ( xcu->arg < (nprocs * header->irq_per_proc) )1039 if ( xcu->arg0 < (nprocs * header->irq_per_proc) ) 1040 1040 { 1041 1041 _printf("\n[BOOT ERROR] Not enough inputs for XCU[%d,%d]\n", x, y ); … … 1367 1367 void boot_mapping_init() 1368 1368 { 1369 // desactivates IOC interrupt1370 _ioc_init( 0 );1371 1372 1369 // open file "map.bin" 1373 1370 int fd_id = _fat_open( IOC_BOOT_MODE, … … 1425 1422 (header->vspaces > GIET_NB_VSPACE_MAX) ) 1426 1423 { 1424 _printf("\n[BOOT ERROR] Illegal mapping signature: %x\n", header->signature ); 1425 _exit(); 1426 } 1427 1427 1428 1428 #if BOOT_DEBUG_MAPPING … … 1445 1445 } 1446 1446 #endif 1447 _printf("\n[BOOT ERROR] Illegal mapping signature: %x\n", header->signature );1448 _exit();1449 }1450 1447 1451 1448 #if BOOT_DEBUG_MAPPING … … 1740 1737 1741 1738 //////////////////////////////////////////////////////////////////////////////// 1742 // This function intializes the periherals and coprocessors, as specified 1743 // in the mapping_info file. 1739 // This function intializes the external peripherals in cluster_io. 1744 1740 //////////////////////////////////////////////////////////////////////////////// 1745 1741 void boot_peripherals_init() … … 1748 1744 mapping_cluster_t * cluster = _get_cluster_base(header); 1749 1745 mapping_periph_t * periph = _get_periph_base(header); 1750 mapping_vseg_t * vseg = _get_vseg_base(header);1751 mapping_coproc_t * coproc = _get_coproc_base(header);1752 mapping_cp_port_t * cp_port = _get_cp_port_base(header);1753 1746 mapping_irq_t * irq = _get_irq_base(header); 1754 1747 1755 unsigned int cluster_id;1756 1748 unsigned int periph_id; 1757 unsigned int coproc_id;1758 unsigned int cp_port_id;1759 1749 unsigned int channel_id; 1760 1750 1761 // loop on all physical clusters1762 for (cluster_id = 0; cluster_id < X_SIZE*Y_SIZE; cluster_id++)1763 {1764 // computes cluster coordinates1765 unsigned int x = cluster[cluster_id].x;1766 unsigned int y = cluster[cluster_id].y;1767 unsigned int cluster_xy = (x<<Y_WIDTH) + y;1768 1769 1751 #if BOOT_DEBUG_PERI 1770 _printf("\n[BOOT] Peripherals initialisation in cluster[%d,%d]\n", x , y ); 1771 #endif 1772 1773 // loop on peripherals 1774 for (periph_id = cluster[cluster_id].periph_offset; 1775 periph_id < cluster[cluster_id].periph_offset + 1776 cluster[cluster_id].periphs; periph_id++) 1777 { 1778 unsigned int type = periph[periph_id].type; 1779 unsigned int subtype = periph[periph_id].subtype; 1780 unsigned int channels = periph[periph_id].channels; 1781 1782 switch (type) 1783 { 1784 case PERIPH_TYPE_IOC: // vci_block_device component 1752 _printf("\n[BOOT] External peripherals initialisation in cluster[%d,%d]\n", 1753 X_IO , Y_IO ); 1754 #endif 1755 1756 // get pointer on cluster_io 1757 mapping_cluster_t * cluster_io = &cluster[X_IO * Y_SIZE + Y_IO]; 1758 1759 // loop on peripherals 1760 for (periph_id = cluster_io->periph_offset; 1761 periph_id < cluster_io->periph_offset + cluster_io->periphs; 1762 periph_id++) 1763 { 1764 unsigned int type = periph[periph_id].type; 1765 unsigned int subtype = periph[periph_id].subtype; 1766 unsigned int channels = periph[periph_id].channels; 1767 1768 switch (type) 1769 { 1770 case PERIPH_TYPE_IOC: // vci_block_device component 1771 { 1772 if ( subtype == IOC_SUBTYPE_BDV ) 1785 1773 { 1786 if ( subtype == PERIPH_SUBTYPE_BDV ) 1787 { 1788 _bdv_init(); 1789 } 1790 else if ( subtype == PERIPH_SUBTYPE_HBA ) 1791 { 1792 for (channel_id = 0; channel_id < channels; channel_id++) 1793 _hba_init( channel_id ); 1794 } 1795 else if ( subtype == PERIPH_SUBTYPE_SPI ) 1796 { 1797 //TODO 1798 } 1799 break; 1774 _bdv_init(); 1800 1775 } 1801 case PERIPH_TYPE_TTY: // vci_multi_tty component1776 else if ( subtype == IOC_SUBTYPE_HBA ) 1802 1777 { 1803 1778 for (channel_id = 0; channel_id < channels; channel_id++) 1804 { 1805 _tty_init( channel_id ); 1806 } 1807 break; 1779 _hba_init( channel_id ); 1808 1780 } 1809 case PERIPH_TYPE_NIC: // vci_multi_nic component1781 else if ( subtype == IOC_SUBTYPE_SPI ) 1810 1782 { 1811 _nic_global_init( 1, // broadcast accepted 1812 1, // bypass activated 1813 0, // tdm non activated 1814 0 ); // tdm period 1815 break; 1783 //TODO 1816 1784 } 1817 case PERIPH_TYPE_IOB: // vci_io_bridge component 1785 break; 1786 } 1787 case PERIPH_TYPE_TTY: // vci_multi_tty component 1788 { 1789 for (channel_id = 0; channel_id < channels; channel_id++) 1818 1790 { 1819 if (GIET_USE_IOMMU) 1820 { 1821 // TODO 1822 // get the iommu page table physical address 1823 // set IOMMU page table address 1824 // pseg_base[IOB_IOMMU_PTPR] = ptab_pbase; 1825 // activate IOMMU 1826 // pseg_base[IOB_IOMMU_ACTIVE] = 1; 1827 } 1828 break; 1791 _tty_init( channel_id ); 1829 1792 } 1830 case PERIPH_TYPE_PIC: // vci_iopic component 1793 break; 1794 } 1795 case PERIPH_TYPE_NIC: // vci_multi_nic component 1796 { 1797 _nic_global_init( 1, // broadcast accepted 1798 1, // bypass activated 1799 0, // tdm non activated 1800 0 ); // tdm period 1801 break; 1802 } 1803 case PERIPH_TYPE_IOB: // vci_io_bridge component 1804 { 1805 if (GIET_USE_IOMMU) 1831 1806 { 1832 // scan all IRQs defined in mapping for PIC component, 1833 // and initialises addresses for WTI IRQs 1834 for ( channel_id = periph[periph_id].irq_offset ; 1835 channel_id < periph[periph_id].irq_offset + periph[periph_id].irqs ; 1836 channel_id++ ) 1837 { 1838 unsigned int hwi_id = irq[channel_id].srcid; // HWI index in PIC 1839 unsigned int wti_id = irq[channel_id].dest_id; // WTI index in XCU 1840 unsigned int cluster_xy = irq[channel_id].dest_xy; // XCU coordinates 1841 unsigned int vaddr; 1842 1843 _xcu_get_wti_address( wti_id, &vaddr ); 1844 _pic_init( hwi_id, vaddr, cluster_xy ); 1807 // TODO 1808 // get the iommu page table physical address 1809 // set IOMMU page table address 1810 // pseg_base[IOB_IOMMU_PTPR] = ptab_pbase; 1811 // activate IOMMU 1812 // pseg_base[IOB_IOMMU_ACTIVE] = 1; 1813 } 1814 break; 1815 } 1816 case PERIPH_TYPE_PIC: // vci_iopic component 1817 { 1818 // scan all IRQs defined in mapping for PIC component, 1819 // and initialises addresses for WTI IRQs 1820 for ( channel_id = periph[periph_id].irq_offset ; 1821 channel_id < periph[periph_id].irq_offset + 1822 periph[periph_id].irqs ; channel_id++ ) 1823 { 1824 unsigned int hwi_id = irq[channel_id].srcid; // HWI in PIC 1825 unsigned int wti_id = irq[channel_id].dest_id; // WTI in XCU 1826 unsigned int cluster_xy = irq[channel_id].dest_xy; // XCU coordinates 1827 unsigned int vaddr; 1828 1829 _xcu_get_wti_address( wti_id, &vaddr ); 1830 _pic_init( hwi_id, vaddr, cluster_xy ); 1845 1831 1846 1832 #if BOOT_DEBUG_PERI … … 1848 1834 hwi_id , wti_id , cluster_xy >> Y_WIDTH , cluster_xy & ((1<<Y_WIDTH)-1) ); 1849 1835 #endif 1850 }1851 break;1852 1836 } 1853 } // end switch periph type 1854 } // end for periphs 1855 1856 #if BOOT_DEBUG_PERI 1857 _printf("\n[BOOT] Coprocessors initialisation in cluster[%d,%d]\n", x , y ); 1858 #endif 1859 1860 // loop on coprocessors 1861 for ( coproc_id = cluster[cluster_id].coproc_offset; 1862 coproc_id < cluster[cluster_id].coproc_offset + 1863 cluster[cluster_id].coprocs; coproc_id++ ) 1864 { 1865 // loop on the coprocessor ports 1866 for ( cp_port_id = coproc[coproc_id].port_offset; 1867 cp_port_id < coproc[coproc_id].port_offset + coproc[coproc_id].ports; 1868 cp_port_id++ ) 1869 { 1870 // get global index of associted vseg 1871 unsigned int vseg_id = cp_port[cp_port_id].mwmr_vseg_id; 1872 1873 // get MWMR channel base address 1874 page_table_t* ptab = (page_table_t*)_ptabs_vaddr[0][x][y]; 1875 unsigned int vbase = vseg[vseg_id].vbase; 1876 unsigned int ppn; 1877 unsigned int flags; 1878 paddr_t pbase; 1879 1880 _v2p_translate( ptab, 1881 vbase>>12 , 1882 &ppn, 1883 &flags ); 1884 1885 pbase = ((paddr_t)ppn)<<12; 1886 1887 // initialise cp_port 1888 _mwr_hw_init( cluster_xy, 1889 cp_port_id, 1890 cp_port[cp_port_id].direction, 1891 pbase ); 1892 1893 } // end for cp_ports 1894 } // end for coprocs 1895 } // end for clusters 1837 break; 1838 } 1839 } // end switch periph type 1840 } // end loop on peripherals 1896 1841 } // end boot_peripherals_init() 1897 1842 … … 1953 1898 void boot_init() 1954 1899 { 1955 mapping_header_t* header = (mapping_header_t *)SEG_BOOT_MAPPING_BASE;1956 mapping_cluster_t* cluster = _get_cluster_base(header);1957 1900 1958 1901 unsigned int gpid = _get_procid(); … … 1960 1903 unsigned int cy = (gpid >> P_WIDTH) & ((1<<Y_WIDTH)-1); 1961 1904 unsigned int lpid = gpid & ((1 << P_WIDTH) -1); 1962 unsigned int cluster_id = (cx * Y_SIZE) + cy;1963 1905 1964 1906 // Phase ONE : only P[0][0][0] execute it … … 1979 1921 // Load the map.bin file into memory 1980 1922 boot_mapping_init(); 1923 1924 mapping_header_t* header = (mapping_header_t *)SEG_BOOT_MAPPING_BASE; 1925 mapping_cluster_t* cluster = _get_cluster_base(header); 1981 1926 1982 1927 _printf("\n[BOOT] Mapping %s loaded at cycle %d\n", … … 2070 2015 boot_elf_load(); 2071 2016 } 2072 /* 2073 // Each processor P[x][y][0] checks sequencially its local page table 2074 unsigned int seq_x; 2075 unsigned int seq_y; 2076 for ( seq_x = 0 ; seq_x < X_SIZE ; seq_x++ ) 2077 { 2078 for ( seq_y = 0 ; seq_y < Y_SIZE ; seq_y++ ) 2079 { 2080 if ( (cx == seq_x) && (cy == seq_y) ) boot_ptab_check( cx , cy ); 2081 2082 ////////////////////////////////////////////// 2083 _simple_barrier_wait( &_barrier_all_clusters ); 2084 ////////////////////////////////////////////// 2085 } 2086 } 2087 */ 2017 2088 2018 ////////////////////////////////////////////// 2089 2019 _simple_barrier_wait( &_barrier_all_clusters ); … … 2091 2021 2092 2022 // each processor P[x][y][0] wake up other processors in same cluster 2093 unsigned int cluster_xy = (cx << Y_WIDTH) + cy; 2023 mapping_header_t* header = (mapping_header_t *)SEG_BOOT_MAPPING_BASE; 2024 mapping_cluster_t* cluster = _get_cluster_base(header); 2025 unsigned int cluster_xy = (cx << Y_WIDTH) + cy; 2026 unsigned int cluster_id = (cx * Y_SIZE) + cy; 2094 2027 unsigned int p; 2095 2028 for ( p = 1 ; p < cluster[cluster_id].procs ; p++ )
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