Changeset 802
- Timestamp:
- Mar 14, 2016, 3:32:41 PM (9 years ago)
- Location:
- soft/giet_vm/giet_kernel
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
soft/giet_vm/giet_kernel/exc_handler.c
r798 r802 76 76 "illegal coproc access ", 77 77 "arithmetic overflow " }; 78 /* 79 Modify format to have one single printf and avoid interleaving 'AG) 78 80 79 81 _printf("\n[GIET] Exception for thread %x on processor[%d,%d,%d] at cycle %d\n" … … 100 102 _printf("gp_28 %X\tsp_29 %X\tfp_30 %X\tra_31 %X\n\n", 101 103 regs_table[28], regs_table[29], regs_table[30], regs_table[31]); 102 104 */ 105 _printf("\n[GIET] Exception for thread %x on processor[%d,%d,%d] at cycle %d\n" 106 " type : %s\n" 107 "CR %X\tEPC %X\tSR %X\tBVAR %X\n" 108 "HI %X\tLO %X\n" 109 "zero %X\tat_1 %X\tv0_2 %X\tv1_3 %X\n" 110 "a0_4 %X\ta1_5 %X\ta2_6 %X\ta3_7 %X\n" 111 "t0_8 %X\tt1_9 %X\tt2_10 %X\tt3_11 %X\n" 112 "t4_12 %X\tt5_13 %X\tt6_14 %X\tt7_15 %X\n" 113 "s0_16 %X\ts1_17 %X\ts2_18 %X\ts3_19 %X\n" 114 "s4_20 %X\ts5_21 %X\ts6_22 %X\ts7_23 %X\n" 115 "t8_24 %X\tt9_25 %X\tk0_26 %s\tk1_27 %s\n" 116 "gp_28 %X\tsp_29 %X\tfp_30 %X\tra_31 %X\n", 117 trdid , x , y , p , _get_proctime(), 118 mips32_exc_str[type], 119 regs_table[33] , regs_table[32] , regs_table[34] , regs_table[37], 120 regs_table[36] , regs_table[35] , 121 0 , regs_table[1] , regs_table[2] , regs_table[3] , 122 regs_table[4] , regs_table[5] , regs_table[6] , regs_table[7] , 123 regs_table[8] , regs_table[9] , regs_table[10] , regs_table[11], 124 regs_table[12] , regs_table[13] , regs_table[14] , regs_table[15], 125 regs_table[16] , regs_table[17] , regs_table[18] , regs_table[19], 126 regs_table[20] , regs_table[21] , regs_table[22] , regs_table[23], 127 regs_table[24] , regs_table[25] , "undefined " , "undefined " , 128 regs_table[28] , regs_table[29] , regs_table[30] , regs_table[31] ); 103 129 104 130 // register KILL signal -
soft/giet_vm/giet_kernel/giet.s
r798 r802 43 43 addiu $26, $0, 0x20 44 44 beq $27, $26, do_jump /* jump if syscall */ 45 /* Other exception: saving registers for future display */ 45 46 /* 47 * exception: save registers into stack for future display by exception handler 48 */ 49 46 50 addiu $27, $29, -38*4 47 sw $29, (29*4)($27) 51 sw $29, (29*4)($27) /* save $29 */ 48 52 or $29, $27, $0 49 53 50 54 .set noat 51 sw $1, (1*4)($29) 55 sw $1, (1*4)($29) /* save $1 */ 52 56 .set at 53 sw $2, (2*4)($29) 54 sw $3, (3*4)($29) 55 sw $4, (4*4)($29) 56 sw $5, (5*4)($29) 57 sw $6, (6*4)($29) 58 sw $7, (7*4)($29) 59 sw $8, (8*4)($29) 60 sw $9, (9*4)($29) 61 sw $10, (10*4)($29) 62 sw $11, (11*4)($29) 63 sw $12, (12*4)($29) 64 sw $13, (13*4)($29) 65 sw $14, (14*4)($29) 66 sw $15, (15*4)($29) 67 sw $24, (24*4)($29) 68 sw $25, (25*4)($29) 69 sw $16, (16*4)($29) 70 mfc0 $16, $14 /* Read EPC */ 71 sw $17, (17*4)($29) 72 mfc0 $17, $13 /* read CR (used later) */ 73 sw $18, (18*4)($29) 74 mfc0 $18, $12 /* Read current SR (used later) */ 75 sw $19, (19*4)($29) 76 sw $20, (20*4)($29) 77 sw $21, (21*4)($29) 78 sw $22, (22*4)($29) 79 sw $23, (23*4)($29) 80 sw $30, (30*4)($29) 81 sw $28, (28*4)($29) 82 mflo $14 /* read LO */ 83 mfhi $15 /* read HI */ 84 sw $31, (31*4)($29) /* save RA */ 57 sw $2, (2*4)($29) /* save $2 */ 58 sw $3, (3*4)($29) /* save $3 */ 59 sw $4, (4*4)($29) /* save $4 */ 60 sw $5, (5*4)($29) /* save $5 */ 61 sw $6, (6*4)($29) /* save $6 */ 62 sw $7, (7*4)($29) /* save $7 */ 63 sw $8, (8*4)($29) /* save $8 */ 64 sw $9, (9*4)($29) /* save $9 */ 65 sw $10, (10*4)($29) /* save $10 */ 66 sw $11, (11*4)($29) /* save $11 */ 67 sw $12, (12*4)($29) /* save $12 */ 68 sw $13, (13*4)($29) /* save $13 */ 69 sw $14, (14*4)($29) /* save $14 */ 70 sw $15, (15*4)($29) /* save $15 */ 71 sw $16, (16*4)($29) /* save $16 */ 72 sw $17, (17*4)($29) /* save $17 */ 73 sw $18, (18*4)($29) /* save $18 */ 74 sw $19, (19*4)($29) /* save $19 */ 75 sw $20, (20*4)($29) /* save $20 */ 76 sw $21, (21*4)($29) /* save $21 */ 77 sw $22, (22*4)($29) /* save $22 */ 78 sw $23, (23*4)($29) /* save $23 */ 79 sw $24, (24*4)($29) /* save $24 */ 80 sw $25, (25*4)($29) /* save $25 */ 81 sw $28, (28*4)($29) /* save $28 */ 82 sw $30, (30*4)($29) /* save $30 */ 83 sw $31, (31*4)($29) /* save $31 */ 84 mflo $14 /* LO */ 85 mfhi $15 /* HI */ 86 mfc0 $16, $14 /* EPC */ 87 mfc0 $17, $13 /* CR */ 88 mfc0 $18, $12 /* SR */ 89 mfc0 $19, $8 /* BVAR */ 90 sw $14, (35*4)($29) /* save LO */ 91 sw $15, (36*4)($29) /* save HI */ 85 92 sw $16, (32*4)($29) /* Save EPC */ 86 93 sw $17, (33*4)($29) /* Save CR */ 87 94 sw $18, (34*4)($29) /* Save SR */ 88 sw $14, (35*4)($29) /* save LO */ 89 sw $15, (36*4)($29) /* save HI */ 90 or $4, $0, $27 91 95 sw $19, (37*4)($29) /* save BVAR */ 96 or $4, $0, $27 /* $4 <= regs_table */ 92 97 93 98 do_jump:
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