Changes between Version 16 and Version 17 of boot_loader

Timestamp:

Dec 7, 2014, 9:51:57 PM (10 years ago)

Author:

alain

Comment:

--

boot_loader

@@ -56 +56 @@
 This code is executed by all processors, but sequencially. All processors enter the same [source:soft/giet_vm/giet_kernel/kernel_init.c kernel_init.c] code that makes the following actions:
 
- * step 0 : processor[0][0][0] makes kernel_heap[x][y] array and kernel fat initialisation.
- * step 1 : each processor get its scheduler virtual address from CP0_SCHED register and contributes to _schedulers[x][y][p] array initialisation.
- * step 2 : each processor loops on all allocated tasks to build the _ptabs_vaddr[vspace] & _ptabs_ptprs[vspace] arrays from the tasks contexts.
- * step 3 : each processor computes and set the XCU masks, as specified in the HWI, PTI, and WTI interrupt vectors.
- * step 4 : each processor starts its TICK timer if it has at least one task allocated.
- * step 5 : each processor updates the idle_task context (CTX_SP, CTX_RA, CTX_EPC). 
- * step 6 : when all processors reach the synchronisation barrier, each processor set registers SP, SR, PTPR, EPC, with the values corresponding to the first allocated task, and jump to user code.
+ * '''step 0''' : processor[0][0][0] makes kernel_heap[x][y] array and kernel fat initialisation.
+ * '''step 1''' : each processor get its scheduler virtual address from CP0_SCHED register and contributes to _schedulers[x][y][p] array initialisation.
+ * '''step 2''' : each processor loops on all allocated tasks to build the _ptabs_vaddr[vspace] & _ptabs_ptprs[vspace] arrays from the tasks contexts.
+ * '''step 3''' : each processor computes and set the XCU masks, as specified in the HWI, PTI, and WTI interrupt vectors.
+ * '''step 4''' : each processor starts its TICK timer if it has at least one task allocated.
+ * '''step 5''' : each processor updates the idle_task context (CTX_SP, CTX_RA, CTX_EPC). 
+ * '''step 6''' : when all processors reach the synchronisation barrier, each processor set registers SP, SR, PTPR, EPC, with the values corresponding to the first allocated task, and jump to user code.