Changes between Version 2 and Version 3 of boot_loader

Timestamp:

Nov 5, 2014, 3:43:13 PM (11 years ago)

Author:

alain

Comment:

--

boot_loader

@@ -14 +14 @@
  * SPP : Small Physical Page (4 Kbytes).
 There is one SPP and one BPP allocator per cluster containing a physical memory bank.
-All the physical memory allocation is done by the boot-loader
+All the physical memory allocation is done by the boot-loader in the boot phase, and these memory allocators
+should not be used by the kernel in the execution phase.
+
 === void '''boot_ptabs_init()''' ===
 This function makes the page table initialisation. There is one page table per user application (vspace) defined in the mapping.
-All these  
- * Proc[0][0][0] MMU activation
- * Private vobjs initialisation : ''boot_vobjs_init()''
- * Schedulers initialisation : ''boot_schedulers init()''
+All these pages tables are packed in one segment (seg_ptab) occupying one single big page (2 Mbytes), but this PTAB segment is replicated in all clusters.
+As the kernel read-only segments (seg_kcode and seg_kinit) are replicated in all clusters to avoid contention, the content of the page tables depends
+on the cluster-coordinates: for the kernel code, a given virtual address is mapped to different physical addresses, depending on the cluster coordinates.
+
+ 
+
+
+=== '''boot_schedulers init()''' ===
+This function makes the schedulers initialisation, as specified in the mapping, with the following principles.
+ * There is one scheduler per processor. 
+ * Any task defined in any application can be allocated to any processor.
+ * The allocation of task to processors is fully static (no task migration).
+ * One single processor cannot schedule more than 14 tasks.
+ s One scheduler occupies 8 Kbytes. The user
  * Peripherals initialisation : ''boot_peripherals_init()''
  * Kernel & application code loading : ''boot_elf_load()''
@@ -27 +39 @@
 == __Parallel step__ ==
 
-The second step is executed in parallel by all processors:
+This second step is executed in parallel by all processors:
  * CP0_SCHED register initialisation
  * MMU Activation