Changes between Version 12 and Version 13 of cma_driver

Timestamp:

Feb 9, 2015, 7:06:52 PM (10 years ago)

Author:

alain

Comment:

--

cma_driver

@@ -8 +8 @@
 This component can be used in conjonction with the SOCLIB ''vci_frame_buffer'' to display images, or with the SOCLIB ''vci_multi_nic'' controller to transfer  RX or TX packets between NIC buffers and memory buffers.
 
-A single CMA channel transfers continuously data from an infinite stream of buffers (source ''chbuf'') to another infinite stream of buffers (destination ''chbuf'').
+A single CMA channel transfers a stream of data from a set of chained buffers (source ''chbuf'') to another set of chained buffers (destination ''chbuf'').  This controller implements two modes to scan the source and destination chbufs:
+ * '''IN_ORDER_FIFO''' : The chained buffers are read and write in strict order, with a blocking polling policy to access both the expected source chbuf and the expected destination chbuf. The waiting delay between two accesses is defined, for each channel, by the CHBUF_PERIOD addressable register, and must be non zero to activate this mode.
+ * '''OUT OF ORDER''' : The controller scan the source buffers, and the first full buffer found is read. Similarly, the controller scan the destination buffers, and the first empty buffer found is written, with a round robin priority for the search. This mode is activated when the CHBUF_PERIOD value is zero (default value).
+
 A ''chbuf'' descriptor is a variable size circular array of 64 bits entries. Each entry is a single buffer descriptor, and
 contains a 48 bits physical address (PADDR) and a valid bit V that is 0 when the buffer is empty.