Changes between Version 7 and Version 8 of hba_driver
- Timestamp:
- Apr 2, 2015, 12:26:42 PM (10 years ago)
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hba_driver
v7 v8 7 7 The ''vci_multi_ahci'' component is a multi-channels, block oriented, external mass storage controller respecting the AHCI standard. Each channel define an independant physical disk, but this driver supports only one channel, because the GIET-VM uses only one physical disk. 8 8 9 The '''Command List''' is a software FIFO that can contain up to 32 independant commands, posted by different user tasks. These independant transfers are handled by the HBA device in the same order as they have been written in the command list. There is no global lock protecting the the HBA device, but the command list being a shared structure, the driver uses a n ''_atomicc_increment()'' to get a slot in the Command List, and increment the writepointer.9 The '''Command List''' is a software FIFO that can contain up to 32 independant commands, posted by different user tasks. These independant transfers are handled by the HBA device in the same order as they have been written in the command list. There is no global lock protecting the the HBA device, but the command list being a shared structure, the driver uses a ''ptw'' pointer on the next free slot in the command list, and uses an ''_atomic_increment()'' to increment this ''ptw'' pointer. 10 10 11 11 This driver implements two operating mode: … … 13 13 * In '''descheduling mode''', the calling task is descheduled, and the calling task global index is saved in the ''_hba_gtid[32]'' array, indexed by the command index. The task must be reactivated when the command is completed. This mode is used, to handle the user system calls. 14 14 15 As several user tasks can concurrently register commands in the command list, and there is only one HBA interrupt per channel, this interrupt is not linked to a specific c alling task: in descheduling mode, the HBA IRQ is a "global" IRQ that is statically routed to processor P[x_io,y_io,0] in cluster_io. The associated global HBA_ISR send a WAKUP WTI to all tasks that have a completed command. This HBA_ISR uses a read pointer on the Command List to identify the expected command completion. The incrementation of this readpointer does not require ''_atomic_increment()'' as there is no concurrent access on this pointer.15 As several user tasks can concurrently register commands in the command list, and there is only one HBA interrupt per channel, this interrupt is not linked to a specific command. In descheduling mode, the HBA IRQ is a "global" IRQ that is statically routed to processor P[0,0,0]. The associated global HBA_ISR send a WAKUP WTI to all tasks that have a completed command. This HBA_ISR uses a ''ptr'' pointer on the first active command in the Command List to identify the completed commands. The incrementation of this ''ptr'' pointer does not require ''_atomic_increment()'' as there is no concurrent access on this pointer. 16 16 17 17 The SEG_IOC_BASE address must be defined in the hard_config.h file. … … 19 19 The addressable registers map is defined [source:soft/giet_vm/giet_drivers/hba_driver.h here]. 20 20 21 == __Software data structures__ 22 23 The HBA component support split memory buffers (several physical buffers for one single command), but this driver supports only one single buffer commands, because a contiguous buffer in virtual space is also contiguous in physical space. This is a nice property of the the static memory allocation policy implemented by the GIET_VM. 24 25 There exist 32 command tables associated to the 32 commands in the command list, and each command table occupies only 32 bytes. 26 27 === Command List === 28 29 The command List is an array of 32 Command Descriptors. Each Command Descriptor occupies 16 bytes, and is aligned on a 16 bytes boundary. 30 {{{ 31 typedef struct hba_cmd_desc_s // size = 16 bytes 32 { 33 unsigned char flag[2]; // W in bit 6 of flag[0] 34 unsigned char prdtl[2]; // Number of buffers 35 unsigned int prdbc; // Number of bytes actually transfered 36 unsigned int ctba; // Command Table base address 32 LSB bits 37 unsigned int ctbau; // Command Table base address 32 MSB bits 38 } hba_cmd_desc_t; 39 }}} 40 41 === Command Table === 42 43 The GIET_VM define an array of 32 Command Tables. A Command Table contains one header, and one Buffer Descriptor. Each Command Table occupies 32 bytes, and is aligned on a 32 bytes boundary. 44 {{{ 45 typedef struct hba_cmd_header_s // size = 16 bytes 46 { 47 unsigned int res0; // reserved 48 unsigned char lba0; // LBA 7:0 49 unsigned char lba1; // LBA 15:8 50 unsigned char lba2; // LBA 23:16 51 unsigned char res1; // reserved 52 unsigned char lba3; // LBA 31:24 53 unsigned char lba4; // LBA 39:32 54 unsigned char lba5; // LBA 47:40 55 unsigned char res2; // reserved 56 unsigned int res3; // reserved 57 } hba_cmd_header_t; 58 59 typedef struct hba_cmd_buffer_s // size = 16 bytes 60 { 61 unsigned int dba; // Buffer base address 32 LSB bits 62 unsigned int dbau; // Buffer base address 32 MSB bits 63 unsigned int res0; // reserved 64 unsigned int dbc; // Buffer byte count 65 } hba_cmd_buffer_t; 66 67 typedef struct hba_cmd_table_s // size = 32 bytes 68 { 69 hba_cmd_header_t header; // contains LBA 70 hba_cmd_buffer_t buffer; // only one physical buffer 71 } hba_cmd_table_t; 72 }}} 73 74 == __Access Functions__ == 75 76 === unsigned int '''_hba_init'' ( ) === 77 This function checks the block size and desactivates interrupts. It initializes 78 the HBA hardware registers, and the Command List.that is statically routed to processor P[x_io,y_io,0] in cluster_io. 79 // The associated global HBA_ISR send a WAKUP WTI to all tasks that have 80 // a completed command. This HBA_ISR uses a read pointer on the command 81 // to identify the first expected command completion. The incrementation 82 // of this read pointer does 21 83 == __Access Functions__ == 22 84 … … 40 102 * '''irq-id''' : index returned by XCU 41 103 * '''channel''' : unused (only one HBA channel is supported). 42