Changes between Version 15 and Version 16 of kernel_interrupts

Timestamp:

Mar 22, 2015, 6:00:46 PM (10 years ago)

Author:

alain

Comment:

--

kernel_interrupts

@@ -18 +18 @@
 Regarding the allocation of interrupts to processors (IRQ routing using the XCU_MASK registers), the GIET-VM implement the following policy ('''lpid''' is the local processor index, between 0 and 7):
  1. The GIET-VM uses only one XCU output IRQ per processor  (with index = lpid * IRQ_PER_PROCESSOR), even if the hardware platform contains more than one IRQ_PER_PROCESSOR.
+
  2. In each cluster the local '''HWI'''  generated by the local peripherals are ''statically'' allocated to local processors.
+
  3. In each cluster, one '''PTI''' is statically allocated to each processor for context switch (pti_id = lpid). The TICK period is defined by the GIET_TICK_VALUE parameter in the giet_config.h file.
- 4. In each cluster, 4 '''WTI''' mailbox (called WAKE_UP, EXT_IRQ_ONE, EXT_IRQ_TWO, EXT_IRQ_TER) are statically allocated to each processor. The first one is used by the GIET_VM boot-loader for processor wakup, and can be used by the kernel for inter-processor interrupts.  The three other WTI mailbox are dynamically allocated to external IRQS generated by the external peripherals (through the IOPIC component), in order to route the external IRQ to the processor that launched the I/O operation.
+
+ 4. In each cluster, 4 '''WTI''' mailbox (called WAKE_UP, EXT_IRQ_ONE, EXT_IRQ_TWO, EXT_IRQ_TER) are statically allocated to each processor. The first one is used by the GIET_VM boot-loader for processor wakup, and can be used by the kernel for inter-processor interrupts.  
+
+ 5. The WAKE_UP interrupt force execution of the isr_wakup() function on the destination processor. If the processor is idle (executing the idle_task), or if the value written is non zero, this ISR force a context switch on the target processor.
+
+ 6. The three EXT_IRQ_ONE, EXT_IRQ_TWO and EXT_IRQ_TER interrupts are dynamically allocated to external IRQS generated by the external peripherals (through the IOPIC component), in order to route the external IRQ to the processor that launched the I/O operation.
+
+The array below define the static routing of WTIs to the local processors, implemented by the XCU masks: 
 || '''WTI name'''   || ''' WTI index''' ||
 || WAKE_UP       || lpid           ||
@@ -26 +35 @@
 || EXT_IRQ_TWO || 2*NB_PROCS_MAX + lpid ||
 || EXT_IRQ_TER  || 3*NB_PROCS_MAX + lpid ||
-
-With this static allocation policy, XCU masks for all processors are statically defined in the boot phase. 
 
  == __Functions used for all HWI / PTI / WTI interrupts__ ==