Changes between Version 23 and Version 24 of kernel_interrupts

Timestamp:

May 12, 2015, 1:50:53 PM (10 years ago)

Author:

alain

Comment:

--

kernel_interrupts

@@ -23 +23 @@
  3. In each cluster, one '''PTI''' is statically allocated to each processor for context switch (pti_id = lpid). The TICK period is defined by the GIET_TICK_VALUE parameter in the giet_config.h file. The associated '''_isr_tick()''' interrupt service routine forces a context switch on the target processor.
 
- 4. In each cluster, 4 '''WTI''' mailbox (called WAKE_UP, EXT_IRQ_ONE, EXT_IRQ_TWO, EXT_IRQ_TER) are statically allocated to each processor. The first one is used by the GIET_VM boot-loader for processor wakup, and is used by the kernel for inter-processor interrupts.  
+ 4. In each cluster, 4 '''WTI''' mailboxes (called WAKE_UP, EXT_IRQ_ONE, EXT_IRQ_TWO, EXT_IRQ_TER) are statically allocated to each processor. 
 
- 5. The '''isr_wakup()''' interrupt service routine is associated to the '''WAKE_UP''' interrupt. When the destination processor is not in wait state (low-power mode), the ISR is executed. If the processor executing the idle_task, or if the value written in the WTI mailbox is non zero, this ISR force a context switch on the target processor.
+ 5. The '''WAKE-UP''' interrupt can be used in two situations: When the interrupted processor is in "wait state" (low-power mode), the processor exit the "wait state", but the ISR is not executed. When the processor is not in "wait state" the ISR is executed. If the interrupted processor is runing the idle_task, or if the value written in the WTI mailbox is non zero, the ISR force a context switch on the target processor. These WAKE_UP mailboxes have indexes from (0 to NB_PROCS_MAX-1). 
 
- 6. The three '''EXT_IRQ_ONE''', '''EXT_IRQ_TWO''' and '''EXT_IRQ_TER''' interrupts are dynamically allocated to external IRQS generated by the external peripherals (through the IOPIC component), in order to route the external IRQ to the processor that launched the I/O operation. 
+ 6. The three '''EXT_IRQ_ONE''', '''EXT_IRQ_TWO''' and '''EXT_IRQ_TER''' interrupts are dynamically allocated to external IRQS generated by the external peripherals (through the IOPIC component), in order to route the external IRQ - via a WTI - to the processor that launched the I/O operation. For processor with index = lpid, these 3 mailboxes have indexes (lpid + NB_PROCS_MAX) / (lpid + 2*NB_PROCS_MAX) / (lpid + 3*NB_PROCS_MAX).
 
 The array below define the static routing of WTIs to the local processors, implemented by the XCU masks: 
@@ -59 +59 @@
  * '''wti_index''' : return value defining the index of the WTI mailbox allocated to P[x,y,p]
 This function does three things: 
- 1. it allocates a WTI mailbox in the XCU of cluster[x,y] to the requesting processor ( index is in [4*p+1, 4*p+2, 4*p+3] ) ; 
+ 1. it allocates a WTI mailbox in the XCU of cluster[x,y] to the requesting processor : WTI index can be (p + NB_PROCS_MAX) / (p + 2*NBPROCS_MAX) / p + (3*NB_PROCS_MAX).
  2. it initializes the IOPIC register associated to the (isr_type / isr_channel) external IRQ.
  3. it initializes the proper entry in the WTI interrupt vector associated to processor P[x,y,p].