Changes between Version 30 and Version 31 of kernel_interrupts


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Timestamp:
Dec 15, 2016, 3:23:28 PM (8 years ago)
Author:
alain
Comment:

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  • kernel_interrupts

    v30 v31  
    1010A multi-channel XCU component in a given cluster must contain (NB_PROCS_MAX * IRQ_PER_PROCESSOR) channels  (one channel = one XCU output IRQ).
    1111
    12 There is three interrupt vectors per processor (stored in each processor's scheduler) for the three  interrupts types: '''HWI''' (Hardware Interrupt), '''PTI''' (Programmable Timer Interrupt), and '''WTI''' (Write Triggered Interrupt). Each interrupt vector entry contains two fields:
     12There is three interrupt vectors per processor (stored in each processor's scheduler) for the three  interrupts types: '''HWI''' (Hardware Interrupt), '''PTI''' (Programmable Timer Interrupt), and '''WTI''' (Write Triggered Interrupt). The WTI are actually hardware mailboxes, that are used by the GIET-VM to implement two mechanisms:
     13 * they are used to implement software IPIs (Inter Processor Interrupt).
     14 * they are used to dynamically route the external IRQs (generated by the external peripheral) to a given processor.
     15
     16Each interrupt vector entry contains two fields:
    1317||isr_id         ||bits[15:0]    || defines the type of ISR to be executed ||
    1418||channel_id ||bits[31:16]  || defines the channel for multi-channels ISR ||
    1519
     20The max number of processors in a given cluster, and the max number of WTI mailboxes in XCU, are defined by the NB_PROCS_MAX and XCU_NB_WTI hardware parameters.
     21
    1622 == __Interrupt routing__ ==
    1723
    18 Regarding the allocation of interrupts to processors (IRQ routing using the XCU_MASK registers), the GIET-VM implement the following policy ('''lpid''' is the local processor index, between 0 and 7):
     24Regarding the allocation of interrupts to processors (IRQ routing using the XCU_MASK registers), the GIET-VM implement the following policy ('''lpid''' is the local processor index):
    1925 1. The GIET-VM uses only one XCU output IRQ per processor  (with index = lpid * IRQ_PER_PROCESSOR), even if the hardware platform connect more than one IRQ line for each processor.
    2026
    2127 2. In each cluster the local '''HWI'''  generated by the local peripherals are ''statically'' allocated and distributed to local processors, to share the load between all processors).
    2228
    23  3. In each cluster, one '''PTI''' is statically allocated to each processor for context switch (pti_id = lpid). The TICK period is defined by the GIET_TICK_VALUE parameter in the giet_config.h file. The associated '''_isr_tick()''' interrupt service routine forces a context switch on the target processor.
     29 3. In each cluster, one private '''PTI''' is statically allocated to each processor for context switch (pti_id = lpid). The TICK period is defined by the GIET_TICK_VALUE parameter in the giet_config.h file. The associated '''_isr_tick()''' interrupt service routine forces a context switch on the target processor.
    2430
    25  4. In each cluster, 4 '''WTI''' mailboxes (called WAKE_UP, EXT_IRQ_ONE, EXT_IRQ_TWO, EXT_IRQ_TER) are statically allocated to each processor.
     31 4. In each cluster, one private '''WTI''' mailbox (called WAKE_UP), is statically allocated to each processor. It is used in two situations: When the interrupted processor is in "wait state" (low-power mode), the processor exit the "wait state", but the ISR is not executed. When the processor is not in "wait state" the ISR is executed. If the interrupted processor is runing the idle_task, or if the value written in the WTI mailbox is non zero, the ISR force a context switch on the target processor.
    2632
    27  5. The '''WAKE-UP''' interrupt can be used in two situations: When the interrupted processor is in "wait state" (low-power mode), the processor exit the "wait state", but the ISR is not executed. When the processor is not in "wait state" the ISR is executed. If the interrupted processor is runing the idle_task, or if the value written in the WTI mailbox is non zero, the ISR force a context switch on the target processor.
    28 
    29  6. The three '''EXT_IRQ_ONE''', '''EXT_IRQ_TWO''' and '''EXT_IRQ_TER''' interrupts are dynamically allocated to external IRQS generated by the external peripherals (through the IOPIC component), in order to route the external IRQ - via a WTI - to the processor that launched the I/O operation.
    30 
    31 The array below define the static allocation of WTI mailboxes to the local processors, defined by the GIET-VM, and implemented by the XCU masks:
    32 || '''WTI name'''   || ''' WTI index''' ||
    33 || WAKE_UP       || lpid           ||
    34 || EXT_IRQ_ONE || NB_PROCS_MAX + lpid ||
    35 || EXT_IRQ_TWO || 2*NB_PROCS_MAX + lpid ||
    36 || EXT_IRQ_TER  || 3*NB_PROCS_MAX + lpid ||
     33 5. In each cluster, the other '''WTI''' mailboxes (XCU_NB_WTI - NB_PROCS_MAX) are dynamically allocated to a given external IRQ. This allocation can be for a long time (Network Controller RX or TX IRQs), or just for a single - user required - I/O operation (Disk Controller IRQ, or TTY channel IRQ). In each cluster, a specific lock protect exclusive access to the local WTI mailboxes allocator. This dynamic routing of external IRQs relies on the MASK registers in the XCUs and IOPIC components.
    3734
    3835 == __Global variables used for external IRQs routing__ ==
    … …  
    4037 * unsigned char '''_ext_irq_index'''[GIET_ISR_TYPE_MAX][GIET_ISR_CHANNEL_MAX];
    4138This array contains the external IRQ indexes (IOPIC input index) for each (isr/channel) couple.
    42 This is an hardware feature defined in the mapping.
     39This array describes the hardware wiring, as defined in the mapping.
    4340
    44  * unsigned char '''_wti_alloc_one'''[X_SIZE][Y_SIZE][NB_PROCS_MAX];
    45  * unsigned char '''_wti_alloc_two'''[X_SIZE][Y_SIZE][NB_PROCS_MAX];
    46  * unsigned char '''_wti_alloc_ter'''[X_SIZE][Y_SIZE][NB_PROCS_MAX];
    47 These three arrays define the WTI allocators for each processor: non zero value when the entry has been allocated to a given external IRQ. This allocation is dynamically done by the kernel.
     41 * unsigned char '''_wti_alloc'''[X_SIZE][Y_SIZE][XCU_NB_WTI];
     42This array describes the WTI mailboxes allocation status in each cluster. Boolean true if MTI mailbox allocated.
     43
     44 * spin_lock_t '''_wti_lock'''[X_SIZE][Y_SIZE];
     45This array contains the locks protecting the WTI mailbox allocators in each cluster.
     46
     47 * unsigned int '''_ext_irq_wti'''[GIET_ISR_TYPE_MAX][GIET_ISR_CHANNEL_MAX];
     48This array contains for each external IRQ, identified by the (is_type,channel) couple, the allocated WTI mailbox identifier.
     49This identifier has the following format (x / y / lpid / wti), with one byte per field.
    4850
    4951