10 | | This mapping is statically build by the GIET-VM bootloader in the boot phase: |
11 | | 1. It contains a description of the target clusterized hardware architecture.The number of cluster is variable (can be one). The number of processors per cluster is variable (can be one). The number of peripherals and coprocessor per cluster is variable. The number of physical memory banks per cluster is variable. |
12 | | 2. It contains a description of the user applications (an user application is called a ''vspace'') to be launched on the platform. The number of parallel ''tasks'' per application is variable (can be one). Multi-Writer/Multi-Reader communication channels between tasks are supported. Each vspace contains a variable number of virtual segments (called ''vsegs''). The number of vspace can be one. |
13 | | 3. It contains the mapping directives: The tasks are statically allocated to processors. The various software objects (user and kernel code segments, tasks stacks, tasks heaps, communication channels, etc.) are called ''vobjs'', and are statically placed on the distributed physical memory banks (called ''psegs''), using the paged virtual memory. |
| 11 | 1. It contains a description of the target, clusterized, hardware architecture, with the following constraints: The clusters are identified by the (x,y) coordinates in a 2D mesh topology. The number of clusters is variable (can be one). The number of processors per cluster is variable (can be one). The number of physical memory banks is variable (up to one physical memory bank per cluster. Most peripherals are ''external'' and localized in one specific I/O cluster. |
| 12 | 2. It contains a description of the user applications to be launched on the platform. An user application is characterized by a a virtual address space, called a ''vspace''. The number of parallel ''tasks'' per application is variable (can be one). Multi-Writer/Multi-Reader communication channels between tasks are supported. Each vspace contains a variable number of virtual segments, called ''vsegs''. The number of vspace can be one. |
| 13 | 3. It contains the mapping directives: The tasks are statically allocated to processors. The various software objects (user and kernel code segments, tasks stacks, tasks heaps, communication channels, etc.) are called ''vobjs'', and are statically placed on the distributed physical memory banks (called ''psegs''), using the page tables (one page table per vspace) that define the mapping of the vsegs on the psegs. |
| 28 | |
| 29 | == Python Mapping General = |
| 30 | |
| 31 | A specific mapping requires at least two python files: |
| 32 | * The '''arch.py''' file is attached to a given hardware architecture. It describes both the (possibly generic) hardware architectures, and the mapping of the kernel software objects on this architecture. |
| 33 | * The '''appli.py''' file is attached to a given user application. It describes the both the application structure (tasks and communication channels), and the mapping of the application tasks and software objects on the architecture. |
| 34 | |
| 35 | The various Python Classes used by these these files are defined in the [source:soft/giet_vm/giet_python/mapping.py mapping.py] file. |
| 36 | |
| 37 | == Python Architecture description === |
| 38 | |
| 39 | To define an architecture, you must use the following constructors: |
| 40 | |
| 41 | === Class Mapping === |
| 42 | |
| 43 | The following constructor build a mapping object and define the target architecture general parameters: |
| 44 | |
| 45 | mapping = Mapping( name # mapping name |
| 46 | x_size # number of clusters in a row of the 2D mesh |
| 47 | y_size # number of clusters in a column of the 2D mesh |
| 48 | nprocs # number of processors per cluster |
| 49 | x_width # number of bits to encode X coordinate in paddr (default = 4) |
| 50 | y_width # number of bits to encode Y coordinate in paddr (default = 4) |
| 51 | p_width # number of bits to encode local processor index (default = 4) |
| 52 | paddr_width # number of bits in physical address |
| 53 | coherence # Boolean true if hardware cache coherence |
| 54 | irq_per_proc # number of IRQ lines between XCU and proc |
| 55 | use_ramdisk # Boolean true if the architecture contains a RamDisk |
| 56 | x_io # io_cluster X coordinate |
| 57 | y_io # io_cluster Y coordinate |
| 58 | peri_increment # peri_increment, |
| 59 | ram_base # Physical memory bank base address in cluster [0,0] |
| 60 | ram_size # ram_size ) |
| 61 | |
| 62 | mapping = Mapping |
| 63 | == Application description : appli.py === |