Changes between Version 3 and Version 4 of mapping_info

Timestamp:

Oct 26, 2014, 12:17:15 PM (10 years ago)

Author:

alain

Comment:

--

mapping_info

@@ -1 +1 @@
 = GIET_VM / Mapping =
 
+[[PageOutline]]
+
+The GIET_VM is a fully '''static operating system''' supporting clusterized, shared address space, NUMA (Non Uniform memory Acces), many-cores architectures, contening MIPS32 processors. 
+
+All software objects (user applications code and data, but also kernel code and critical kernel structures such as the page tables or the processors schedulers) are statically build and loaded from disk into physical memory by the bootloader in the boot phase. 
+
+The main advantage of this static approach is to provide the system designed a full control on the placement of tasks on processors but also of the data (software objects) on the distributed physical memory banks. It allows optional replication of critical objects such as kernel code, or page tables.
+
+To control this mapping, the system designer must define a mapping, as described below.
 
 == C mapping data structure ==
 
-The C binary mapping data structure, is used by the GIET_VM in the boot phase to map one or several multi-threaded user applications on a
-generic multi-processors, multi-clusters architecture. The next section describes how this this C binary structure can be generated by the ''genmap'' tool from a source description using the PYTHON language.
+A dedicated C binary data structure, is used by the GIET_VM bootloader to map one or several multi-threaded user applications on a generic, shared address space multi-processors, multi-clusters architecture. The next section describes how this this C binary structure can be generated by the ''genmap'' tool from a source description using the PYTHON language. We describe in this section this C structure.
 
 The C mapping data structure contains the following informations:
 
- 1.  It contains a description of the target, clusterized, hardware architecture, with the following constraints: The clusters are identified by the (x,y) coordinates in a 2D mesh topology. The number of clusters is variable (can be one). The number of processors per cluster is variable (can be one). The number of  physical memory banks is variable (up to one physical memory bank per cluster. Most peripherals are ''external'' and  localized in one specific I/O cluster.
- 2. It contains a description of the user applications to be launched on the platform. An user application is characterized by a a virtual address space, called a ''vspace''. The number of parallel ''tasks'' per application is variable (can be one). Multi-Writer/Multi-Reader communication channels between tasks are supported. Each vspace contains a variable number of virtual segments, called ''vsegs''. The number of vspace can be one.
+ 1.  It contains a description of the target, clusterized, hardware architecture, with the following constraints: The clusters are organised in a 2D mesh topology, and the number of clusters is variable (can be one). The number of processors per cluster is variable (can be one). The number of  physical memory banks is variable (up to one physical memory bank per cluster. Most peripherals are ''external'' and  localized in one specific I/O cluster.
+The physical address width is between 32 and 48 bits, and is the concatenation of 3 fields: the LSB field (32 bits) define a 4 Gbits physical address space inside a single cluster. The X  and Y  fields (up to 8 bits for each field) define the cluster coordinate.
+
+ 2. It contains a description of the user applications to be launched on the platform. An user application is characterized by a a virtual address space, called a ''vspace''. An user application can be multi-threaded, and the number of parallel tasks sharing the same address space in a given application is variable (can be one). The GIET_VM provide a specific Multi-Writer/Multi-Reader communication middleware for send/receive inter-tasks communication. Each vspace contains a variable number of virtual segments, called ''vsegs''. The number of simultaneously mapped vspaces on a given architecture is variable (can be one).
+
  3. It contains the mapping directives: The tasks are statically allocated to processors. The various software objects (user and kernel code segments, tasks stacks, tasks heaps, communication channels, etc.) are called ''vobjs'', and are statically placed on the distributed physical memory banks (called ''psegs''),  using the page tables (one page table per vspace) that define the mapping of the vsegs on the psegs.
 
@@ -25 +36 @@
  * mapping_cp_port_t  cp_port[] 
  * mapping_periph_t   periph[]
-It is intended to be stored in memory in the seg_boot_mapping segment. 
+
+The ''map.bin'' file must be stored on disk and will be loaded  in memory by the GIET_VM bootloader in the ''seg_boot_mapping'' segment. 
 
 == Python Mapping General =
 
 A specific mapping requires at least two python files:
- * The '''arch.py''' file is attached to a given hardware architecture. It describes both the (possibly generic) hardware architectures, and the mapping of the kernel software objects on this architecture.
- * The '''appli.py''' file is attached to a given user application. It describes the both the application structure (tasks and communication channels), and the mapping of the application tasks and software objects on the architecture.
+ * The '''arch.py''' file is attached to a given hardware architecture. It describes both the (possibly generic) hardware architectures, and the mapping of the kernel software objects on this hardware architecture.
+ * The '''appli.py''' file is attached to a given user application. It describes both the application structure (tasks and communication channels), and the mapping of the application tasks and software objects on the architecture.
 
 The various Python Classes used by these these files are defined in the [source:soft/giet_vm/giet_python/mapping.py mapping.py] file.
@@ -43 +55 @@
 The Mapping constructor build a mapping object and define the target architecture general parameters:
 
-|| name          || mapping name == architecture name ||
-|| x_size         || number of clusters in a row of the 2D mesh ||
-|| y_size         || number of clusters in a column of the 2D mesh ||              
-|| nprocs        || number of processors per cluster ||     
-|| x_width       || number of bits to encode X coordinate in paddr (default = 4) ||
-|| y_width       || number of bits to encode Y coordinate in paddr (default = 4) ||
-|| p_width       || number of bits to encode local processor index (default = 4) ||
-|| paddr_width ||  number of bits in physical address ||
-|| coherence    || Boolean true if hardware cache coherence ||      
-                                 irq_per_proc   # number of IRQ lines between XCU and proc  
-                                 use_ramdisk    # Boolean true if the architecture contains a RamDisk
-                                 x_io                 # io_cluster X coordinate          
-                                 y_io                  # io_cluster Y coordinate
-                                 peri_increment  # peri_increment,
-                                 ram_base          # Physical memory bank base address in cluster [0,0]
-                                 ram_size           # ram_size )
+|| name               || mapping name == architecture name ||
+|| x_size              || number of clusters in a row of the 2D mesh ||
+|| y_size              || number of clusters in a column of the 2D mesh ||              
+|| nprocs             || number of processors per cluster ||     
+|| x_width           || number of bits to encode X coordinate in paddr  ||
+|| y_width            || number of bits to encode Y coordinate in paddr  ||
+|| p_width            || number of bits to encode local processor index  ||
+|| paddr_width     ||  number of bits in physical address ||
+|| coherence        || Boolean true if hardware cache coherence ||      
+|| irq_per_proc     || number of IRQ lines between XCU and one proc (GIET_VM use only one) || 
+|| use_ramdisk     || Boolean true if the architecture contains a RamDisk ||
+|| x_io                  || io_cluster X coordinate ||         
+|| y_io                  || io_cluster Y coordinate ||
+|| peri_increment || virtual address increment for peripherals replicated in all clusters ||
+|| reset_address   || physical base address of the ROM containing the preloader code ||
+|| ram_base          ||physical memory bank base address in cluster [0,0] ||
+|| ram_size          || physical memory bank size in one cluster (bytes) ||
 
 === Class Cluster ===
+
 == Application description : appli.py ===