Changes between Version 8 and Version 9 of mapping_info


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Timestamp:
Oct 26, 2014, 9:52:02 PM (10 years ago)
Author:
alain
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  • mapping_info

    v8 v9  
    5151To define an architecture, you must use the following constructors:
    5252
    53 === Construct mapping ===
     53=== 1. mapping ===
    5454
    55 The Mapping constructor build a mapping object and define the target architecture general parameters:
     55The Mapping( ) constructor build a mapping object and define the target architecture general parameters:
    5656
    5757|| name               || mapping name == architecture name ||
    5858|| x_size              || number of clusters in a row of the 2D mesh ||
    5959|| y_size              || number of clusters in a column of the 2D mesh ||             
    60 || nprocs             || number of processors per cluster ||     
     60|| nprocs             || max number of processors per cluster ||     
    6161|| x_width           || number of bits to encode X coordinate in paddr  ||
    6262|| y_width            || number of bits to encode Y coordinate in paddr  ||
    … …  
    7373|| ram_size          || physical memory bank size in one cluster (bytes) ||
    7474
    75 === Construct external peripherals ===
     75=== 2. Processor core ===
    7676
    77 The ''mapping.addPeriph( )'' construct adds one peripheral, and the associated physical segment. It has the following arguments:
    78 || name      || peripheral name ||
     77The '''mapping.addProc( )''' construct define one MIPS32 processor core in a cluster (number of processor cores can different in different clusters). It has the following arguments:
     78|| x      || cluster x coordinate ||
     79|| y      || physical ||
     80|| p      || physical memory bank size (bytes) ||
     81
     82The physical global processor index will be : ( ( x << y_width ) + y ) << p_width ) + p
     83
     84=== Physical memory bank ===
     85
     86The '''mapping.addRam( )''' construct define one physical memory bank, and the associated physical segment in a cluster. It has the following arguments:
     87|| name      || segment name ||
     88|| base       || physical memory bank base address ||
     89|| size        || physical memory bank size (bytes) ||
     90
     91The target cluster coordinates (x,y) is defined by the base address MSB bits.
     92
     93=== Physical peripheral ===
     94
     95The '''mapping.addPeriph( )''' construct adds one peripheral, and the associated physical segment in a cluster. It has the following arguments:
     96|| name      || segment name ||
    7997|| base       || peripheral segment physical base address ||
    80 || size        || peripheral segment size ||
     98|| size        || peripheral segment size (bytes) ||
    8199|| ptype     || Peripheral type ||
    82100|| subtype  || Peripheral subtype ||
    … …  
    84102|| arg          || optionnal argument depending on peripheral type ||
    85103
    86 The supported peripheral types and subtypes are defined in the [source:soft/giet_vm/giet_xml/mapping_info.h mapping_info.h] and [source:soft/giet_vm/giet_python/mapping.py mapping.py] files.
     104The target cluster coordinates (x,y) is defined by the base address MSB bits.
     105The supported peripheral types and subtypes are defined in the [source:soft/giet_vm/giet_python/mapping.py mapping.py] file.
    87106
    88 === Construct physical memory banks ===
     107=== Interrupt line ===
    89108
    90 The ''mapping.addRam( )'' construct adds one physical memory bank, and the associated physical segment. It has the following arguments:
     109The '''mapping.addIrq()''' construct adds one IRQ line input to an XCU peripheral, or to a PIC peripheral. It has the following arguments:
     110|| periph   || peripheral receiving the IRQ line ||
     111|| index    || input port index ||
     112|| isrtype  || Interrupt Service Routine type ||
     113|| channel || channel index for multi-channel ISR ||
     114
     115The supported ISR types are defined in the [source:soft/giet_vm/giet_python/mapping.py mapping.py] file.
     116
     117=== Kernel vseg ===
     118
     119The '''mapping.addGlobal()''' construct define a kernel virtual segment (a ''kernel vseg'' is defined in all ''vspaces'', and is called ''global''). It has the following arguments:
     120|| name       || virtual segment name  ||
     121|| vbase       || virtual base address ||
     122|| size          || segment size (bytes ||
     123|| mode        || access rights (CXWU) ||
     124|| vtype        || software object type  ||
     125|| x              || destination cluster X coordinate ||
     126|| y              || destination cluster Y coordinate ||
     127|| pseg        || destination pseg name ||
     128|| identity    || identity mapping required (default = False) ||
     129|| binpath    || pathname for binary file if required (default = ' ') ||
     130|| align        || alignment constraint if required (default = 0) ||
     131|| local        || only mapped in local page table if true (default = False) ||
     132|| big          || to be mapped in one or several big pages (2 Mbytes) ||
     133
     134The supported values for the ''mode'' argument, and for the ''vtype'' arguments are defined in the [source:soft/giet_vm/giet_python/mapping.py mapping.py] file.
     135The ''x'', ''y'', and ''pseg'' define actually the mapping.
     136As a global vseg can be mapped (replicated) in more than one cluster, the local argumentpage tables can be r, the ''local'' argument
     137Any ''vseg'' can be mapped or in a set of consecutive small pages (4 Kbytes), either on a set of consecutives big pages (2 Mbytes).
    91138
    92139== __Python application description__ ==