Changes between Version 13 and Version 14 of mwr_driver

Timestamp:

Apr 8, 2015, 6:20:43 PM (10 years ago)

Author:

alain

Comment:

--

mwr_driver

@@ -7 +7 @@
 
 The vci_mwmr_dma component is a multi-channels DMA controller that can be used to connect an hardware coprocesseur to a VCI interconnect.
-This component provides the coprocessor one or several TO_COPROC or FROM_COPROC FIFO type communication channels, without address.
+This component provides the coprocessor one or several TO_COPROC or FROM_COPROC communication channels, without address.
 Each T0_COPROC/FROM_COPROC port contains an hardware FIFO interface (DATA, R_WOK, W_ROK signals), plus three signals (REQ, ACK, BURSTS) allowing the coprocessor
-to request an integer number of data burst. Each burst contains a fixed number of 32 bits words. The burst length is an hardware parameter.
+to request an integer number of data burst. Each burst contains a fixed number of 32 bits words. For each coprocessor type, the burst length is an hardware parameter.
 
-Each communication channel implements two running modes:
- * in '''MWMR''' mode the channel FSM transfer an infinite" stream of data to or from a MWMR software FIFO, implementing the 7 steps MWMR protocol.
- * in '''DMA''' mode the channel FSM transfer a fixed size chunk of data to or from a memory buffer, with an optional completion signaling interrupt.
+These communication channels implement two running modes:
+ * in '''MWMR''' mode (Multi-Writer / Multi-Reader), the channel FSM transfer an ''infinite'' data stream between the coprocessor and a MWMR software FIFO, implementing the 7 steps MWMR protocol.
+ * in '''DMA''' mode the channel FSM transfer data between the coprocessor and a fixed size memory buffer, with an optional interrupt signaling completion. 
 
-It is an ''internal'' peripheral, that can be replicated in all clusters. Each cluster can contain at most one coprocessor.
+The vci_mwmr_dma component is an ''internal'' peripheral, that can be replicated in all clusters. Each cluster can contain at most one coprocessor.
 
 For the vci_mwmr_dma component, the addressable registers map and the command codes are defined [source:soft/giet_vm/giet_drivers/mwr_driver.h here].