| 1 | #include "../include/Cache.h"
|
|---|
| 2 |
|
|---|
| 3 | namespace environment {
|
|---|
| 4 | namespace cache {
|
|---|
| 5 |
|
|---|
| 6 | // Return the time to have the data
|
|---|
| 7 | // latence is call on the same port in a single cycle, only the last access is save
|
|---|
| 8 | // { NOTE } : type_cache = 0 : icache, 1 : dcache
|
|---|
| 9 | uint32_t Cache::latence (cache_t type_cache,
|
|---|
| 10 | uint32_t num_entity,
|
|---|
| 11 | uint32_t num_port ,
|
|---|
| 12 | uint32_t address ,
|
|---|
| 13 | uint32_t trdid ,
|
|---|
| 14 | type_req_cache_t type ,
|
|---|
| 15 | direction_req_cache_t dir )
|
|---|
| 16 | {
|
|---|
| 17 | if (num_entity >= param->nb_cache_dedicated)
|
|---|
| 18 | {
|
|---|
| 19 | std::cerr << "<Cache.latence> {ERROR} num_entity must be >= nb_cache_dedicated" << std::endl;
|
|---|
| 20 | exit (1);
|
|---|
| 21 | }
|
|---|
| 22 |
|
|---|
| 23 | cache_multilevel::Cache_MultiLevel * cache;
|
|---|
| 24 | cache_multilevel::Parameters * param_cache_dedicated;
|
|---|
| 25 | _cout(CACHE," * Access Cache_Dedicated_");
|
|---|
| 26 | if (type_cache == INSTRUCTION_CACHE)
|
|---|
| 27 | {
|
|---|
| 28 | _cout(CACHE,"Instruction");
|
|---|
| 29 | cache = icache_dedicated [num_entity];
|
|---|
| 30 | param_cache_dedicated = param->param_icache_dedicated [num_entity];
|
|---|
| 31 | }
|
|---|
| 32 | else
|
|---|
| 33 | {
|
|---|
| 34 | _cout(CACHE,"Data");
|
|---|
| 35 | cache = dcache_dedicated [num_entity];
|
|---|
| 36 | param_cache_dedicated = param->param_dcache_dedicated [num_entity];
|
|---|
| 37 | }
|
|---|
| 38 | _cout(CACHE," [%d] - entity : %d, address : 0x%.x\n",num_port,num_entity,address);
|
|---|
| 39 |
|
|---|
| 40 | if (num_port >= cache->param->nb_port)
|
|---|
| 41 | {
|
|---|
| 42 | std::cerr << "<Cache.latence> {ERROR} num_port can be >= nb_port" << std::endl;
|
|---|
| 43 | exit (1);
|
|---|
| 44 | }
|
|---|
| 45 |
|
|---|
| 46 | // Make a access with this level "dedicated"
|
|---|
| 47 | cache_multilevel::Access access_dedicated = cache->access(num_port,address,trdid,type,dir);
|
|---|
| 48 |
|
|---|
| 49 | if (access_dedicated.hit == MISS)
|
|---|
| 50 | {
|
|---|
| 51 | _cout(CACHE," * Access Cache_shared");
|
|---|
| 52 |
|
|---|
| 53 | // Make a access with this level "shared"
|
|---|
| 54 | cache_multilevel::Access access_shared = cache_shared->access(range_port (type_cache,num_entity)+num_port,address,trdid,type,dir);
|
|---|
| 55 |
|
|---|
| 56 | cache_shared->update_access (access_shared);
|
|---|
| 57 |
|
|---|
| 58 | access_dedicated.last_nb_level = param_cache_dedicated->nb_level; // Update all cache
|
|---|
| 59 | access_dedicated.latence += access_shared.latence;
|
|---|
| 60 | }
|
|---|
| 61 |
|
|---|
| 62 | cache->update_access (access_dedicated);
|
|---|
| 63 |
|
|---|
| 64 | _cout(CACHE,"Access latence : %d\n",access_dedicated.latence);
|
|---|
| 65 | return access_dedicated.latence;
|
|---|
| 66 | }
|
|---|
| 67 |
|
|---|
| 68 | };
|
|---|
| 69 | };
|
|---|