1 | #include "../include/Environment.h" |
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2 | |
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3 | namespace environment { |
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4 | |
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5 | Environment::Environment (sc_module_name name, Parameters * param) : |
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6 | name (name) |
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7 | { |
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8 | this->param = param; |
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9 | |
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10 | component_cache = new cache::Cache ("cache", param->param_cache); |
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11 | |
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12 | component_tty = new tty::TTY * [param->nb_component_tty]; |
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13 | for (uint32_t i=0; i<param->nb_component_tty; i++) |
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14 | component_tty [i] = new tty::TTY ("tty_"+i ,param->param_tty [i]); |
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15 | |
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16 | component_ramlock = new ramlock::RamLock * [param->nb_component_ramlock]; |
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17 | for (uint32_t i=0; i<param->nb_component_ramlock; i++) |
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18 | component_ramlock [i] = new ramlock::RamLock ("ramlock_"+i,param->param_ramlock [i]); |
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19 | |
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20 | component_sim2os = new sim2os::Sim2OS ("sim2os" ,param->param_sim2os ); |
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21 | component_data = new data::Data ("data" ,param->param_data ); |
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22 | |
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23 | component_buffer_irsp = new queue::Sort_Queue<irsp_t*> * [param->nb_entity]; |
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24 | component_buffer_drsp = new queue::Sort_Queue<drsp_t*> * [param->nb_entity]; |
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25 | |
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26 | for (uint32_t i=0; i<param->nb_component_tty; i++) |
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27 | { |
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28 | uint32_t tty_size = param->param_tty[i]->nb_tty * 16; |
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29 | |
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30 | data::Entity entity = component_data->entity(param->tty_address[i], tty_size); |
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31 | if (entity.present == false) |
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32 | { |
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33 | std::cerr << "<Environnement::Environnement> The tty [" << i << "] have not a segment in the segment table" << std::endl; |
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34 | exit (1); |
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35 | } |
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36 | entity.segment->define_target(data::TYPE_TARGET_TTY,i); |
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37 | } |
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38 | |
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39 | for (uint32_t i=0; i<param->nb_component_ramlock; i++) |
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40 | { |
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41 | uint32_t ramlock_size = param->param_ramlock[i]->_size; |
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42 | data::Entity entity = component_data->entity(param->ramlock_address[i], ramlock_size); |
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43 | if (entity.present == false) |
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44 | { |
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45 | std::cerr << "<Environnement::Environnement> The ramlock [" << i << "] have not a segment in the segment table" << std::endl; |
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46 | exit (1); |
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47 | } |
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48 | entity.segment->define_target(data::TYPE_TARGET_RAMLOCK,i); |
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49 | } |
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50 | |
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51 | { |
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52 | data::Entity entity = component_data->entity(param->sim2os_address, param->sim2os_size); |
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53 | if (entity.present == false) |
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54 | { |
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55 | std::cerr << "<Environnement::Environnement> The sim2os have not a segment in the segment table" << std::endl; |
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56 | exit (1); |
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57 | } |
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58 | entity.segment->define_target(data::TYPE_TARGET_SIM2OS,0); |
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59 | } |
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60 | |
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61 | |
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62 | |
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63 | |
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64 | for (uint32_t i=0; i<param->nb_entity; i++) |
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65 | { |
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66 | component_buffer_irsp [i] = new queue::Sort_Queue<irsp_t*> ("buffer_irsp_"+i,param->param_buffer_irsp [i]); |
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67 | component_buffer_drsp [i] = new queue::Sort_Queue<drsp_t*> ("buffer_drsp_"+i,param->param_buffer_drsp [i]); |
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68 | } |
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69 | |
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70 | uint32_t max_nb_instruction = morpheo::max<uint32_t>(param->iaccess_nb_instruction ,param->nb_entity); |
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71 | uint32_t max_instruction_size = morpheo::max<uint32_t>(param->iaccess_size_instruction,param->nb_entity); |
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72 | uint32_t max_data_size = morpheo::max<uint32_t>(param->daccess_size_data ,param->nb_entity); |
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73 | |
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74 | read_iram = new char * [max_nb_instruction]; |
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75 | for (uint32_t i=0; i<max_nb_instruction; i++) |
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76 | read_iram [i] = new char [max_instruction_size]; |
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77 | |
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78 | read_dram = new char * [1]; |
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79 | read_dram[0] = new char [max_data_size/8]; |
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80 | write_dram = new char [max_data_size/8]; |
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81 | |
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82 | // Port |
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83 | CLOCK = new sc_in_clk ("CLOCK "); |
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84 | NRESET = new sc_in<bool> ("NRESET"); |
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85 | |
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86 | ICACHE_REQ_VAL = new sc_in <Tcontrol_t > ** [param->nb_entity]; |
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87 | ICACHE_REQ_ACK = new sc_out<Tcontrol_t > ** [param->nb_entity]; |
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88 | ICACHE_REQ_CONTEXT_ID = new sc_in <Ticache_context_t > ** [param->nb_entity]; |
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89 | ICACHE_REQ_PACKET_ID = new sc_in <Ticache_packet_t > ** [param->nb_entity]; |
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90 | ICACHE_REQ_ADDRESS = new sc_in <Ticache_address_t > ** [param->nb_entity]; |
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91 | ICACHE_REQ_TYPE = new sc_in <Ticache_type_t > ** [param->nb_entity]; |
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92 | |
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93 | ICACHE_RSP_VAL = new sc_out<Tcontrol_t > ** [param->nb_entity]; |
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94 | ICACHE_RSP_ACK = new sc_in <Tcontrol_t > ** [param->nb_entity]; |
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95 | ICACHE_RSP_CONTEXT_ID = new sc_out<Ticache_context_t > ** [param->nb_entity]; |
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96 | ICACHE_RSP_PACKET_ID = new sc_out<Ticache_packet_t > ** [param->nb_entity]; |
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97 | |
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98 | ICACHE_RSP_INSTRUCTION= new sc_out<Ticache_instruction_t> *** [param->nb_entity];//[nb_instruction] |
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99 | ICACHE_RSP_ERROR = new sc_out<Ticache_error_t > ** [param->nb_entity]; |
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100 | |
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101 | DCACHE_REQ_VAL = new sc_in <Tcontrol_t > ** [param->nb_entity]; |
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102 | DCACHE_REQ_ACK = new sc_out<Tcontrol_t > ** [param->nb_entity]; |
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103 | DCACHE_REQ_CONTEXT_ID = new sc_in <Tdcache_context_t > ** [param->nb_entity]; |
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104 | DCACHE_REQ_PACKET_ID = new sc_in <Tdcache_packet_t > ** [param->nb_entity]; |
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105 | DCACHE_REQ_ADDRESS = new sc_in <Tdcache_address_t > ** [param->nb_entity]; |
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106 | DCACHE_REQ_TYPE = new sc_in <Tdcache_type_t > ** [param->nb_entity]; |
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107 | DCACHE_REQ_WDATA = new sc_in <Tdcache_data_t > ** [param->nb_entity]; |
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108 | |
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109 | DCACHE_RSP_VAL = new sc_out<Tcontrol_t > ** [param->nb_entity]; |
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110 | DCACHE_RSP_ACK = new sc_in <Tcontrol_t > ** [param->nb_entity]; |
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111 | DCACHE_RSP_CONTEXT_ID = new sc_out<Tdcache_context_t > ** [param->nb_entity]; |
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112 | DCACHE_RSP_PACKET_ID = new sc_out<Tdcache_packet_t > ** [param->nb_entity]; |
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113 | DCACHE_RSP_RDATA = new sc_out<Tdcache_data_t > ** [param->nb_entity]; |
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114 | DCACHE_RSP_ERROR = new sc_out<Tdcache_error_t > ** [param->nb_entity]; |
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115 | |
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116 | for (uint32_t i=0; i<param->nb_entity; i++) |
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117 | { |
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118 | ICACHE_REQ_VAL [i] = new sc_in <Tcontrol_t > * [param->icache_dedicated_nb_port[i]]; |
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119 | ICACHE_REQ_ACK [i] = new sc_out<Tcontrol_t > * [param->icache_dedicated_nb_port[i]]; |
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120 | ICACHE_REQ_CONTEXT_ID [i] = new sc_in <Ticache_context_t > * [param->icache_dedicated_nb_port[i]]; |
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121 | ICACHE_REQ_PACKET_ID [i] = new sc_in <Ticache_packet_t > * [param->icache_dedicated_nb_port[i]]; |
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122 | ICACHE_REQ_ADDRESS [i] = new sc_in <Ticache_address_t > * [param->icache_dedicated_nb_port[i]]; |
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123 | ICACHE_REQ_TYPE [i] = new sc_in <Ticache_type_t > * [param->icache_dedicated_nb_port[i]]; |
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124 | |
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125 | ICACHE_RSP_VAL [i] = new sc_out<Tcontrol_t > * [param->icache_dedicated_nb_port[i]]; |
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126 | ICACHE_RSP_ACK [i] = new sc_in <Tcontrol_t > * [param->icache_dedicated_nb_port[i]]; |
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127 | ICACHE_RSP_CONTEXT_ID [i] = new sc_out<Ticache_context_t > * [param->icache_dedicated_nb_port[i]]; |
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128 | ICACHE_RSP_PACKET_ID [i] = new sc_out<Ticache_packet_t > * [param->icache_dedicated_nb_port[i]]; |
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129 | ICACHE_RSP_INSTRUCTION[i] = new sc_out<Ticache_instruction_t> ** [param->icache_dedicated_nb_port[i]];//[nb_instruction] |
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130 | ICACHE_RSP_ERROR [i] = new sc_out<Ticache_error_t > * [param->icache_dedicated_nb_port[i]]; |
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131 | |
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132 | for (uint32_t j=0; j<param->icache_dedicated_nb_port[i]; j++) |
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133 | { |
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134 | ICACHE_REQ_VAL [i][j] = new sc_in <Tcontrol_t > (""); |
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135 | ICACHE_REQ_ACK [i][j] = new sc_out<Tcontrol_t > (""); |
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136 | ICACHE_REQ_CONTEXT_ID [i][j] = new sc_in <Ticache_context_t > (""); |
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137 | ICACHE_REQ_PACKET_ID [i][j] = new sc_in <Ticache_packet_t > (""); |
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138 | ICACHE_REQ_ADDRESS [i][j] = new sc_in <Ticache_address_t > (""); |
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139 | ICACHE_REQ_TYPE [i][j] = new sc_in <Ticache_type_t > (""); |
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140 | |
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141 | ICACHE_RSP_VAL [i][j] = new sc_out<Tcontrol_t > (""); |
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142 | ICACHE_RSP_ACK [i][j] = new sc_in <Tcontrol_t > (""); |
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143 | ICACHE_RSP_CONTEXT_ID [i][j] = new sc_out<Ticache_context_t > (""); |
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144 | ICACHE_RSP_PACKET_ID [i][j] = new sc_out<Ticache_packet_t > (""); |
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145 | ICACHE_RSP_ERROR [i][j] = new sc_out<Ticache_error_t > (""); |
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146 | |
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147 | ICACHE_RSP_INSTRUCTION [i][j] = new sc_out<Ticache_instruction_t> * [param->iaccess_nb_instruction[i]]; |
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148 | |
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149 | for (uint32_t k=0; k<param->iaccess_nb_instruction[i]; k++) |
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150 | ICACHE_RSP_INSTRUCTION [i][j][k] = new sc_out<Ticache_instruction_t> (""); |
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151 | } |
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152 | |
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153 | DCACHE_REQ_VAL [i] = new sc_in <Tcontrol_t > * [param->dcache_dedicated_nb_port[i]]; |
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154 | DCACHE_REQ_ACK [i] = new sc_out<Tcontrol_t > * [param->dcache_dedicated_nb_port[i]]; |
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155 | DCACHE_REQ_CONTEXT_ID [i] = new sc_in <Tdcache_context_t > * [param->dcache_dedicated_nb_port[i]]; |
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156 | DCACHE_REQ_PACKET_ID [i] = new sc_in <Tdcache_packet_t > * [param->dcache_dedicated_nb_port[i]]; |
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157 | DCACHE_REQ_ADDRESS [i] = new sc_in <Tdcache_address_t > * [param->dcache_dedicated_nb_port[i]]; |
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158 | DCACHE_REQ_TYPE [i] = new sc_in <Tdcache_type_t > * [param->dcache_dedicated_nb_port[i]]; |
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159 | DCACHE_REQ_WDATA [i] = new sc_in <Tdcache_data_t > * [param->dcache_dedicated_nb_port[i]]; |
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160 | |
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161 | DCACHE_RSP_VAL [i] = new sc_out<Tcontrol_t > * [param->dcache_dedicated_nb_port[i]]; |
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162 | DCACHE_RSP_ACK [i] = new sc_in <Tcontrol_t > * [param->dcache_dedicated_nb_port[i]]; |
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163 | DCACHE_RSP_CONTEXT_ID [i] = new sc_out<Tdcache_context_t > * [param->dcache_dedicated_nb_port[i]]; |
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164 | DCACHE_RSP_PACKET_ID [i] = new sc_out<Tdcache_packet_t > * [param->dcache_dedicated_nb_port[i]]; |
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165 | DCACHE_RSP_RDATA [i] = new sc_out<Tdcache_data_t > * [param->dcache_dedicated_nb_port[i]]; |
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166 | DCACHE_RSP_ERROR [i] = new sc_out<Tdcache_error_t > * [param->dcache_dedicated_nb_port[i]]; |
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167 | |
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168 | for (uint32_t j=0; j<param->dcache_dedicated_nb_port[i]; j++) |
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169 | { |
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170 | DCACHE_REQ_VAL [i][j] = new sc_in <Tcontrol_t > (""); |
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171 | DCACHE_REQ_ACK [i][j] = new sc_out<Tcontrol_t > (""); |
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172 | DCACHE_REQ_CONTEXT_ID [i][j] = new sc_in <Tdcache_context_t > (""); |
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173 | DCACHE_REQ_PACKET_ID [i][j] = new sc_in <Tdcache_packet_t > (""); |
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174 | DCACHE_REQ_ADDRESS [i][j] = new sc_in <Tdcache_address_t > (""); |
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175 | DCACHE_REQ_TYPE [i][j] = new sc_in <Tdcache_type_t > (""); |
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176 | DCACHE_REQ_WDATA [i][j] = new sc_in <Tdcache_data_t > (""); |
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177 | |
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178 | DCACHE_RSP_VAL [i][j] = new sc_out<Tcontrol_t > (""); |
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179 | DCACHE_RSP_ACK [i][j] = new sc_in <Tcontrol_t > (""); |
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180 | DCACHE_RSP_CONTEXT_ID [i][j] = new sc_out<Tdcache_context_t > (""); |
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181 | DCACHE_RSP_PACKET_ID [i][j] = new sc_out<Tdcache_packet_t > (""); |
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182 | DCACHE_RSP_RDATA [i][j] = new sc_out<Tdcache_data_t > (""); |
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183 | DCACHE_RSP_ERROR [i][j] = new sc_out<Tdcache_error_t > (""); |
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184 | } |
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185 | } |
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186 | |
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187 | icache_req_ack = new Tcontrol_t * [param->nb_entity]; |
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188 | icache_rsp_val = new Tcontrol_t * [param->nb_entity]; |
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189 | dcache_req_ack = new Tcontrol_t * [param->nb_entity]; |
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190 | dcache_rsp_val = new Tcontrol_t * [param->nb_entity]; |
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191 | |
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192 | for (uint32_t i=0; i<param->nb_entity; i++) |
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193 | { |
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194 | icache_req_ack [i] = new Tcontrol_t [param->icache_dedicated_nb_port[i]]; |
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195 | icache_rsp_val [i] = new Tcontrol_t [param->icache_dedicated_nb_port[i]]; |
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196 | dcache_req_ack [i] = new Tcontrol_t [param->dcache_dedicated_nb_port[i]]; |
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197 | dcache_rsp_val [i] = new Tcontrol_t [param->dcache_dedicated_nb_port[i]]; |
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198 | } |
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199 | // *****[ Definition of method ]***** |
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200 | SC_METHOD (transition); |
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201 | dont_initialize (); |
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202 | sensitive << (*(CLOCK)).pos(); |
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203 | |
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204 | SC_METHOD (genMoore); |
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205 | dont_initialize (); |
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206 | sensitive << (*(CLOCK)).neg(); |
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207 | } |
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208 | |
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209 | Environment::~Environment (void) |
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210 | { |
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211 | for (uint32_t i=0; i<param->nb_entity; i++) |
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212 | { |
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213 | delete [] icache_req_ack [i]; |
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214 | delete [] icache_rsp_val [i]; |
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215 | delete [] dcache_req_ack [i]; |
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216 | delete [] dcache_rsp_val [i]; |
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217 | } |
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218 | |
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219 | delete [] icache_req_ack; |
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220 | delete [] icache_rsp_val; |
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221 | delete [] dcache_req_ack; |
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222 | delete [] dcache_rsp_val; |
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223 | |
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224 | delete CLOCK ; |
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225 | delete NRESET; |
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226 | |
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227 | for (uint32_t i=0; i<param->nb_entity; i++) |
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228 | { |
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229 | for (uint32_t j=0; j<param->icache_dedicated_nb_port[i]; j++) |
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230 | { |
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231 | delete ICACHE_REQ_VAL [i][j]; |
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232 | delete ICACHE_REQ_ACK [i][j]; |
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233 | delete ICACHE_REQ_CONTEXT_ID [i][j]; |
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234 | delete ICACHE_REQ_PACKET_ID [i][j]; |
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235 | delete ICACHE_REQ_ADDRESS [i][j]; |
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236 | delete ICACHE_REQ_TYPE [i][j]; |
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237 | delete ICACHE_RSP_VAL [i][j]; |
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238 | delete ICACHE_RSP_ACK [i][j]; |
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239 | delete ICACHE_RSP_CONTEXT_ID [i][j]; |
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240 | delete ICACHE_RSP_PACKET_ID [i][j]; |
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241 | delete ICACHE_RSP_ERROR [i][j]; |
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242 | |
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243 | for (uint32_t k=0; k<param->iaccess_nb_instruction[i]; k++) |
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244 | delete ICACHE_RSP_INSTRUCTION [i][j][k]; |
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245 | |
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246 | delete [] ICACHE_RSP_INSTRUCTION [i][j]; |
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247 | } |
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248 | delete [] ICACHE_REQ_VAL [i]; |
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249 | delete [] ICACHE_REQ_ACK [i]; |
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250 | delete [] ICACHE_REQ_CONTEXT_ID [i]; |
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251 | delete [] ICACHE_REQ_PACKET_ID [i]; |
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252 | delete [] ICACHE_REQ_ADDRESS [i]; |
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253 | delete [] ICACHE_REQ_TYPE [i]; |
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254 | delete [] ICACHE_RSP_VAL [i]; |
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255 | delete [] ICACHE_RSP_ACK [i]; |
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256 | delete [] ICACHE_RSP_CONTEXT_ID [i]; |
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257 | delete [] ICACHE_RSP_PACKET_ID [i]; |
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258 | delete [] ICACHE_RSP_ERROR [i]; |
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259 | delete [] ICACHE_RSP_INSTRUCTION [i]; |
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260 | } |
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261 | |
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262 | delete [] ICACHE_REQ_VAL ; |
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263 | delete [] ICACHE_REQ_ACK ; |
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264 | delete [] ICACHE_REQ_CONTEXT_ID ; |
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265 | delete [] ICACHE_REQ_PACKET_ID ; |
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266 | delete [] ICACHE_REQ_ADDRESS ; |
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267 | delete [] ICACHE_REQ_TYPE ; |
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268 | delete [] ICACHE_RSP_VAL ; |
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269 | delete [] ICACHE_RSP_ACK ; |
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270 | delete [] ICACHE_RSP_CONTEXT_ID ; |
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271 | delete [] ICACHE_RSP_PACKET_ID ; |
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272 | delete [] ICACHE_RSP_INSTRUCTION; |
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273 | delete [] ICACHE_RSP_ERROR ; |
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274 | |
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275 | for (uint32_t i=0; i<param->nb_entity; i++) |
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276 | { |
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277 | for (uint32_t j=0; j<param->icache_dedicated_nb_port[i]; j++) |
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278 | { |
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279 | delete DCACHE_REQ_VAL [i][j]; |
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280 | delete DCACHE_REQ_ACK [i][j]; |
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281 | delete DCACHE_REQ_CONTEXT_ID [i][j]; |
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282 | delete DCACHE_REQ_PACKET_ID [i][j]; |
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283 | delete DCACHE_REQ_ADDRESS [i][j]; |
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284 | delete DCACHE_REQ_TYPE [i][j]; |
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285 | delete DCACHE_REQ_WDATA [i][j]; |
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286 | delete DCACHE_RSP_VAL [i][j]; |
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287 | delete DCACHE_RSP_ACK [i][j]; |
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288 | delete DCACHE_RSP_CONTEXT_ID [i][j]; |
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289 | delete DCACHE_RSP_PACKET_ID [i][j]; |
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290 | delete DCACHE_RSP_RDATA [i][j]; |
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291 | delete DCACHE_RSP_ERROR [i][j]; |
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292 | } |
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293 | |
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294 | delete [] DCACHE_REQ_VAL [i]; |
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295 | delete [] DCACHE_REQ_ACK [i]; |
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296 | delete [] DCACHE_REQ_CONTEXT_ID [i]; |
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297 | delete [] DCACHE_REQ_PACKET_ID [i]; |
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298 | delete [] DCACHE_REQ_ADDRESS [i]; |
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299 | delete [] DCACHE_REQ_TYPE [i]; |
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300 | delete [] DCACHE_REQ_WDATA [i]; |
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301 | delete [] DCACHE_RSP_VAL [i]; |
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302 | delete [] DCACHE_RSP_ACK [i]; |
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303 | delete [] DCACHE_RSP_CONTEXT_ID [i]; |
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304 | delete [] DCACHE_RSP_PACKET_ID [i]; |
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305 | delete [] DCACHE_RSP_RDATA [i]; |
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306 | delete [] DCACHE_RSP_ERROR [i]; |
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307 | } |
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308 | |
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309 | delete [] DCACHE_REQ_VAL ; |
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310 | delete [] DCACHE_REQ_ACK ; |
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311 | delete [] DCACHE_REQ_CONTEXT_ID ; |
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312 | delete [] DCACHE_REQ_PACKET_ID ; |
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313 | delete [] DCACHE_REQ_ADDRESS ; |
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314 | delete [] DCACHE_REQ_TYPE ; |
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315 | delete [] DCACHE_REQ_WDATA ; |
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316 | delete [] DCACHE_RSP_VAL ; |
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317 | delete [] DCACHE_RSP_ACK ; |
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318 | delete [] DCACHE_RSP_CONTEXT_ID ; |
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319 | delete [] DCACHE_RSP_PACKET_ID ; |
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320 | delete [] DCACHE_RSP_RDATA ; |
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321 | delete [] DCACHE_RSP_ERROR ; |
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322 | |
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323 | delete [] write_dram; |
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324 | delete [] read_dram [0]; |
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325 | delete [] read_dram; |
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326 | |
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327 | uint32_t max_nb_instruction = morpheo::max<uint32_t>(param->iaccess_nb_instruction,param->nb_entity); |
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328 | for (uint32_t i=0; i<max_nb_instruction; i++) |
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329 | delete [] read_iram [i]; |
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330 | delete [] read_iram; |
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331 | |
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332 | for (uint32_t i=0; i<param->nb_entity; i++) |
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333 | { |
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334 | while (not component_buffer_irsp [i]->empty()) |
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335 | { |
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336 | delete component_buffer_irsp [i]->read(0)._data; |
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337 | component_buffer_irsp [i]->pop(); |
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338 | } |
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339 | while (not component_buffer_drsp [i]->empty()) |
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340 | { |
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341 | delete component_buffer_drsp [i]->read(0)._data; |
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342 | component_buffer_drsp [i]->pop(); |
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343 | } |
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344 | |
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345 | delete component_buffer_irsp [i]; |
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346 | delete component_buffer_drsp [i]; |
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347 | } |
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348 | delete [] component_buffer_irsp; |
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349 | delete [] component_buffer_drsp; |
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350 | |
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351 | delete component_data; |
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352 | delete component_sim2os; |
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353 | for (uint32_t i=0; i<param->nb_component_ramlock; i++) |
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354 | delete component_ramlock [i]; |
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355 | delete [] component_ramlock; |
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356 | for (uint32_t i=0; i<param->nb_component_tty; i++) |
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357 | delete component_tty [i]; |
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358 | delete [] component_tty; |
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359 | delete component_cache; |
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360 | |
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361 | } |
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362 | |
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363 | }; |
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