Last change
on this file since 78 was
78,
checked in by rosiere, 16 years ago
|
Add :
- Execute_loop (must be test systemC)
- Prediction
- Direction : predifined scheme
- Branch Target Buffer
- iFetch_unit
- ifetch_queue
- pc management
- Decod_unit
- coming soon : support for custom operation
- Rename_unit
- RAT
- Free_list
- Dependence RAW check
- Load store unit pointer
- New Environnement (hierarchy_memory will remove in a next version)
Modif :
- Manage Custom Operation
- All component in execute_loop to use the new statistics management
Not Finish :
- Return Address Stack
- Environnement
|
File size:
1.4 KB
|
Rev | Line | |
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[78] | 1 | #ifndef ENVIRONNEMENT_CACHE_TYPES_H |
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| 2 | #define ENVIRONNEMENT_CACHE_TYPES_H |
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| 3 | |
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| 4 | namespace environnement { |
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| 5 | namespace cache { |
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| 6 | |
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| 7 | // ===================================================== |
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| 8 | // =====[ CACHE ]======================================= |
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| 9 | // ===================================================== |
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| 10 | |
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| 11 | typedef enum |
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| 12 | { |
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| 13 | INSTRUCTION_CACHE , |
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| 14 | DATA_CACHE |
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| 15 | } cache_t; |
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| 16 | |
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| 17 | // ===================================================== |
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| 18 | // =====[ DIRECTION ]=================================== |
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| 19 | // ===================================================== |
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| 20 | |
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| 21 | typedef enum |
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| 22 | { |
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| 23 | READ , |
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| 24 | WRITE , |
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| 25 | NONE |
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| 26 | } direction_req_cache_t; |
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| 27 | |
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| 28 | // ===================================================== |
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| 29 | // =====[ REQUEST ]===================================== |
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| 30 | // ===================================================== |
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| 31 | |
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| 32 | typedef enum |
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| 33 | { |
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| 34 | CACHED , // address can be in the cache |
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| 35 | UNCACHED , // Always miss (not address in cache) |
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| 36 | INVALIDATE , // The direction is not used |
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| 37 | PREFETCH , // The direction is not used |
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| 38 | FLUSH // The direction is not used |
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| 39 | } type_req_cache_t; |
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| 40 | |
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| 41 | // ===================================================== |
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| 42 | // =====[ RESPONS ]===================================== |
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| 43 | // ===================================================== |
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| 44 | |
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| 45 | typedef enum |
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| 46 | { |
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| 47 | HIT_CACHE , |
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| 48 | HIT_BYPASS , |
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| 49 | HIT_WRITE_BUFFER , |
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| 50 | MISS |
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| 51 | } type_rsp_cache_t; |
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| 52 | |
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| 53 | }; |
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| 54 | }; |
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| 55 | #endif |
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