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[2] | 1 | #ifndef ACCESS_PORT_H |
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| 2 | #define ACCESS_PORT_H |
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| 3 | |
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| 4 | #include "address.h" |
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| 5 | #include "type_rsp_cache.h" |
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| 6 | #include <iostream> |
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| 7 | using namespace std; |
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| 8 | |
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| 9 | namespace hierarchy_memory { |
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| 10 | namespace cache { |
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| 11 | namespace cache_multilevel { |
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| 12 | namespace cache_onelevel { |
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| 13 | |
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| 14 | class access_port_t |
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| 15 | { |
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| 16 | public : bool valid; |
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| 17 | public : address_t address; |
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| 18 | public : uint32_t trdid; |
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| 19 | public : type_rsp_cache_t hit; |
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| 20 | public : uint32_t num_associativity; // on hit : update lru |
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| 21 | public : uint32_t latence; // on miss : wait |
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| 22 | |
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| 23 | friend ostream& operator<< (ostream& output_stream, const access_port_t &x) |
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| 24 | { |
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| 25 | output_stream << x.valid << " " |
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| 26 | << x.hit << " " |
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| 27 | << x.address << " " |
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| 28 | << x.trdid << " " |
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| 29 | << x.num_associativity << " " |
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| 30 | << x.latence; |
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| 31 | |
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| 32 | return output_stream; |
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| 33 | } |
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| 34 | |
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| 35 | }; |
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| 36 | |
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| 37 | };};};}; |
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| 38 | |
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| 39 | #endif //!ACCESS_PORT_H |
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