[88] | 1 | /* |
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| 2 | * $Id: Dcache_Access.cpp 88 2008-12-10 18:31:39Z rosiere $ |
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| 3 | * |
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| 4 | * [ Description ] |
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| 5 | * |
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| 6 | */ |
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| 7 | |
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| 8 | #include "Behavioural/Core/Dcache_Access/include/Dcache_Access.h" |
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| 9 | |
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| 10 | namespace morpheo { |
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| 11 | namespace behavioural { |
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| 12 | namespace core { |
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| 13 | namespace dcache_access { |
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| 14 | |
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| 15 | |
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| 16 | #undef FUNCTION |
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| 17 | #define FUNCTION "Dcache_Access::Dcache_Access" |
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| 18 | Dcache_Access::Dcache_Access |
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| 19 | ( |
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| 20 | #ifdef SYSTEMC |
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| 21 | sc_module_name name, |
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| 22 | #else |
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| 23 | string name, |
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| 24 | #endif |
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| 25 | #ifdef STATISTICS |
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| 26 | morpheo::behavioural::Parameters_Statistics * param_statistics, |
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| 27 | #endif |
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| 28 | morpheo::behavioural::core::dcache_access::Parameters * param, |
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| 29 | morpheo::behavioural::Tusage_t usage |
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| 30 | ): |
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| 31 | _name (name) |
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| 32 | ,_param (param) |
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| 33 | ,_usage (usage) |
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| 34 | { |
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| 35 | log_begin(Dcache_Access,FUNCTION); |
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| 36 | |
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| 37 | usage_environment(_usage); |
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| 38 | |
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| 39 | #if DEBUG_Dcache_Access == true |
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| 40 | log_printf(INFO,Dcache_Access,FUNCTION,_("<%s> Parameters"),_name.c_str()); |
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| 41 | |
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| 42 | std::cout << *param << std::endl; |
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| 43 | #endif |
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| 44 | |
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| 45 | log_printf(INFO,Dcache_Access,FUNCTION,_("<%s> : Allocation"),_name.c_str()); |
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| 46 | |
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| 47 | allocation ( |
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| 48 | #ifdef STATISTICS |
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| 49 | param_statistics |
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| 50 | #endif |
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| 51 | ); |
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| 52 | |
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| 53 | #ifdef STATISTICS |
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| 54 | if (usage_is_set(_usage,USE_STATISTICS)) |
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| 55 | { |
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| 56 | log_printf(INFO,Dcache_Access,FUNCTION,_("<%s> : Allocation of statistics"),_name.c_str()); |
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| 57 | |
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| 58 | statistics_allocation(param_statistics); |
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| 59 | } |
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| 60 | #endif |
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| 61 | |
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| 62 | #ifdef VHDL |
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| 63 | if (usage_is_set(_usage,USE_VHDL)) |
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| 64 | { |
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| 65 | // generate the vhdl |
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| 66 | log_printf(INFO,Dcache_Access,FUNCTION,_("<%s> : Generate the vhdl"),_name.c_str()); |
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| 67 | |
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| 68 | vhdl(); |
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| 69 | } |
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| 70 | #endif |
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| 71 | |
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| 72 | #ifdef SYSTEMC |
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| 73 | if (usage_is_set(_usage,USE_SYSTEMC)) |
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| 74 | { |
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| 75 | log_printf(INFO,Dcache_Access,FUNCTION,_("<%s> : Method - transition"),_name.c_str()); |
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| 76 | |
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| 77 | SC_METHOD (transition); |
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| 78 | dont_initialize (); |
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| 79 | sensitive << (*(in_CLOCK)).pos(); |
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| 80 | |
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| 81 | # ifdef SYSTEMCASS_SPECIFIC |
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| 82 | // List dependency information |
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| 83 | # endif |
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| 84 | |
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| 85 | // log_printf(INFO,Dcache_Access,FUNCTION,_("<%s> : Method - genMoore"),_name.c_str()); |
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| 86 | |
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| 87 | // SC_METHOD (genMoore); |
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| 88 | // dont_initialize (); |
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| 89 | // sensitive << (*(in_CLOCK)).neg(); // need internal register |
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| 90 | |
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| 91 | // # ifdef SYSTEMCASS_SPECIFIC |
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| 92 | // // List dependency information |
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| 93 | // # endif |
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| 94 | |
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| 95 | log_printf(INFO,Dcache_Access,FUNCTION,_("<%s> : Method - genMealy_req"),_name.c_str()); |
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| 96 | |
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| 97 | SC_METHOD (genMealy_req); |
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| 98 | dont_initialize (); |
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| 99 | sensitive << (*(in_CLOCK)).neg(); // need internal register |
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| 100 | for (uint32_t i=0; i<_param->_nb_dcache_port; ++i) |
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| 101 | sensitive << (*(in_DCACHE_REQ_ACK [i])); |
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| 102 | for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) |
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| 103 | for (uint32_t j=0; j<_param->_nb_load_store_unit[i]; ++j) |
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| 104 | for (uint32_t k=0; k<_param->_nb_cache_access [i][j]; ++k) |
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| 105 | { |
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| 106 | sensitive << (*(in_LSQ_REQ_VAL [i][j][k])) |
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| 107 | << (*(in_LSQ_REQ_ADDRESS [i][j][k])) |
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| 108 | << (*(in_LSQ_REQ_WDATA [i][j][k])) |
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| 109 | << (*(in_LSQ_REQ_TYPE [i][j][k])); |
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| 110 | |
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| 111 | if (_param->_have_port_lsq_thread_id [i][j]) |
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| 112 | sensitive << (*(in_LSQ_REQ_THREAD_ID [i][j][k])); |
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| 113 | if (_param->_have_port_lsq_packet_id [i][j]) |
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| 114 | sensitive << (*(in_LSQ_REQ_PACKET_ID [i][j][k])); |
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| 115 | } |
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| 116 | |
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| 117 | |
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| 118 | # ifdef SYSTEMCASS_SPECIFIC |
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| 119 | // List dependency information |
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| 120 | # endif |
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| 121 | |
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| 122 | log_printf(INFO,Dcache_Access,FUNCTION,_("<%s> : Method - genMealy_rsp"),_name.c_str()); |
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| 123 | |
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| 124 | SC_METHOD (genMealy_rsp); |
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| 125 | dont_initialize (); |
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| 126 | sensitive << (*(in_CLOCK)).neg(); // need internal register |
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| 127 | |
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| 128 | for (uint32_t i=0; i<_param->_nb_dcache_port; ++i) |
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| 129 | { |
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| 130 | sensitive << (*(in_DCACHE_RSP_VAL [i])) |
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| 131 | << (*(in_DCACHE_RSP_RDATA [i])) |
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| 132 | << (*(in_DCACHE_RSP_ERROR [i])); |
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| 133 | if (_param->_have_port_dcache_thread_id) |
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| 134 | sensitive << (*(in_DCACHE_RSP_THREAD_ID [i])); |
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| 135 | if (_param->_have_port_dcache_packet_id) |
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| 136 | sensitive << (*(in_DCACHE_RSP_PACKET_ID [i])); |
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| 137 | |
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| 138 | } |
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| 139 | for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) |
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| 140 | for (uint32_t j=0; j<_param->_nb_load_store_unit[i]; ++j) |
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| 141 | for (uint32_t k=0; k<_param->_nb_cache_access [i][j]; ++k) |
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| 142 | sensitive << (*(in_LSQ_RSP_ACK [i][j][k])); |
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| 143 | |
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| 144 | |
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| 145 | |
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| 146 | # ifdef SYSTEMCASS_SPECIFIC |
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| 147 | // List dependency information |
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| 148 | # endif |
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| 149 | |
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| 150 | #endif |
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| 151 | } |
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| 152 | log_end(Dcache_Access,FUNCTION); |
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| 153 | }; |
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| 154 | |
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| 155 | #undef FUNCTION |
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| 156 | #define FUNCTION "Dcache_Access::~Dcache_Access" |
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| 157 | Dcache_Access::~Dcache_Access (void) |
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| 158 | { |
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| 159 | log_begin(Dcache_Access,FUNCTION); |
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| 160 | |
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| 161 | #ifdef STATISTICS |
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| 162 | if (usage_is_set(_usage,USE_STATISTICS)) |
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| 163 | { |
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| 164 | statistics_deallocation(); |
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| 165 | } |
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| 166 | #endif |
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| 167 | |
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| 168 | log_printf(INFO,Dcache_Access,FUNCTION,_("<%s> : Deallocation"),_name.c_str()); |
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| 169 | deallocation (); |
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| 170 | |
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| 171 | log_end(Dcache_Access,FUNCTION); |
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| 172 | }; |
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| 173 | |
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| 174 | }; // end namespace dcache_access |
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| 175 | }; // end namespace core |
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| 176 | |
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| 177 | }; // end namespace behavioural |
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| 178 | }; // end namespace morpheo |
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