1 | /* |
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2 | * $Id: Dcache_Access_allocation.cpp 88 2008-12-10 18:31:39Z rosiere $ |
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3 | * |
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4 | * [ Description ] |
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5 | * |
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6 | */ |
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7 | |
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8 | #include "Behavioural/Core/Dcache_Access/include/Dcache_Access.h" |
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9 | #include "Behavioural/include/Allocation.h" |
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10 | #include "Common/include/Max.h" |
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11 | |
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12 | namespace morpheo { |
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13 | namespace behavioural { |
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14 | namespace core { |
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15 | namespace dcache_access { |
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16 | |
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17 | |
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18 | |
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19 | #undef FUNCTION |
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20 | #define FUNCTION "Dcache_Access::allocation" |
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21 | void Dcache_Access::allocation ( |
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22 | #ifdef STATISTICS |
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23 | morpheo::behavioural::Parameters_Statistics * param_statistics |
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24 | #else |
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25 | void |
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26 | #endif |
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27 | ) |
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28 | { |
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29 | log_begin(Dcache_Access,FUNCTION); |
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30 | |
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31 | _component = new Component (_usage); |
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32 | |
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33 | Entity * entity = _component->set_entity (_name |
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34 | ,"Dcache_Access" |
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35 | #ifdef POSITION |
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36 | ,COMBINATORY |
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37 | #endif |
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38 | ); |
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39 | |
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40 | _interfaces = entity->set_interfaces(); |
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41 | |
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42 | // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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43 | { |
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44 | Interface * interface = _interfaces->set_interface("" |
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45 | #ifdef POSITION |
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46 | ,IN |
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47 | ,SOUTH, |
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48 | _("Generalist interface") |
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49 | #endif |
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50 | ); |
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51 | |
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52 | in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); |
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53 | in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES); |
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54 | } |
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55 | |
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56 | // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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57 | { |
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58 | ALLOC1_INTERFACE("dcache_req", OUT, NORTH, _("Request to data cache"),_param->_nb_dcache_port); |
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59 | |
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60 | ALLOC1_VALACK_OUT(out_DCACHE_REQ_VAL ,VAL); |
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61 | ALLOC1_VALACK_IN ( in_DCACHE_REQ_ACK ,ACK); |
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62 | ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_THREAD_ID ,"thread_id",Tcontext_t ,_param->_size_dcache_thread_id); |
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63 | ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_PACKET_ID ,"packet_id",Tpacket_t ,_param->_size_dcache_packet_id); |
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64 | ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_ADDRESS ,"address" ,Tdcache_address_t ,_param->_size_address); |
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65 | ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_WDATA ,"wdata" ,Tdcache_data_t ,_param->_size_data); |
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66 | ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_TYPE ,"type" ,Tdcache_type_t ,_param->_size_dcache_type); |
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67 | } |
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68 | |
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69 | // ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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70 | { |
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71 | ALLOC1_INTERFACE("dcache_rsp", IN , NORTH, _("Respons from data cache"),_param->_nb_dcache_port); |
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72 | |
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73 | ALLOC1_VALACK_IN ( in_DCACHE_RSP_VAL ,VAL); |
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74 | ALLOC1_VALACK_OUT(out_DCACHE_RSP_ACK ,ACK); |
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75 | ALLOC1_SIGNAL_IN ( in_DCACHE_RSP_THREAD_ID ,"thread_id",Tcontext_t ,_param->_size_dcache_thread_id); |
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76 | ALLOC1_SIGNAL_IN ( in_DCACHE_RSP_PACKET_ID ,"packet_id",Tpacket_t ,_param->_size_dcache_packet_id); |
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77 | ALLOC1_SIGNAL_IN ( in_DCACHE_RSP_RDATA ,"rdata" ,Tdcache_data_t ,_param->_size_data); |
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78 | ALLOC1_SIGNAL_IN ( in_DCACHE_RSP_ERROR ,"error" ,Tdcache_error_t ,_param->_size_dcache_error); |
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79 | } |
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80 | |
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81 | // ~~~~~[ Interface "lsq_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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82 | { |
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83 | ALLOC3_INTERFACE("lsq_req", IN, SOUTH, _("Request from load_store queue"), _param->_nb_execute_loop, _param->_nb_load_store_unit[it1], _param->_nb_cache_access[it1][it2]); |
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84 | |
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85 | _ALLOC3_VALACK_IN ( in_LSQ_REQ_VAL ,VAL, _param->_nb_execute_loop, _param->_nb_load_store_unit[it1], _param->_nb_cache_access[it1][it2]); |
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86 | _ALLOC3_VALACK_OUT(out_LSQ_REQ_ACK ,ACK, _param->_nb_execute_loop, _param->_nb_load_store_unit[it1], _param->_nb_cache_access[it1][it2]); |
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87 | _ALLOC3_SIGNAL_IN ( in_LSQ_REQ_THREAD_ID ,"thread_id",Tcontext_t ,_param->_size_thread_id [it1][it2], _param->_nb_execute_loop, _param->_nb_load_store_unit[it1], _param->_nb_cache_access[it1][it2]); |
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88 | _ALLOC3_SIGNAL_IN ( in_LSQ_REQ_PACKET_ID ,"packet_id",Tpacket_t ,_param->_size_packet_id [it1][it2], _param->_nb_execute_loop, _param->_nb_load_store_unit[it1], _param->_nb_cache_access[it1][it2]); |
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89 | _ALLOC3_SIGNAL_IN ( in_LSQ_REQ_ADDRESS ,"address" ,Tdcache_address_t ,_param->_size_address , _param->_nb_execute_loop, _param->_nb_load_store_unit[it1], _param->_nb_cache_access[it1][it2]); |
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90 | _ALLOC3_SIGNAL_IN ( in_LSQ_REQ_WDATA ,"wdata" ,Tdcache_data_t ,_param->_size_data , _param->_nb_execute_loop, _param->_nb_load_store_unit[it1], _param->_nb_cache_access[it1][it2]); |
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91 | _ALLOC3_SIGNAL_IN ( in_LSQ_REQ_TYPE ,"type" ,Tdcache_type_t ,_param->_size_dcache_type , _param->_nb_execute_loop, _param->_nb_load_store_unit[it1], _param->_nb_cache_access[it1][it2]); |
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92 | } |
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93 | |
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94 | // ~~~~~[ Interface "lsq_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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95 | { |
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96 | ALLOC3_INTERFACE("lsq_rsp",OUT, SOUTH, _("Respons to load_store queue"), _param->_nb_execute_loop, _param->_nb_load_store_unit[it1], _param->_nb_cache_access[it1][it2]); |
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97 | |
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98 | _ALLOC3_VALACK_OUT(out_LSQ_RSP_VAL ,VAL, _param->_nb_execute_loop, _param->_nb_load_store_unit[it1], _param->_nb_cache_access[it1][it2]); |
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99 | _ALLOC3_VALACK_IN ( in_LSQ_RSP_ACK ,ACK, _param->_nb_execute_loop, _param->_nb_load_store_unit[it1], _param->_nb_cache_access[it1][it2]); |
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100 | _ALLOC3_SIGNAL_OUT(out_LSQ_RSP_THREAD_ID ,"thread_id",Tcontext_t ,_param->_size_thread_id [it1][it2], _param->_nb_execute_loop, _param->_nb_load_store_unit[it1], _param->_nb_cache_access[it1][it2]); |
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101 | _ALLOC3_SIGNAL_OUT(out_LSQ_RSP_PACKET_ID ,"packet_id",Tpacket_t ,_param->_size_packet_id [it1][it2], _param->_nb_execute_loop, _param->_nb_load_store_unit[it1], _param->_nb_cache_access[it1][it2]); |
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102 | _ALLOC3_SIGNAL_OUT(out_LSQ_RSP_RDATA ,"rdata" ,Tdcache_data_t ,_param->_size_data , _param->_nb_execute_loop, _param->_nb_load_store_unit[it1], _param->_nb_cache_access[it1][it2]); |
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103 | _ALLOC3_SIGNAL_OUT(out_LSQ_RSP_ERROR ,"error" ,Tdcache_error_t ,_param->_size_dcache_error , _param->_nb_execute_loop, _param->_nb_load_store_unit[it1], _param->_nb_cache_access[it1][it2]); |
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104 | } |
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105 | |
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106 | // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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107 | #ifdef STATISTICS |
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108 | if (usage_is_set(_usage,USE_SYSTEMC)) |
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109 | { |
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110 | _internal_DCACHE_REQ_NB_ACCESS = new uint32_t [_param->_nb_dcache_port]; |
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111 | _internal_DCACHE_REQ_NB_ACCESS_CONFLIT = new uint32_t [_param->_nb_dcache_port]; |
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112 | } |
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113 | #endif |
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114 | |
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115 | // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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116 | _priority = new generic::priority::Priority (_name+"_priority", |
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117 | _param->_priority , |
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118 | _param->_load_balancing , |
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119 | _param->_nb_execute_loop , |
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120 | _param->_nb_load_store_unit, |
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121 | _param->_nb_execute_loop ); |
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122 | |
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123 | #ifdef POSITION |
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124 | if (usage_is_set(_usage,USE_POSITION)) |
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125 | _component->generate_file(); |
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126 | #endif |
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127 | |
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128 | log_end(Dcache_Access,FUNCTION); |
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129 | }; |
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130 | |
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131 | }; // end namespace dcache_access |
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132 | }; // end namespace core |
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133 | |
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134 | }; // end namespace behavioural |
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135 | }; // end namespace morpheo |
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