[88] | 1 | #ifdef SYSTEMC |
---|
| 2 | /* |
---|
| 3 | * $Id: Icache_Access_genMealy_req.cpp 88 2008-12-10 18:31:39Z rosiere $ |
---|
| 4 | * |
---|
| 5 | * [ Description ] |
---|
| 6 | * |
---|
| 7 | */ |
---|
| 8 | |
---|
| 9 | #include "Behavioural/Core/Icache_Access/include/Icache_Access.h" |
---|
| 10 | |
---|
| 11 | namespace morpheo { |
---|
| 12 | namespace behavioural { |
---|
| 13 | namespace core { |
---|
| 14 | namespace icache_access { |
---|
| 15 | |
---|
| 16 | |
---|
| 17 | #undef FUNCTION |
---|
| 18 | #define FUNCTION "Icache_Access::genMealy_req" |
---|
| 19 | void Icache_Access::genMealy_req (void) |
---|
| 20 | { |
---|
| 21 | log_begin(Icache_Access,FUNCTION); |
---|
| 22 | |
---|
| 23 | Tcontrol_t icache_req_val [_param->_nb_icache_port]; |
---|
| 24 | for (uint32_t i=0; i<_param->_nb_icache_port; ++i) |
---|
| 25 | { |
---|
| 26 | icache_req_val [i] = 0; |
---|
| 27 | |
---|
| 28 | #ifdef STATISTICS |
---|
| 29 | _internal_ICACHE_REQ_NB_ACCESS [i] = 0; |
---|
| 30 | _internal_ICACHE_REQ_NB_ACCESS_CONFLIT [i] = 0; |
---|
| 31 | #endif |
---|
| 32 | } |
---|
| 33 | |
---|
| 34 | Tcontrol_t context_req_ack [_param->_nb_front_end][_param->_max_nb_context]; |
---|
| 35 | for (uint32_t i=0; i<_param->_nb_front_end; ++i) |
---|
| 36 | for (uint32_t j=0; j<_param->_nb_context[i]; ++j) |
---|
| 37 | context_req_ack [i][j] = 0; |
---|
| 38 | |
---|
| 39 | std::list<generic::priority::select_t> * select = _priority ->select(); |
---|
| 40 | for (std::list<generic::priority::select_t>::iterator it=select ->begin(); |
---|
| 41 | it!=select->end(); |
---|
| 42 | ++it) |
---|
| 43 | { |
---|
| 44 | uint32_t num_front_end = it->grp; |
---|
| 45 | uint32_t num_context = it->elt; |
---|
| 46 | |
---|
| 47 | if (PORT_READ(in_CONTEXT_REQ_VAL [num_front_end][num_context])) |
---|
| 48 | { |
---|
| 49 | uint32_t num_port = _param->_table_routing[num_front_end][num_context]; |
---|
| 50 | Tcontrol_t icache_req_ack = PORT_READ(in_ICACHE_REQ_ACK [num_port]); |
---|
| 51 | |
---|
| 52 | #ifdef STATISTICS |
---|
| 53 | if (icache_req_ack) |
---|
| 54 | { |
---|
| 55 | _internal_ICACHE_REQ_NB_ACCESS [num_port] ++; |
---|
| 56 | if (icache_req_val [num_port]) |
---|
| 57 | _internal_ICACHE_REQ_NB_ACCESS_CONFLIT [num_port] ++; |
---|
| 58 | } |
---|
| 59 | #endif |
---|
| 60 | if (not icache_req_val [num_port]) |
---|
| 61 | { |
---|
| 62 | icache_req_val [num_port] = 1; |
---|
| 63 | context_req_ack [num_front_end][num_context] = icache_req_ack; |
---|
| 64 | |
---|
| 65 | if (_param->_have_port_icache_thread_id) |
---|
| 66 | PORT_WRITE(out_ICACHE_REQ_THREAD_ID [num_port], _param->_translate_context_to_thread[num_front_end][num_context]); |
---|
| 67 | // if (_param->_have_port_icache_packet_id) |
---|
| 68 | if (_param->_have_port_packet_id [num_front_end][num_context]) |
---|
| 69 | PORT_WRITE(out_ICACHE_REQ_PACKET_ID [num_port], PORT_READ(in_CONTEXT_REQ_PACKET_ID [num_front_end][num_context])); |
---|
| 70 | PORT_WRITE(out_ICACHE_REQ_ADDRESS [num_port], PORT_READ(in_CONTEXT_REQ_ADDRESS [num_front_end][num_context])); |
---|
| 71 | PORT_WRITE(out_ICACHE_REQ_TYPE [num_port], PORT_READ(in_CONTEXT_REQ_TYPE [num_front_end][num_context])); |
---|
| 72 | } |
---|
| 73 | } |
---|
| 74 | } |
---|
| 75 | |
---|
| 76 | for (uint32_t i=0; i<_param->_nb_icache_port; ++i) |
---|
| 77 | PORT_WRITE(out_ICACHE_REQ_VAL [i], icache_req_val [i]); |
---|
| 78 | |
---|
| 79 | for (uint32_t i=0; i<_param->_nb_front_end; ++i) |
---|
| 80 | for (uint32_t j=0; j<_param->_nb_context[i]; ++j) |
---|
| 81 | PORT_WRITE(out_CONTEXT_REQ_ACK [i][j], context_req_ack [i][j]); |
---|
| 82 | |
---|
| 83 | log_end(Icache_Access,FUNCTION); |
---|
| 84 | }; |
---|
| 85 | |
---|
| 86 | }; // end namespace icache_access |
---|
| 87 | }; // end namespace core |
---|
| 88 | |
---|
| 89 | }; // end namespace behavioural |
---|
| 90 | }; // end namespace morpheo |
---|
| 91 | #endif |
---|