1 | #ifdef SYSTEMC |
---|
2 | /* |
---|
3 | * $Id: Icache_Access_genMealy_req.cpp 124 2009-06-17 12:11:25Z rosiere $ |
---|
4 | * |
---|
5 | * [ Description ] |
---|
6 | * |
---|
7 | */ |
---|
8 | |
---|
9 | #include "Behavioural/Core/Icache_Access/include/Icache_Access.h" |
---|
10 | |
---|
11 | namespace morpheo { |
---|
12 | namespace behavioural { |
---|
13 | namespace core { |
---|
14 | namespace icache_access { |
---|
15 | |
---|
16 | |
---|
17 | #undef FUNCTION |
---|
18 | #define FUNCTION "Icache_Access::genMealy_req" |
---|
19 | void Icache_Access::genMealy_req (void) |
---|
20 | { |
---|
21 | log_begin(Icache_Access,FUNCTION); |
---|
22 | log_function(Icache_Access,FUNCTION,_name.c_str()); |
---|
23 | |
---|
24 | Tcontrol_t icache_req_val [_param->_nb_icache_port]; |
---|
25 | for (uint32_t i=0; i<_param->_nb_icache_port; ++i) |
---|
26 | icache_req_val [i] = 0; |
---|
27 | Tcontrol_t context_req_ack [_param->_nb_front_end][_param->_max_nb_context]; |
---|
28 | for (uint32_t i=0; i<_param->_nb_front_end; ++i) |
---|
29 | for (uint32_t j=0; j<_param->_nb_context[i]; ++j) |
---|
30 | context_req_ack [i][j] = 0; |
---|
31 | |
---|
32 | if (PORT_READ(in_NRESET)) |
---|
33 | { |
---|
34 | for (uint32_t i=0; i<_param->_nb_icache_port; ++i) |
---|
35 | { |
---|
36 | // log_printf(TRACE,Icache_Access,FUNCTION," * ICACHE_REQ [%d]",i); |
---|
37 | |
---|
38 | #ifdef STATISTICS |
---|
39 | _internal_ICACHE_REQ_NB_ACCESS [i] = 0; |
---|
40 | _internal_ICACHE_REQ_NB_ACCESS_CONFLIT [i] = 0; |
---|
41 | #endif |
---|
42 | } |
---|
43 | |
---|
44 | std::list<generic::priority::select_t> * select = _priority ->select(); |
---|
45 | for (std::list<generic::priority::select_t>::iterator it=select ->begin(); |
---|
46 | it!=select->end(); |
---|
47 | ++it) |
---|
48 | { |
---|
49 | uint32_t num_front_end = it->grp; |
---|
50 | uint32_t num_context = it->elt; |
---|
51 | |
---|
52 | log_printf(TRACE,Dcache_Access,FUNCTION," * Context [%d][%d]",num_front_end, num_context); |
---|
53 | |
---|
54 | |
---|
55 | if (PORT_READ(in_CONTEXT_REQ_VAL [num_front_end][num_context])) |
---|
56 | { |
---|
57 | uint32_t num_port = _param->_table_routing[num_front_end][num_context]; |
---|
58 | Tcontrol_t icache_req_ack = PORT_READ(in_ICACHE_REQ_ACK [num_port]); |
---|
59 | |
---|
60 | log_printf(TRACE,Dcache_Access,FUNCTION," * context have request"); |
---|
61 | log_printf(TRACE,Dcache_Access,FUNCTION," * num_port : %d",num_port); |
---|
62 | log_printf(TRACE,Dcache_Access,FUNCTION," * icache_req_val: %d",icache_req_val [num_port]); |
---|
63 | |
---|
64 | #ifdef STATISTICS |
---|
65 | if (icache_req_ack) |
---|
66 | { |
---|
67 | _internal_ICACHE_REQ_NB_ACCESS [num_port] ++; |
---|
68 | if (icache_req_val [num_port]) |
---|
69 | _internal_ICACHE_REQ_NB_ACCESS_CONFLIT [num_port] ++; |
---|
70 | } |
---|
71 | #endif |
---|
72 | if (not icache_req_val [num_port]) |
---|
73 | { |
---|
74 | icache_req_val [num_port] = 1; |
---|
75 | context_req_ack [num_front_end][num_context] = icache_req_ack; |
---|
76 | |
---|
77 | if (_param->_have_port_icache_thread_id) |
---|
78 | { |
---|
79 | Tcontext_t num_thread = _param->_translate_context_to_thread[num_front_end][num_context]; |
---|
80 | log_printf(TRACE,Dcache_Access,FUNCTION," * num_thread : %d",num_thread ); |
---|
81 | |
---|
82 | PORT_WRITE(out_ICACHE_REQ_THREAD_ID [num_port], num_thread); |
---|
83 | } |
---|
84 | // if (_param->_have_port_icache_packet_id) |
---|
85 | if (_param->_have_port_packet_id [num_front_end][num_context]) |
---|
86 | PORT_WRITE(out_ICACHE_REQ_PACKET_ID [num_port], PORT_READ(in_CONTEXT_REQ_PACKET_ID [num_front_end][num_context])); |
---|
87 | PORT_WRITE(out_ICACHE_REQ_ADDRESS [num_port], PORT_READ(in_CONTEXT_REQ_ADDRESS [num_front_end][num_context])); |
---|
88 | PORT_WRITE(out_ICACHE_REQ_TYPE [num_port], PORT_READ(in_CONTEXT_REQ_TYPE [num_front_end][num_context])); |
---|
89 | } |
---|
90 | } |
---|
91 | } |
---|
92 | } |
---|
93 | |
---|
94 | |
---|
95 | for (uint32_t i=0; i<_param->_nb_icache_port; ++i) |
---|
96 | PORT_WRITE(out_ICACHE_REQ_VAL [i], icache_req_val [i]); |
---|
97 | |
---|
98 | for (uint32_t i=0; i<_param->_nb_front_end; ++i) |
---|
99 | for (uint32_t j=0; j<_param->_nb_context[i]; ++j) |
---|
100 | PORT_WRITE(out_CONTEXT_REQ_ACK [i][j], context_req_ack [i][j]); |
---|
101 | |
---|
102 | log_end(Icache_Access,FUNCTION); |
---|
103 | }; |
---|
104 | |
---|
105 | }; // end namespace icache_access |
---|
106 | }; // end namespace core |
---|
107 | |
---|
108 | }; // end namespace behavioural |
---|
109 | }; // end namespace morpheo |
---|
110 | #endif |
---|