source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_vhdl_body.cpp @ 98

Last change on this file since 98 was 98, checked in by rosiere, 16 years ago

1) Fix bug (read unit, RAT -> write in R0, SPR desallocation ...)
2) Change VHDL Execute_queue -> use Generic/Queue?
3) Complete document on VHDL generation
4) Add soc test

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File size: 19.2 KB
RevLine 
[54]1#ifdef VHDL
2/*
3 * $Id: Read_queue_vhdl_body.cpp 98 2008-12-31 10:18:08Z rosiere $
4 *
5 * [ Description ]
6 *
7 */
8
9#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Read_queue.h"
10
11namespace morpheo                    {
12namespace behavioural {
13namespace core {
14namespace multi_execute_loop {
15namespace execute_loop {
16namespace multi_read_unit {
17namespace read_unit {
18namespace read_queue {
19
20
21  void Read_queue::vhdl_body (Vhdl * & vhdl)
22  {
23    log_printf(FUNC,Read_queue,"vhdl_body","Begin");
[97]24    vhdl->set_body(0,"");
25    vhdl->set_body(0,"");
26    vhdl->set_body(0,"-----------------------------------");
27    vhdl->set_body(0,"-- Instance queue                  ");
28    vhdl->set_body(0,"-----------------------------------");
29    vhdl->set_body(0,"");
[68]30
[97]31    vhdl->set_body(0,"instance_"+_name+"_queue : "+_name+"_queue");
32    vhdl->set_body(0,"port map (");
33    vhdl->set_body(1,"  in_CLOCK       \t=>\t      in_CLOCK ");
34    vhdl->set_body(1,", in_NRESET      \t=>\t      in_NRESET");
35    vhdl->set_body(1,", in_INSERT_VAL  \t=>\tinternal_QUEUE_INSERT_VAL");
36    vhdl->set_body(1,",out_INSERT_ACK  \t=>\tinternal_QUEUE_INSERT_ACK");
37    vhdl->set_body(1,", in_INSERT_DATA \t=>\tinternal_QUEUE_INSERT_DATA");
38    vhdl->set_body(1,",out_RETIRE_VAL  \t=>\tinternal_QUEUE_RETIRE_VAL");
39    vhdl->set_body(1,", in_RETIRE_ACK  \t=>\tinternal_QUEUE_RETIRE_ACK");
40    vhdl->set_body(1,",out_RETIRE_DATA \t=>\tinternal_QUEUE_RETIRE_DATA");
41    vhdl->set_body(0,");");
[68]42
[97]43    vhdl->set_body(0,"");
44    vhdl->set_body(0,"-----------------------------------");
45    vhdl->set_body(0,"-- Queue_data                      ");
46    vhdl->set_body(0,"-----------------------------------");
47    vhdl->set_body(0,"");
[68]48   
49    uint32_t min = 0;
50    uint32_t max;
51
52    if(_param->_have_port_context_id   )
53      {
54        max = min-1+_param->_size_context_id;
[97]55        vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_CONTEXT_ID;");
[68]56        min = max+1;
57      }
58    if(_param->_have_port_front_end_id   )
59      {
60        max = min-1+_param->_size_front_end_id;
[97]61        vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_FRONT_END_ID;");
[68]62        min = max+1;
63      }
64    if(_param->_have_port_ooo_engine_id   )
65      {
66        max = min-1+_param->_size_ooo_engine_id;
[97]67        vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_OOO_ENGINE_ID;");
[68]68        min = max+1;
69      }
[97]70    if(_param->_have_port_rob_ptr  )
[68]71      {
[97]72        max = min-1+_param->_size_rob_ptr  ;
73        vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_ROB_ID;");
[68]74        min = max+1;
75      }
76
77    max = min-1+_param->_size_operation;
[97]78    vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_OPERATION;");
[68]79    min = max+1;
80
81    max = min-1+_param->_size_type;
[97]82    vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_TYPE;");
[68]83    min = max+1;
84
85    max = min;
[97]86    vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_HAS_IMMEDIAT;");
[68]87    min = max+1;
88
89    max = min-1+_param->_size_general_data;
[97]90    vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_IMMEDIAT;");
[68]91    min = max+1;
92
93    max = min;
[97]94    vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_READ_RA;");
[68]95    min = max+1;
96
97    max = min-1+_param->_size_general_register;
[97]98    vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_NUM_REG_RA;");
[68]99    min = max+1;
100
101    max = min;
[97]102    vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_READ_RB;");
[68]103    min = max+1;
104
105    max = min-1+_param->_size_general_register;
[97]106    vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_NUM_REG_RB;");
[68]107    min = max+1;
108
109    max = min;
[97]110    vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_READ_RC;");
[68]111    min = max+1;
112
113    max = min-1+_param->_size_special_register;
[97]114    vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_NUM_REG_RC;");
[68]115    min = max+1;
116
117    max = min;
[97]118    vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_WRITE_RD;");
[68]119    min = max+1;
120
121    max = min-1+_param->_size_general_register;
[97]122    vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_NUM_REG_RD;");
[68]123    min = max+1;
124
125    max = min;
[97]126    vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_WRITE_RE;");
[68]127    min = max+1;
128
129    max = min-1+_param->_size_special_register;
[97]130    vhdl->set_body(0,"internal_QUEUE_INSERT_DATA"+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_READ_QUEUE_IN_NUM_REG_RE;");
[68]131    min = max+1;
132
[97]133    vhdl->set_body(0,"internal_QUEUE_RETIRE_ACK <= internal_READ_QUEUE_OUT_VAL and in_READ_QUEUE_OUT_ACK;");
[68]134
[97]135    vhdl->set_body(0,"");
136    vhdl->set_body(0,"-----------------------------------");
137    vhdl->set_body(0,"-- Interface read");
138    vhdl->set_body(0,"-----------------------------------");
139    vhdl->set_body(0,"");
140    vhdl->set_body(0,"-- GPR");
141    vhdl->set_body(0,"out_GPR_READ_0_VAL           <= internal_QUEUE_RETIRE_VAL and internal_READ_RA_VAL;");
142    vhdl->set_body(0,"out_GPR_READ_1_VAL           <= internal_QUEUE_RETIRE_VAL and internal_READ_RB_VAL;");
[68]143    if(_param->_have_port_ooo_engine_id)
144      {
[97]145        vhdl->set_body(0,"out_GPR_READ_0_OOO_ENGINE_ID <= internal_OOO_ENGINE_ID;");
146        vhdl->set_body(0,"out_GPR_READ_1_OOO_ENGINE_ID <= internal_OOO_ENGINE_ID;");
[68]147      }
[97]148    vhdl->set_body(0,"out_GPR_READ_0_NUM_REG       <= internal_NUM_REG_RA;");
149    vhdl->set_body(0,"out_GPR_READ_1_NUM_REG       <= internal_NUM_REG_RB;");
150    vhdl->set_body(0,"");
[68]151   
[97]152    vhdl->set_body(0,"-- SPR");
153    vhdl->set_body(0,"out_SPR_READ_0_VAL           <= internal_QUEUE_RETIRE_VAL and internal_READ_RC_VAL;");
[68]154    if(_param->_have_port_ooo_engine_id)
155      {
[97]156        vhdl->set_body(0,"out_SPR_READ_0_OOO_ENGINE_ID <= internal_OOO_ENGINE_ID;");
[68]157      }
[97]158    vhdl->set_body(0,"out_SPR_READ_0_NUM_REG       <= internal_NUM_REG_RC;");
[68]159
[97]160    vhdl->set_body(0,"");
161    vhdl->set_body(0,"-----------------------------------");
162    vhdl->set_body(0,"-- Interface read_queue_out");
163    vhdl->set_body(0,"-----------------------------------");
164    vhdl->set_body(0,"");
[68]165   
166    if(_param->_have_port_context_id   )
[97]167      vhdl->set_body(0,"out_READ_QUEUE_OUT_CONTEXT_ID    <= internal_CONTEXT_ID   ;");
[68]168    if(_param->_have_port_front_end_id   )
[97]169      vhdl->set_body(0,"out_READ_QUEUE_OUT_FRONT_END_ID  <= internal_FRONT_END_ID ;");
[68]170    if(_param->_have_port_ooo_engine_id   )
[97]171      vhdl->set_body(0,"out_READ_QUEUE_OUT_OOO_ENGINE_ID <= internal_OOO_ENGINE_ID;");
172    if(_param->_have_port_rob_ptr  )
173      vhdl->set_body(0,"out_READ_QUEUE_OUT_ROB_ID        <= internal_ROB_ID       ;");
174    vhdl->set_body(0,"out_READ_QUEUE_OUT_OPERATION     <= internal_OPERATION    ;");
175    vhdl->set_body(0,"out_READ_QUEUE_OUT_TYPE          <= internal_TYPE         ;");
176    vhdl->set_body(0,"out_READ_QUEUE_OUT_HAS_IMMEDIAT  <= internal_HAS_IMMEDIAT ;");
177    vhdl->set_body(0,"out_READ_QUEUE_OUT_IMMEDIAT      <= internal_IMMEDIAT     ;");
[98]178//  vhdl->set_body(0,"out_READ_QUEUE_OUT_READ_RA       <= internal_READ_RA      ;");
[97]179    vhdl->set_body(0,"out_READ_QUEUE_OUT_NUM_REG_RA    <= internal_NUM_REG_RA   ;");
180    vhdl->set_body(0,"out_READ_QUEUE_OUT_DATA_RA_VAL   <= internal_NEXT_DATA_RA_VAL;");
181    vhdl->set_body(0,"out_READ_QUEUE_OUT_DATA_RA       <= internal_NEXT_DATA_RA ;");
[98]182//  vhdl->set_body(0,"out_READ_QUEUE_OUT_READ_RB       <= internal_READ_RB      ;");
[97]183    vhdl->set_body(0,"out_READ_QUEUE_OUT_NUM_REG_RB    <= internal_NUM_REG_RB   ;");
184    vhdl->set_body(0,"out_READ_QUEUE_OUT_DATA_RB_VAL   <= internal_NEXT_DATA_RB_VAL;");
185    vhdl->set_body(0,"out_READ_QUEUE_OUT_DATA_RB       <= internal_NEXT_DATA_RB ;");
[98]186//  vhdl->set_body(0,"out_READ_QUEUE_OUT_READ_RC       <= internal_READ_RC      ;");
[97]187    vhdl->set_body(0,"out_READ_QUEUE_OUT_NUM_REG_RC    <= internal_NUM_REG_RC   ;");
188    vhdl->set_body(0,"out_READ_QUEUE_OUT_DATA_RC_VAL   <= internal_NEXT_DATA_RC_VAL;");
189    vhdl->set_body(0,"out_READ_QUEUE_OUT_DATA_RC       <= internal_NEXT_DATA_RC ;");
190    vhdl->set_body(0,"out_READ_QUEUE_OUT_WRITE_RD      <= internal_WRITE_RD     ;");
191    vhdl->set_body(0,"out_READ_QUEUE_OUT_NUM_REG_RD    <= internal_NUM_REG_RD   ;");
192    vhdl->set_body(0,"out_READ_QUEUE_OUT_WRITE_RE      <= internal_WRITE_RE     ;");
193    vhdl->set_body(0,"out_READ_QUEUE_OUT_NUM_REG_RE    <= internal_NUM_REG_RE   ;");
[68]194   
[97]195    vhdl->set_body(0,"");
196    vhdl->set_body(0,"-----------------------------------");
197    vhdl->set_body(0,"-- next reg update");
198    vhdl->set_body(0,"-----------------------------------");
199    vhdl->set_body(0,"");
200    vhdl->set_body(0,"-- read_rx_val - 1 : must access at the registerFile (after access, is set at 0)");
[68]201   
202    {
[97]203      vhdl->set_body(0,"");
204      vhdl->set_body(0,"internal_NEXT_READ_RA_VAL <=");
205      vhdl->set_body(1,"'0' when");
[68]206      // bypass
[97]207      vhdl->set_body(2,"-- check bypass");
[68]208      for (int32_t i=_param->_nb_gpr_write-1; i>=0 ; i--)
209        {
[75]210          std::string cmp;
[68]211         
212          if (_param->_have_port_ooo_engine_id)
213            cmp = "and (in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID=internal_OOO_ENGINE_ID) ";
214          else
215            cmp = "";
216         
[97]217          vhdl->set_body(2,"((in_GPR_WRITE_"+toString(i)+"_VAL='1') "+cmp+"and (internal_NUM_REG_RA=in_GPR_WRITE_"+toString(i)+"_NUM_REG)) or");
[68]218        }
[97]219      vhdl->set_body(2,"false else");
220      vhdl->set_body(1,"internal_READ_RA_VAL and not in_GPR_READ_0_ACK;");
[68]221    }
222    {
[97]223      vhdl->set_body(0,"");
224      vhdl->set_body(0,"internal_NEXT_READ_RB_VAL <=");
225      vhdl->set_body(1,"'0' when");
[68]226      // bypass
[97]227      vhdl->set_body(2,"-- check bypass");
[68]228      for (int32_t i=_param->_nb_gpr_write-1; i>=0 ; i--)
229        {
[75]230          std::string cmp;
[68]231         
232          if (_param->_have_port_ooo_engine_id)
233            cmp = "and (in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID=internal_OOO_ENGINE_ID) ";
234          else
235            cmp = "";
236         
[97]237          vhdl->set_body(2,"((in_GPR_WRITE_"+toString(i)+"_VAL='1') "+cmp+"and (internal_NUM_REG_RB=in_GPR_WRITE_"+toString(i)+"_NUM_REG)) or");
[68]238        }
[97]239      vhdl->set_body(2,"false else");
240      vhdl->set_body(1,"internal_READ_RB_VAL and not in_GPR_READ_1_ACK;");
[68]241    }
242    {
[97]243      vhdl->set_body(0,"");
244      vhdl->set_body(0,"internal_NEXT_READ_RC_VAL <=");
245      vhdl->set_body(1,"'0' when");
[68]246      // bypass
[97]247      vhdl->set_body(2,"-- check bypass");
[68]248      for (int32_t i=_param->_nb_spr_write-1; i>=0 ; i--)
249        {
[75]250          std::string cmp;
[68]251         
252          if (_param->_have_port_ooo_engine_id)
253            cmp = "and (in_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID=internal_OOO_ENGINE_ID) ";
254          else
255            cmp = "";
256         
[97]257          vhdl->set_body(2,"((in_SPR_WRITE_"+toString(i)+"_VAL='1') "+cmp+"and (internal_NUM_REG_RC=in_SPR_WRITE_"+toString(i)+"_NUM_REG)) or");
[68]258        }
[97]259      vhdl->set_body(2,"false else");
260      vhdl->set_body(1,"internal_READ_RC_VAL and not in_SPR_READ_0_ACK;");
[68]261    }
262    {
[97]263      vhdl->set_body(0,"");
264      vhdl->set_body(0,"internal_READ_QUEUE_OUT_VAL <= not internal_NEXT_READ_RA_VAL and not internal_NEXT_READ_RB_VAL and not internal_NEXT_READ_RC_VAL;");
265      vhdl->set_body(0,"     out_READ_QUEUE_OUT_VAL <= internal_READ_QUEUE_OUT_VAL and internal_QUEUE_RETIRE_VAL;");
[68]266     
267    }
268   
[97]269    vhdl->set_body(0,"");
270    vhdl->set_body(0,"-- data_rx_val - 1 : the read of registerFile is valid");
[68]271   
272    {
[97]273      vhdl->set_body(0,"");
274      vhdl->set_body(0,"internal_NEXT_DATA_RA_VAL <=");
275      vhdl->set_body(1,"'1' when");
[68]276      // bypass
[97]277      vhdl->set_body(2,"-- check bypass");
[68]278      for (int32_t i=_param->_nb_gpr_write-1; i>=0 ; i--)
279        {
[75]280          std::string cmp;
[68]281       
282          if (_param->_have_port_ooo_engine_id)
283            cmp = "and (in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID=internal_OOO_ENGINE_ID) ";
284          else
285            cmp = "";
286         
[97]287          vhdl->set_body(2,"((in_GPR_WRITE_"+toString(i)+"_VAL='1') "+cmp+"and (internal_NUM_REG_RA=in_GPR_WRITE_"+toString(i)+"_NUM_REG)) or");
[68]288        }
[97]289      vhdl->set_body(2,"false else");
290      vhdl->set_body(1,"internal_DATA_RA_VAL or (internal_READ_RA_VAL and in_GPR_READ_0_ACK and in_GPR_READ_0_DATA_VAL);");
[68]291    }
292    {
[97]293      vhdl->set_body(0,"");
294      vhdl->set_body(0,"internal_NEXT_DATA_RB_VAL <=");
295      vhdl->set_body(1,"'1' when");
[68]296      // bypass
[97]297      vhdl->set_body(2,"-- check bypass");
[68]298      for (int32_t i=_param->_nb_gpr_write-1; i>=0 ; i--)
299        {
[75]300          std::string cmp;
[68]301         
302          if (_param->_have_port_ooo_engine_id)
303            cmp = "and (in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID=internal_OOO_ENGINE_ID) ";
304        else
305          cmp = "";
306         
[97]307          vhdl->set_body(2,"((in_GPR_WRITE_"+toString(i)+"_VAL='1') "+cmp+"and (internal_NUM_REG_RB=in_GPR_WRITE_"+toString(i)+"_NUM_REG)) or");
[68]308        }
[97]309      vhdl->set_body(2,"false else");
310      vhdl->set_body(1,"internal_DATA_RB_VAL or (internal_READ_RB_VAL and in_GPR_READ_1_ACK and in_GPR_READ_1_DATA_VAL);");
[68]311    }
312    {
[97]313      vhdl->set_body(0,"");
314      vhdl->set_body(0,"internal_NEXT_DATA_RC_VAL <=");
315      vhdl->set_body(1,"'1' when");
[68]316      // bypass
[97]317      vhdl->set_body(2,"-- check bypass");
[68]318      for (int32_t i=_param->_nb_spr_write-1; i>=0 ; i--)
319        {
[75]320          std::string cmp;
[68]321         
322          if (_param->_have_port_ooo_engine_id)
323            cmp = "and (in_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID=internal_OOO_ENGINE_ID) ";
324          else
325            cmp = "";
326         
[97]327          vhdl->set_body(2,"((in_SPR_WRITE_"+toString(i)+"_VAL='1') "+cmp+"and (internal_NUM_REG_RC=in_SPR_WRITE_"+toString(i)+"_NUM_REG)) or");
[68]328        }
[97]329      vhdl->set_body(2,"false else");
330      vhdl->set_body(1,"internal_DATA_RC_VAL or (internal_READ_RC_VAL and in_SPR_READ_0_ACK and in_SPR_READ_0_DATA_VAL);");
[68]331    }
332   
[97]333    vhdl->set_body(0,"");
334    vhdl->set_body(0,"-- data_rx - data read");
[68]335    {
[97]336      vhdl->set_body(0,"");
337      vhdl->set_body(0,"internal_NEXT_DATA_RA <=");
[68]338#ifdef SYSTEMC_VHDL_COMPATIBILITY
[97]339      vhdl->set_body(1,""+std_logic_others(_param->_size_general_data,0)+" when internal_READ_RA='0' else");
[68]340#endif
341      // bypass
[97]342      vhdl->set_body(2,"-- check bypass");
[68]343      for (int32_t i=_param->_nb_gpr_write-1; i>=0 ; i--)
344        {
[75]345          std::string cmp;
[68]346       
347          if (_param->_have_port_ooo_engine_id)
348            cmp = "and (in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID=internal_OOO_ENGINE_ID) ";
349          else
350            cmp = "";
351         
[97]352          vhdl->set_body(1,"in_GPR_WRITE_"+toString(i)+"_DATA when ((in_GPR_WRITE_"+toString(i)+"_VAL='1') "+cmp+"and (internal_NUM_REG_RA=in_GPR_WRITE_"+toString(i)+"_NUM_REG)) else");
[68]353        }
[97]354      vhdl->set_body(1,"reg_DATA_RA when (internal_DATA_RA_VAL='1') else");
355      vhdl->set_body(1,"in_GPR_READ_0_DATA;");
[68]356    }
357    {
[97]358      vhdl->set_body(0,"");
359      vhdl->set_body(0,"internal_NEXT_DATA_RB <=");
[68]360#ifdef SYSTEMC_VHDL_COMPATIBILITY
[97]361      vhdl->set_body(1,""+std_logic_others(_param->_size_general_data,0)+" when internal_READ_RB='0' else");
[68]362#endif
363      // bypass
[97]364      vhdl->set_body(2,"-- check bypass");
[68]365      for (int32_t i=_param->_nb_gpr_write-1; i>=0 ; i--)
366        {
[75]367          std::string cmp;
[68]368       
369          if (_param->_have_port_ooo_engine_id)
370            cmp = "and (in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID=internal_OOO_ENGINE_ID) ";
371          else
372            cmp = "";
373         
[97]374          vhdl->set_body(1,"in_GPR_WRITE_"+toString(i)+"_DATA when ((in_GPR_WRITE_"+toString(i)+"_VAL='1') "+cmp+"and (internal_NUM_REG_RB=in_GPR_WRITE_"+toString(i)+"_NUM_REG)) else");
[68]375        }
[97]376      vhdl->set_body(1,"reg_DATA_RB when (internal_DATA_RB_VAL='1') else");
377      vhdl->set_body(1,"in_GPR_READ_1_DATA;");
[68]378    }
379    {
[97]380      vhdl->set_body(0,"");
381      vhdl->set_body(0,"internal_NEXT_DATA_RC <=");
[68]382#ifdef SYSTEMC_VHDL_COMPATIBILITY
[97]383      vhdl->set_body(1,""+std_logic_others(_param->_size_special_data,0)+" when internal_READ_RC='0' else");
[68]384#endif
385      // bypass
[97]386      vhdl->set_body(2,"-- check bypass");
[68]387      for (int32_t i=_param->_nb_spr_write-1; i>=0 ; i--)
388        {
[75]389          std::string cmp;
[68]390       
391          if (_param->_have_port_ooo_engine_id)
392            cmp = "and (in_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID=internal_OOO_ENGINE_ID) ";
393          else
394            cmp = "";
395         
[97]396          vhdl->set_body(1,"in_SPR_WRITE_"+toString(i)+"_DATA when ((in_SPR_WRITE_"+toString(i)+"_VAL='1') "+cmp+"and (in_SPR_WRITE_"+toString(i)+"_NUM_REG=internal_NUM_REG_RC)) else");
[68]397        }
[97]398      vhdl->set_body(1,"reg_DATA_RC when (internal_DATA_RC_VAL='1') else");
399      vhdl->set_body(1,"in_SPR_READ_0_DATA;");
[68]400
[97]401    vhdl->set_body(0,"");
402    vhdl->set_body(0,"-----------------------------------");
403    vhdl->set_body(0,"-- transition");
404    vhdl->set_body(0,"-----------------------------------");
405    vhdl->set_body(0,"");
406    vhdl->set_body(0,"-- need a new head if :");
407    vhdl->set_body(0,"--   * queue is empty");
408    vhdl->set_body(0,"--   * pop with queue");
409    vhdl->set_body(0,"internal_NEXT_NEED_NEW_HEAD <= not internal_QUEUE_RETIRE_VAL or (internal_QUEUE_RETIRE_VAL and internal_QUEUE_RETIRE_ACK);");
[68]410
[97]411    vhdl->set_body(0,"internal_READ_RA_VAL   <=     internal_READ_RA when reg_NEED_NEW_HEAD='1' else reg_READ_RA_VAL;");
412    vhdl->set_body(0,"internal_READ_RB_VAL   <=     internal_READ_RB when reg_NEED_NEW_HEAD='1' else reg_READ_RB_VAL;");
413    vhdl->set_body(0,"internal_READ_RC_VAL   <=     internal_READ_RC when reg_NEED_NEW_HEAD='1' else reg_READ_RC_VAL;");
414    vhdl->set_body(0,"internal_DATA_RA_VAL   <= not internal_READ_RA when reg_NEED_NEW_HEAD='1' else reg_DATA_RA_VAL;");
415    vhdl->set_body(0,"internal_DATA_RB_VAL   <= not internal_READ_RB when reg_NEED_NEW_HEAD='1' else reg_DATA_RB_VAL;");
416    vhdl->set_body(0,"internal_DATA_RC_VAL   <= not internal_READ_RC when reg_NEED_NEW_HEAD='1' else reg_DATA_RC_VAL;");
[68]417
418
[97]419    vhdl->set_body(0,"");
420    vhdl->set_body(0,"transition: process (in_CLOCK)");
421    vhdl->set_body(0,"begin  -- process transition");
422    vhdl->set_body(1,"if in_CLOCK'event and in_CLOCK = '1' then");
423    vhdl->set_body(0,"");
424    vhdl->set_body(2,"if (in_NRESET = '0') then");   
425    vhdl->set_body(3,"reg_NEED_NEW_HEAD <= '1';");
426    vhdl->set_body(2,"else");
427    vhdl->set_body(3,"reg_NEED_NEW_HEAD <= internal_NEXT_NEED_NEW_HEAD;");
428    vhdl->set_body(3,"reg_READ_RA_VAL   <= internal_NEXT_READ_RA_VAL;");
429    vhdl->set_body(3,"reg_READ_RB_VAL   <= internal_NEXT_READ_RB_VAL;");
430    vhdl->set_body(3,"reg_READ_RC_VAL   <= internal_NEXT_READ_RC_VAL;");
431    vhdl->set_body(3,"reg_DATA_RA_VAL   <= internal_NEXT_DATA_RA_VAL;");
432    vhdl->set_body(3,"reg_DATA_RB_VAL   <= internal_NEXT_DATA_RB_VAL;");
433    vhdl->set_body(3,"reg_DATA_RC_VAL   <= internal_NEXT_DATA_RC_VAL;");
434    vhdl->set_body(3,"reg_DATA_RA       <= internal_NEXT_DATA_RA    ;");
435    vhdl->set_body(3,"reg_DATA_RB       <= internal_NEXT_DATA_RB    ;");
436    vhdl->set_body(3,"reg_DATA_RC       <= internal_NEXT_DATA_RC    ;");
[68]437
[97]438    vhdl->set_body(2,"end if;");
439    vhdl->set_body(0,"");
440    vhdl->set_body(1,"end if;");
441    vhdl->set_body(0,"end process transition;");
[68]442
443    }
444
445
[54]446    log_printf(FUNC,Read_queue,"vhdl_body","End");
447  };
448
449}; // end namespace read_queue
450}; // end namespace read_unit
451}; // end namespace multi_read_unit
452}; // end namespace execute_loop
453}; // end namespace multi_execute_loop
454}; // end namespace core
455
456}; // end namespace behavioural
457}; // end namespace morpheo             
458#endif
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