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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/test.cpp @ 75

Last change on this file since 75 was 75, checked in by rosiere, 16 years ago

Update all component (except front_end) to :

new statistics model
no namespace std

File size: 39.0 KB

Line
1	/*
2	* $Id$
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/include/test.h"
10	#include "Common/include/Test.h"
11	#include "Common/include/BitManipulation.h"
12
13	#define NB_ITERATION 2
14	#define CYCLE_MAX (2048*NB_ITERATION)
15
16	#define LABEL(str) \
17	{ \
18	cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} " << str << endl; \
19	} while(0)
20
21	static uint32_t cycle = 0;
22
23	#define SC_START(cycle_offset) \
24	do \
25	{ \
26	/cout << "SC_START (begin)" << endl;/ \
27	\
28	uint32_t cycle_current = static_cast<uint32_t>(sc_simulation_time()); \
29	sc_start(cycle_offset); \
30	if (cycle_current != cycle) \
31	{ \
32	cycle = cycle_current; \
33	cout << "##########[ cycle "<< cycle << " ]" << endl; \
34	} \
35	\
36	if (cycle_current > CYCLE_MAX) \
37	{ \
38	TEST_KO("Maximal cycles Reached"); \
39	} \
40	/cout << "SC_START (end )" << endl;/ \
41	} while(0)
42
43	void test (string name,
44	morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::reservation_station::Parameters * _param)
45	{
46	cout << "<" << name << "> : Simulation SystemC" << endl;
47
48	#ifdef STATISTICS
49	morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
50	#endif
51
52	Reservation_station * _Reservation_station = new Reservation_station (name.c_str(),
53	#ifdef STATISTICS
54	_parameters_statistics,
55	#endif
56	_param);
57
58	#ifdef SYSTEMC
59	/*********************************************************************
60	* Déclarations des signaux
61	*********************************************************************/
62	string rename = "";
63
64	sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5);
65	sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
66
67	sc_signal<Tcontrol_t > * in_INSERT_VAL = new sc_signal<Tcontrol_t >;
68	sc_signal<Tcontrol_t > * out_INSERT_ACK = new sc_signal<Tcontrol_t >;
69	sc_signal<Tcontext_t > * in_INSERT_CONTEXT_ID = new sc_signal<Tcontext_t >;
70	sc_signal<Tcontext_t > * in_INSERT_FRONT_END_ID = new sc_signal<Tcontext_t >;
71	sc_signal<Tcontext_t > * in_INSERT_OOO_ENGINE_ID = new sc_signal<Tcontext_t >;
72	sc_signal<Tpacket_t > * in_INSERT_ROB_ID = new sc_signal<Tpacket_t >;
73	sc_signal<Toperation_t > * in_INSERT_OPERATION = new sc_signal<Toperation_t >;
74	sc_signal<Ttype_t > * in_INSERT_TYPE = new sc_signal<Ttype_t >;
75	sc_signal<Tcontrol_t > * in_INSERT_HAS_IMMEDIAT = new sc_signal<Tcontrol_t >;
76	sc_signal<Tgeneral_data_t > * in_INSERT_IMMEDIAT = new sc_signal<Tgeneral_data_t >;
77	//sc_signal<Tcontrol_t > * in_INSERT_READ_RA = new sc_signal<Tcontrol_t >;
78	sc_signal<Tgeneral_address_t> * in_INSERT_NUM_REG_RA = new sc_signal<Tgeneral_address_t>;
79	sc_signal<Tcontrol_t > * in_INSERT_DATA_RA_VAL = new sc_signal<Tcontrol_t >;
80	sc_signal<Tgeneral_data_t > * in_INSERT_DATA_RA = new sc_signal<Tgeneral_data_t >;
81	//sc_signal<Tcontrol_t > * in_INSERT_READ_RB = new sc_signal<Tcontrol_t >;
82	sc_signal<Tgeneral_address_t> * in_INSERT_NUM_REG_RB = new sc_signal<Tgeneral_address_t>;
83	sc_signal<Tcontrol_t > * in_INSERT_DATA_RB_VAL = new sc_signal<Tcontrol_t >;
84	sc_signal<Tgeneral_data_t > * in_INSERT_DATA_RB = new sc_signal<Tgeneral_data_t >;
85	//sc_signal<Tcontrol_t > * in_INSERT_READ_RC = new sc_signal<Tcontrol_t >;
86	sc_signal<Tspecial_address_t> * in_INSERT_NUM_REG_RC = new sc_signal<Tspecial_address_t>;
87	sc_signal<Tcontrol_t > * in_INSERT_DATA_RC_VAL = new sc_signal<Tcontrol_t >;
88	sc_signal<Tspecial_data_t > * in_INSERT_DATA_RC = new sc_signal<Tspecial_data_t >;
89	sc_signal<Tcontrol_t > * in_INSERT_WRITE_RD = new sc_signal<Tcontrol_t >;
90	sc_signal<Tgeneral_address_t> * in_INSERT_NUM_REG_RD = new sc_signal<Tgeneral_address_t>;
91	sc_signal<Tcontrol_t > * in_INSERT_WRITE_RE = new sc_signal<Tcontrol_t >;
92	sc_signal<Tspecial_address_t> * in_INSERT_NUM_REG_RE = new sc_signal<Tspecial_address_t>;
93
94	sc_signal<Tcontrol_t > ** out_RETIRE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_inst_retire];
95	sc_signal<Tcontrol_t > ** in_RETIRE_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_inst_retire];
96	sc_signal<Tcontext_t > ** out_RETIRE_CONTEXT_ID = new sc_signal<Tcontext_t > * [_param->_nb_inst_retire];
97	sc_signal<Tcontext_t > ** out_RETIRE_FRONT_END_ID = new sc_signal<Tcontext_t > * [_param->_nb_inst_retire];
98	sc_signal<Tcontext_t > ** out_RETIRE_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_inst_retire];
99	sc_signal<Tpacket_t > ** out_RETIRE_ROB_ID = new sc_signal<Tpacket_t > * [_param->_nb_inst_retire];
100	sc_signal<Toperation_t > ** out_RETIRE_OPERATION = new sc_signal<Toperation_t > * [_param->_nb_inst_retire];
101	sc_signal<Ttype_t > ** out_RETIRE_TYPE = new sc_signal<Ttype_t > * [_param->_nb_inst_retire];
102	sc_signal<Tcontrol_t > ** out_RETIRE_HAS_IMMEDIAT = new sc_signal<Tcontrol_t > * [_param->_nb_inst_retire];
103	sc_signal<Tgeneral_data_t > ** out_RETIRE_IMMEDIAT = new sc_signal<Tgeneral_data_t > * [_param->_nb_inst_retire];
104	sc_signal<Tgeneral_data_t > ** out_RETIRE_DATA_RA = new sc_signal<Tgeneral_data_t > * [_param->_nb_inst_retire];
105	sc_signal<Tgeneral_data_t > ** out_RETIRE_DATA_RB = new sc_signal<Tgeneral_data_t > * [_param->_nb_inst_retire];
106	sc_signal<Tspecial_data_t > ** out_RETIRE_DATA_RC = new sc_signal<Tspecial_data_t > * [_param->_nb_inst_retire];
107	sc_signal<Tcontrol_t > ** out_RETIRE_WRITE_RD = new sc_signal<Tcontrol_t > * [_param->_nb_inst_retire];
108	sc_signal<Tgeneral_address_t> ** out_RETIRE_NUM_REG_RD = new sc_signal<Tgeneral_address_t> * [_param->_nb_inst_retire];
109	sc_signal<Tcontrol_t > ** out_RETIRE_WRITE_RE = new sc_signal<Tcontrol_t > * [_param->_nb_inst_retire];
110	sc_signal<Tspecial_address_t> ** out_RETIRE_NUM_REG_RE = new sc_signal<Tspecial_address_t> * [_param->_nb_inst_retire];
111
112	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
113	{
114	out_RETIRE_VAL [i] = new sc_signal<Tcontrol_t > (rename.c_str());
115	in_RETIRE_ACK [i] = new sc_signal<Tcontrol_t > (rename.c_str());
116	out_RETIRE_CONTEXT_ID [i] = new sc_signal<Tcontext_t > (rename.c_str());
117	out_RETIRE_FRONT_END_ID [i] = new sc_signal<Tcontext_t > (rename.c_str());
118	out_RETIRE_OOO_ENGINE_ID [i] = new sc_signal<Tcontext_t > (rename.c_str());
119	out_RETIRE_ROB_ID [i] = new sc_signal<Tpacket_t > (rename.c_str());
120	out_RETIRE_OPERATION [i] = new sc_signal<Toperation_t > (rename.c_str());
121	out_RETIRE_TYPE [i] = new sc_signal<Ttype_t > (rename.c_str());
122	out_RETIRE_HAS_IMMEDIAT [i] = new sc_signal<Tcontrol_t > (rename.c_str());
123	out_RETIRE_IMMEDIAT [i] = new sc_signal<Tgeneral_data_t > (rename.c_str());
124	out_RETIRE_DATA_RA [i] = new sc_signal<Tgeneral_data_t > (rename.c_str());
125	out_RETIRE_DATA_RB [i] = new sc_signal<Tgeneral_data_t > (rename.c_str());
126	out_RETIRE_DATA_RC [i] = new sc_signal<Tspecial_data_t > (rename.c_str());
127	out_RETIRE_WRITE_RD [i] = new sc_signal<Tcontrol_t > (rename.c_str());
128	out_RETIRE_NUM_REG_RD [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
129	out_RETIRE_WRITE_RE [i] = new sc_signal<Tcontrol_t > (rename.c_str());
130	out_RETIRE_NUM_REG_RE [i] = new sc_signal<Tspecial_address_t> (rename.c_str());
131	}
132
133	sc_signal<Tcontrol_t > ** in_GPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_write];
134	sc_signal<Tcontext_t > ** in_GPR_WRITE_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_gpr_write];
135	sc_signal<Tgeneral_address_t> ** in_GPR_WRITE_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_gpr_write];
136	sc_signal<Tgeneral_data_t > ** in_GPR_WRITE_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_gpr_write];
137
138	for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
139	{
140	in_GPR_WRITE_VAL [i] = new sc_signal<Tcontrol_t > (rename.c_str());
141	in_GPR_WRITE_OOO_ENGINE_ID [i] = new sc_signal<Tcontext_t > (rename.c_str());
142	in_GPR_WRITE_NUM_REG [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
143	in_GPR_WRITE_DATA [i] = new sc_signal<Tgeneral_data_t > (rename.c_str());
144	}
145
146	sc_signal<Tcontrol_t > ** in_SPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_write];
147	sc_signal<Tcontext_t > ** in_SPR_WRITE_OOO_ENGINE_ID= new sc_signal<Tcontext_t > * [_param->_nb_spr_write];
148	sc_signal<Tspecial_address_t> ** in_SPR_WRITE_NUM_REG = new sc_signal<Tspecial_address_t> * [_param->_nb_spr_write];
149	sc_signal<Tspecial_data_t > ** in_SPR_WRITE_DATA = new sc_signal<Tspecial_data_t > * [_param->_nb_spr_write];
150
151	for (uint32_t i=0; i<_param->_nb_spr_write; i++)
152	{
153	in_SPR_WRITE_VAL [i] = new sc_signal<Tcontrol_t > (rename.c_str());
154	in_SPR_WRITE_OOO_ENGINE_ID [i] = new sc_signal<Tcontext_t > (rename.c_str());
155	in_SPR_WRITE_NUM_REG [i] = new sc_signal<Tspecial_address_t> (rename.c_str());
156	in_SPR_WRITE_DATA [i] = new sc_signal<Tspecial_data_t > (rename.c_str());
157	}
158
159	sc_signal<Tcontext_t > ** in_BYPASS_WRITE_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_bypass_write];
160	sc_signal<Tcontrol_t > ** in_BYPASS_WRITE_GPR_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_bypass_write];
161	sc_signal<Tgeneral_address_t> ** in_BYPASS_WRITE_GPR_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_write];
162	sc_signal<Tgeneral_data_t > ** in_BYPASS_WRITE_GPR_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_bypass_write];
163	sc_signal<Tcontrol_t > ** in_BYPASS_WRITE_SPR_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_bypass_write];
164	sc_signal<Tspecial_address_t> ** in_BYPASS_WRITE_SPR_NUM_REG = new sc_signal<Tspecial_address_t> * [_param->_nb_bypass_write];
165	sc_signal<Tspecial_data_t > ** in_BYPASS_WRITE_SPR_DATA = new sc_signal<Tspecial_data_t > * [_param->_nb_bypass_write];
166
167	for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
168	{
169	in_BYPASS_WRITE_OOO_ENGINE_ID [i] = new sc_signal<Tcontext_t > (rename.c_str());
170	in_BYPASS_WRITE_GPR_VAL [i] = new sc_signal<Tcontrol_t > (rename.c_str());
171	in_BYPASS_WRITE_GPR_NUM_REG [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
172	in_BYPASS_WRITE_GPR_DATA [i] = new sc_signal<Tgeneral_data_t > (rename.c_str());
173	in_BYPASS_WRITE_SPR_VAL [i] = new sc_signal<Tcontrol_t > (rename.c_str());
174	in_BYPASS_WRITE_SPR_NUM_REG [i] = new sc_signal<Tspecial_address_t> (rename.c_str());
175	in_BYPASS_WRITE_SPR_DATA [i] = new sc_signal<Tspecial_data_t > (rename.c_str());
176	}
177	sc_signal<Tcontrol_t > ** in_BYPASS_MEMORY_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_bypass_memory];
178	sc_signal<Tcontext_t > ** in_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_bypass_memory];
179	sc_signal<Tgeneral_address_t> ** in_BYPASS_MEMORY_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_memory];
180	sc_signal<Tgeneral_data_t > ** in_BYPASS_MEMORY_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_bypass_memory];
181
182	for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
183	{
184	in_BYPASS_MEMORY_VAL [i] = new sc_signal<Tcontrol_t > (rename.c_str());
185	in_BYPASS_MEMORY_OOO_ENGINE_ID [i] = new sc_signal<Tcontext_t > (rename.c_str());
186	in_BYPASS_MEMORY_NUM_REG [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
187	in_BYPASS_MEMORY_DATA [i] = new sc_signal<Tgeneral_data_t > (rename.c_str());
188	}
189
190	/********************************************************
191	* Instanciation
192	********************************************************/
193
194	cout << "<" << name << "> Instanciation of _Reservation_station" << endl;
195
196	((_Reservation_station->in_CLOCK)) ((in_CLOCK));
197	((_Reservation_station->in_NRESET)) ((in_NRESET));
198
199	((_Reservation_station-> in_INSERT_VAL )) (( in_INSERT_VAL ));
200	((_Reservation_station->out_INSERT_ACK )) ((out_INSERT_ACK ));
201	if (_param->_have_port_context_id)
202	((_Reservation_station-> in_INSERT_CONTEXT_ID )) (( in_INSERT_CONTEXT_ID ));
203	if (_param->_have_port_front_end_id)
204	((_Reservation_station-> in_INSERT_FRONT_END_ID )) (( in_INSERT_FRONT_END_ID ));
205	if (_param->_have_port_ooo_engine_id)
206	((_Reservation_station-> in_INSERT_OOO_ENGINE_ID )) (( in_INSERT_OOO_ENGINE_ID ));
207	if (_param->_have_port_rob_id)
208	((_Reservation_station-> in_INSERT_ROB_ID )) (( in_INSERT_ROB_ID ));
209	((_Reservation_station-> in_INSERT_OPERATION )) (( in_INSERT_OPERATION ));
210	((_Reservation_station-> in_INSERT_TYPE )) (( in_INSERT_TYPE ));
211	((_Reservation_station-> in_INSERT_HAS_IMMEDIAT )) (( in_INSERT_HAS_IMMEDIAT ));
212	((_Reservation_station-> in_INSERT_IMMEDIAT )) (( in_INSERT_IMMEDIAT ));
213	// ((_Reservation_station-> in_INSERT_READ_RA )) (( in_INSERT_READ_RA ));
214	((_Reservation_station-> in_INSERT_NUM_REG_RA )) (( in_INSERT_NUM_REG_RA ));
215	((_Reservation_station-> in_INSERT_DATA_RA_VAL )) (( in_INSERT_DATA_RA_VAL ));
216	((_Reservation_station-> in_INSERT_DATA_RA )) (( in_INSERT_DATA_RA ));
217	// ((_Reservation_station-> in_INSERT_READ_RB )) (( in_INSERT_READ_RB ));
218	((_Reservation_station-> in_INSERT_NUM_REG_RB )) (( in_INSERT_NUM_REG_RB ));
219	((_Reservation_station-> in_INSERT_DATA_RB_VAL )) (( in_INSERT_DATA_RB_VAL ));
220	((_Reservation_station-> in_INSERT_DATA_RB )) (( in_INSERT_DATA_RB ));
221	// ((_Reservation_station-> in_INSERT_READ_RC )) (( in_INSERT_READ_RC ));
222	((_Reservation_station-> in_INSERT_NUM_REG_RC )) (( in_INSERT_NUM_REG_RC ));
223	((_Reservation_station-> in_INSERT_DATA_RC_VAL )) (( in_INSERT_DATA_RC_VAL ));
224	((_Reservation_station-> in_INSERT_DATA_RC )) (( in_INSERT_DATA_RC ));
225	((_Reservation_station-> in_INSERT_WRITE_RD )) (( in_INSERT_WRITE_RD ));
226	((_Reservation_station-> in_INSERT_NUM_REG_RD )) (( in_INSERT_NUM_REG_RD ));
227	((_Reservation_station-> in_INSERT_WRITE_RE )) (( in_INSERT_WRITE_RE ));
228	((_Reservation_station-> in_INSERT_NUM_REG_RE )) (( in_INSERT_NUM_REG_RE ));
229
230	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
231	{
232	((_Reservation_station->out_RETIRE_VAL [i])) ((out_RETIRE_VAL [i]));
233	((_Reservation_station-> in_RETIRE_ACK [i])) (( in_RETIRE_ACK [i]));
234	if (_param->_have_port_context_id)
235	((_Reservation_station->out_RETIRE_CONTEXT_ID [i])) ((out_RETIRE_CONTEXT_ID [i]));
236	if (_param->_have_port_front_end_id)
237	((_Reservation_station->out_RETIRE_FRONT_END_ID [i])) ((out_RETIRE_FRONT_END_ID [i]));
238	if (_param->_have_port_ooo_engine_id)
239	((_Reservation_station->out_RETIRE_OOO_ENGINE_ID [i])) ((out_RETIRE_OOO_ENGINE_ID [i]));
240	if (_param->_have_port_rob_id)
241	((_Reservation_station->out_RETIRE_ROB_ID [i])) ((out_RETIRE_ROB_ID [i]));
242	((_Reservation_station->out_RETIRE_OPERATION [i])) ((out_RETIRE_OPERATION [i]));
243	((_Reservation_station->out_RETIRE_TYPE [i])) ((out_RETIRE_TYPE [i]));
244	((_Reservation_station->out_RETIRE_HAS_IMMEDIAT [i])) ((out_RETIRE_HAS_IMMEDIAT [i]));
245	((_Reservation_station->out_RETIRE_IMMEDIAT [i])) ((out_RETIRE_IMMEDIAT [i]));
246	((_Reservation_station->out_RETIRE_DATA_RA [i])) ((out_RETIRE_DATA_RA [i]));
247	((_Reservation_station->out_RETIRE_DATA_RB [i])) ((out_RETIRE_DATA_RB [i]));
248	((_Reservation_station->out_RETIRE_DATA_RC [i])) ((out_RETIRE_DATA_RC [i]));
249	((_Reservation_station->out_RETIRE_WRITE_RD [i])) ((out_RETIRE_WRITE_RD [i]));
250	((_Reservation_station->out_RETIRE_NUM_REG_RD [i])) ((out_RETIRE_NUM_REG_RD [i]));
251	((_Reservation_station->out_RETIRE_WRITE_RE [i])) ((out_RETIRE_WRITE_RE [i]));
252	((_Reservation_station->out_RETIRE_NUM_REG_RE [i])) ((out_RETIRE_NUM_REG_RE [i]));
253	}
254	for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
255	{
256	((_Reservation_station-> in_GPR_WRITE_VAL [i])) (( in_GPR_WRITE_VAL [i]));
257	if (_param->_have_port_ooo_engine_id)
258	((_Reservation_station-> in_GPR_WRITE_OOO_ENGINE_ID [i])) (( in_GPR_WRITE_OOO_ENGINE_ID [i]));
259	((_Reservation_station-> in_GPR_WRITE_NUM_REG [i])) (( in_GPR_WRITE_NUM_REG [i]));
260	((_Reservation_station-> in_GPR_WRITE_DATA [i])) (( in_GPR_WRITE_DATA [i]));
261	}
262	for (uint32_t i=0; i<_param->_nb_spr_write; i++)
263	{
264	((_Reservation_station-> in_SPR_WRITE_VAL [i])) (( in_SPR_WRITE_VAL [i]));
265	if (_param->_have_port_ooo_engine_id)
266	((_Reservation_station-> in_SPR_WRITE_OOO_ENGINE_ID [i])) (( in_SPR_WRITE_OOO_ENGINE_ID [i]));
267	((_Reservation_station-> in_SPR_WRITE_NUM_REG [i])) (( in_SPR_WRITE_NUM_REG [i]));
268	((_Reservation_station-> in_SPR_WRITE_DATA [i])) (( in_SPR_WRITE_DATA [i]));
269	}
270	for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
271	{
272	if (_param->_have_port_ooo_engine_id)
273	((_Reservation_station-> in_BYPASS_WRITE_OOO_ENGINE_ID [i])) (( in_BYPASS_WRITE_OOO_ENGINE_ID [i]));
274	((_Reservation_station-> in_BYPASS_WRITE_GPR_VAL [i])) (( in_BYPASS_WRITE_GPR_VAL [i]));
275	((_Reservation_station-> in_BYPASS_WRITE_GPR_NUM_REG [i])) (( in_BYPASS_WRITE_GPR_NUM_REG [i]));
276	((_Reservation_station-> in_BYPASS_WRITE_GPR_DATA [i])) (( in_BYPASS_WRITE_GPR_DATA [i]));
277	((_Reservation_station-> in_BYPASS_WRITE_SPR_VAL [i])) (( in_BYPASS_WRITE_SPR_VAL [i]));
278	((_Reservation_station-> in_BYPASS_WRITE_SPR_NUM_REG [i])) (( in_BYPASS_WRITE_SPR_NUM_REG [i]));
279	((_Reservation_station-> in_BYPASS_WRITE_SPR_DATA [i])) (( in_BYPASS_WRITE_SPR_DATA [i]));
280	}
281	for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
282	{
283	((_Reservation_station-> in_BYPASS_MEMORY_VAL [i])) (( in_BYPASS_MEMORY_VAL [i]));
284	if (_param->_have_port_ooo_engine_id)
285	((_Reservation_station-> in_BYPASS_MEMORY_OOO_ENGINE_ID [i])) (( in_BYPASS_MEMORY_OOO_ENGINE_ID [i]));
286	((_Reservation_station-> in_BYPASS_MEMORY_NUM_REG [i])) (( in_BYPASS_MEMORY_NUM_REG [i]));
287	((_Reservation_station-> in_BYPASS_MEMORY_DATA [i])) (( in_BYPASS_MEMORY_DATA [i]));
288	}
289
290	cout << "<" << name << "> Start Simulation ............" << endl;
291	Time * _time = new Time();
292
293	/********************************************************
294	* Simulation - Begin
295	********************************************************/
296
297	// Initialisation
298
299	const uint32_t nb_request = _param->_nb_packet;
300	const uint32_t seed = 0;
301	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
302	srand(seed);
303
304	Tcontext_t _ooo_engine_id [nb_request];
305	Tcontrol_t _read_ra [nb_request];
306	Tgeneral_address_t _num_reg_ra [nb_request];
307	Tcontrol_t _read_rb [nb_request];
308	Tgeneral_address_t _num_reg_rb [nb_request];
309	Tcontrol_t _read_rc [nb_request];
310	Tspecial_address_t _num_reg_rc [nb_request];
311
312	// emulation of registerFile
313	Tcontrol_t _gpr_val [_param->_nb_general_register][_param->_nb_ooo_engine];
314	Tgeneral_data_t _gpr [_param->_nb_general_register][_param->_nb_ooo_engine];
315	Tcontrol_t _spr_val [_param->_nb_special_register][_param->_nb_ooo_engine];
316	Tspecial_data_t _spr [_param->_nb_special_register][_param->_nb_ooo_engine];
317
318	SC_START(0);
319
320	LABEL("Initialisation");
321	in_INSERT_VAL ->write(0);
322	for (uint32_t i=0; i<_param->_nb_inst_retire ; i++)
323	in_RETIRE_ACK [i]->write(0);
324	for (uint32_t i=0; i<_param->_nb_gpr_write ; i++)
325	in_GPR_WRITE_VAL [i]->write(0);
326	for (uint32_t i=0; i<_param->_nb_spr_write ; i++)
327	in_SPR_WRITE_VAL [i]->write(0);
328	for (uint32_t i=0; i<_param->_nb_bypass_write ; i++)
329	{
330	in_BYPASS_WRITE_GPR_VAL [i]->write(0);
331	in_BYPASS_WRITE_SPR_VAL [i]->write(0);
332	}
333	for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
334	in_BYPASS_MEMORY_VAL [i]->write(0);
335
336	in_NRESET->write(0);
337	SC_START(5);
338	in_NRESET->write(1);
339
340	LABEL("Loop of Test");
341
342	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
343	{
344	LABEL("Iteration "+toString(iteration));
345
346	int32_t percent_transaction_queue_in = (rand()%50)+25;
347	int32_t percent_transaction_queue_out = (rand()%50)+25;
348	int32_t percent_registerfile_valid = (rand()%50)+25;
349	int32_t percent_transaction_registerfile = (rand()%50)+25;
350	int32_t percent_transaction_bypass = (rand()%50)+25;
351
352	LABEL("Initialisation");
353
354	for (uint32_t i=0; i<nb_request; i++)
355	{
356	_ooo_engine_id [i] = rand()% _param->_nb_ooo_engine ;
357	_read_ra [i] = rand()% 2 ;
358	_num_reg_ra [i] = rand()% _param->_nb_general_register ;
359	_read_rb [i] = rand()% 2 ;
360	_num_reg_rb [i] = rand()% _param->_nb_general_register ;
361	_read_rc [i] = rand()% 2 ;
362	_num_reg_rc [i] = rand()% _param->_nb_special_register ;
363	}
364
365	// emulation of registerFile
366	for (uint32_t j=0; j<_param->_nb_ooo_engine; j++)
367	{
368	for (uint32_t i=0; i<_param->_nb_general_register; i++)
369	{
370	_gpr_val [i][j] = ((rand()%100) < percent_registerfile_valid);
371	_gpr [i][j] = range<Tgeneral_data_t>(rand(),_param->_size_general_data);
372	}
373	for (uint32_t i=0; i<_param->_nb_special_register; i++)
374	{
375	_spr_val [i][j] = ((rand()%100) < percent_registerfile_valid);
376	_spr [i][j] = range<Tspecial_data_t>(rand(),_param->_size_special_data);
377	}
378	}
379	// End initialisation .......
380
381	uint32_t request_in = 0;
382	uint32_t request_out = 0;
383	bool request_out_wait [nb_request];
384
385	for (uint32_t i=0; i<nb_request; i++)
386	request_out_wait [i] = true;
387
388	bool can_gpr_use [_param->_nb_ooo_engine][_param->_nb_general_register];
389	bool can_spr_use [_param->_nb_ooo_engine][_param->_nb_special_register];
390	bool need_gpr [_param->_nb_ooo_engine][_param->_nb_general_register];
391	bool need_spr [_param->_nb_ooo_engine][_param->_nb_special_register];
392
393
394	for (uint32_t j=0; j<_param->_nb_ooo_engine; j++)
395	{
396	for (uint32_t i=0; i<_param->_nb_general_register; i++)
397	need_gpr [j][i] = false;
398	for (uint32_t i=0; i<_param->_nb_special_register; i++)
399	need_spr [j][i] = false;
400	}
401
402	while (request_out < nb_request)
403	{
404	for (uint32_t j=0; j<_param->_nb_ooo_engine; j++)
405	{
406	for (uint32_t i=0; i<_param->_nb_general_register; i++)
407	can_gpr_use [j][i] = true;
408	for (uint32_t i=0; i<_param->_nb_special_register; i++)
409	can_spr_use [j][i] = true;
410	}
411
412	Tcontrol_t insert_val = (request_in < nb_request) and ((rand()%100) < percent_transaction_queue_in);
413	Tcontext_t insert_ooo_engine_id;
414	Tgeneral_address_t insert_num_reg_ra;
415	Tgeneral_address_t insert_num_reg_rb;
416	Tspecial_address_t insert_num_reg_rc;
417
418	in_INSERT_VAL ->write(insert_val);
419	if (insert_val)
420	{
421	bool data_val;
422	insert_ooo_engine_id = _ooo_engine_id [request_in];
423	insert_num_reg_ra = _num_reg_ra [request_in];
424	insert_num_reg_rb = _num_reg_rb [request_in];
425	insert_num_reg_rc = _num_reg_rc [request_in];
426
427	if (_param->_have_port_context_id)
428	in_INSERT_CONTEXT_ID ->write((2*insert_ooo_engine_id)%_param->_nb_context );
429	if (_param->_have_port_front_end_id)
430	in_INSERT_FRONT_END_ID ->write((3*insert_ooo_engine_id)%_param->_nb_front_end);
431	if (_param->_have_port_ooo_engine_id)
432	in_INSERT_OOO_ENGINE_ID ->write(insert_ooo_engine_id);
433	if (_param->_have_port_rob_id)
434	in_INSERT_ROB_ID ->write(request_in);
435	in_INSERT_OPERATION ->write(0);
436	in_INSERT_TYPE ->write(0);
437	in_INSERT_HAS_IMMEDIAT->write(0);
438	in_INSERT_IMMEDIAT ->write(0);
439	// in_INSERT_READ_RA ->write(_read_ra[request_in]);
440	data_val = not(_read_ra[request_in]) or _gpr_val[insert_num_reg_ra][insert_ooo_engine_id];
441
442	need_gpr [insert_ooo_engine_id][insert_num_reg_ra] \|= not data_val;
443
444	in_INSERT_NUM_REG_RA ->write(insert_num_reg_ra);
445	in_INSERT_DATA_RA_VAL ->write(data_val);
446	in_INSERT_DATA_RA ->write((data_val)?_gpr[insert_num_reg_ra][insert_ooo_engine_id]:0);
447	// in_INSERT_READ_RB ->write(_read_rb[request_in]);
448	data_val = not(_read_rb[request_in]) or _gpr_val[insert_num_reg_rb][insert_ooo_engine_id];
449
450	need_gpr [insert_ooo_engine_id][insert_num_reg_rb] \|= not data_val;
451
452	in_INSERT_NUM_REG_RB ->write(insert_num_reg_rb);
453	in_INSERT_DATA_RB_VAL ->write(data_val);
454	in_INSERT_DATA_RB ->write((data_val)?_gpr[insert_num_reg_rb][insert_ooo_engine_id]:0);
455	// in_INSERT_READ_RC ->write(_read_rc[request_in]);
456	data_val = not(_read_rc[request_in]) or _spr_val[insert_num_reg_rc][insert_ooo_engine_id];
457
458	need_spr [insert_ooo_engine_id][insert_num_reg_rc] \|= not data_val;
459
460	in_INSERT_NUM_REG_RC ->write(insert_num_reg_rc);
461	in_INSERT_DATA_RC_VAL ->write(data_val);
462	in_INSERT_DATA_RC ->write((data_val)?_spr[insert_num_reg_rc][insert_ooo_engine_id]:0);
463	in_INSERT_WRITE_RD ->write(0);
464	in_INSERT_NUM_REG_RD ->write(0);
465	in_INSERT_WRITE_RE ->write(0);
466	in_INSERT_NUM_REG_RE ->write(0);
467
468	can_gpr_use [insert_ooo_engine_id][insert_num_reg_ra] = false;
469	can_gpr_use [insert_ooo_engine_id][insert_num_reg_rb] = false;
470	can_spr_use [insert_ooo_engine_id][insert_num_reg_rc] = false;
471	}
472
473	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
474	in_RETIRE_ACK[i]->write((rand()%100)<percent_transaction_queue_out);
475
476	LABEL("Bypass Network :");
477	for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
478	{
479	Tgeneral_address_t num_reg = rand()% _param->_nb_general_register;
480	Tcontext_t ooo_engine = rand()% _param->_nb_ooo_engine;
481	Tcontrol_t val = (_gpr_val [num_reg][ooo_engine]== 0)?((rand()%100) < percent_transaction_registerfile):0;
482	Tgeneral_data_t data = range<Tgeneral_data_t>(rand(),_param->_size_general_data);
483
484	val = (val and can_gpr_use [ooo_engine][num_reg] and need_gpr [ooo_engine][num_reg]);
485
486	in_GPR_WRITE_VAL [i]->write(val);
487	if (_param->_have_port_ooo_engine_id)
488	in_GPR_WRITE_OOO_ENGINE_ID [i]->write(ooo_engine);
489	in_GPR_WRITE_NUM_REG [i]->write(num_reg);
490	in_GPR_WRITE_DATA [i]->write(data);
491
492	if (val)
493	{
494	LABEL(" * GPR_WRITE ["+toString(i)+"] - gpr["+toString(num_reg)+"]["+toString(ooo_engine)+"] <- "+toString(data));
495	can_gpr_use [ooo_engine][num_reg] = false;
496	need_gpr [ooo_engine][num_reg] = false;
497
498
499	_gpr [num_reg][ooo_engine] = data;
500	_gpr_val [num_reg][ooo_engine] = 1;
501	}
502	}
503	for (uint32_t i=0; i<_param->_nb_spr_write; i++)
504	{
505	Tspecial_address_t num_reg = rand()% _param->_nb_special_register;
506	Tcontext_t ooo_engine = rand()% _param->_nb_ooo_engine;
507	Tcontrol_t val = (_spr_val [num_reg][ooo_engine]== 0)?((rand()%100) < percent_transaction_registerfile):0;
508	Tspecial_data_t data = range<Tspecial_data_t>(rand(),_param->_size_special_data);
509
510	val = (val and can_spr_use [ooo_engine][num_reg] and need_spr[ooo_engine][num_reg]);
511
512	in_SPR_WRITE_VAL [i]->write(val);
513	if (_param->_have_port_ooo_engine_id)
514	in_SPR_WRITE_OOO_ENGINE_ID [i]->write(ooo_engine);
515	in_SPR_WRITE_NUM_REG [i]->write(num_reg);
516	in_SPR_WRITE_DATA [i]->write(data);
517
518	if (val == 1)
519	{
520	LABEL(" * SPR_WRITE ["+toString(i)+"] - spr["+toString(num_reg)+"]["+toString(ooo_engine)+"] <- "+toString(data));
521	can_spr_use [ooo_engine][num_reg] = false;
522	need_spr[ooo_engine][num_reg] = false;
523
524	_spr [num_reg][ooo_engine] = data;
525	_spr_val [num_reg][ooo_engine] = 1;
526	}
527	}
528
529	for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
530	{
531	Tcontext_t ooo_engine = rand()% _param->_nb_ooo_engine;
532	if (_param->_have_port_ooo_engine_id)
533	in_BYPASS_WRITE_OOO_ENGINE_ID [i]->write(ooo_engine);
534
535	Tgeneral_address_t gpr_num_reg = rand()% _param->_nb_general_register;
536	Tcontrol_t gpr_val = (_gpr_val [gpr_num_reg][ooo_engine]== 0)?((rand()%100) < percent_transaction_bypass):0;
537	Tgeneral_data_t gpr_data = range<Tgeneral_data_t>(rand(),_param->_size_general_data);
538
539	gpr_val = (gpr_val and can_gpr_use [ooo_engine][gpr_num_reg] and need_gpr[ooo_engine][gpr_num_reg]);
540
541	in_BYPASS_WRITE_GPR_VAL [i]->write(gpr_val);
542	in_BYPASS_WRITE_GPR_NUM_REG[i]->write(gpr_num_reg);
543	in_BYPASS_WRITE_GPR_DATA [i]->write(gpr_data);
544
545	if (gpr_val)
546	{
547	LABEL(" * BYPASS_WRITE ["+toString(i)+"] - gpr["+toString(gpr_num_reg)+"]["+toString(ooo_engine)+"] <- "+toString(gpr_data));
548	can_gpr_use [ooo_engine][gpr_num_reg] = false;
549	need_gpr[ooo_engine][gpr_num_reg] = false;
550
551	_gpr [gpr_num_reg][ooo_engine] = gpr_data;
552	_gpr_val [gpr_num_reg][ooo_engine] = 1;
553	}
554
555	Tspecial_address_t spr_num_reg = rand()% _param->_nb_special_register;
556	Tcontrol_t spr_val = (_spr_val [spr_num_reg][ooo_engine]== 0)?((rand()%100) < percent_transaction_bypass):0;
557	Tspecial_data_t spr_data = range<Tspecial_data_t>(rand(),_param->_size_special_data);
558
559	spr_val = (spr_val and can_spr_use [ooo_engine][spr_num_reg] and need_spr[ooo_engine][spr_num_reg]);
560
561	in_BYPASS_WRITE_SPR_VAL [i]->write(spr_val);
562	in_BYPASS_WRITE_SPR_NUM_REG[i]->write(spr_num_reg);
563	in_BYPASS_WRITE_SPR_DATA [i]->write(spr_data);
564
565	if (spr_val)
566	{
567	LABEL(" * BYPASS_WRITE ["+toString(i)+"] - spr["+toString(spr_num_reg)+"]["+toString(ooo_engine)+"] <- "+toString(spr_data));
568	can_spr_use [ooo_engine][spr_num_reg] = false;
569	need_spr[ooo_engine][spr_num_reg] = false;
570
571	_spr [spr_num_reg][ooo_engine] = spr_data;
572	_spr_val [spr_num_reg][ooo_engine] = 1;
573	}
574
575	}
576
577	for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
578	{
579	Tcontext_t ooo_engine = rand()% _param->_nb_ooo_engine;
580	if (_param->_have_port_ooo_engine_id)
581	in_BYPASS_MEMORY_OOO_ENGINE_ID [i]->write(ooo_engine);
582
583	Tgeneral_address_t num_reg = rand()% _param->_nb_general_register;
584	Tcontrol_t val = (_gpr_val [num_reg][ooo_engine]== 0)?((rand()%100) < percent_transaction_bypass):0;
585	Tgeneral_data_t data = range<Tgeneral_data_t>(rand(),_param->_size_general_data);
586
587	val = (val and can_gpr_use [ooo_engine][num_reg] and need_gpr [ooo_engine][num_reg]);
588
589	in_BYPASS_MEMORY_VAL [i]->write(val);
590	in_BYPASS_MEMORY_NUM_REG[i]->write(num_reg);
591	in_BYPASS_MEMORY_DATA [i]->write(data);
592
593	if (val)
594	{
595	LABEL(" * BYPASS_MEMORY ["+toString(i)+"] - gpr["+toString(num_reg)+"]["+toString(ooo_engine)+"] <- "+toString(data));
596	can_gpr_use [ooo_engine][num_reg] = false;
597	need_gpr [ooo_engine][num_reg] = false;
598
599	_gpr [num_reg][ooo_engine] = data;
600	_gpr_val [num_reg][ooo_engine] = 1;
601	}
602	}
603	SC_START(0); // to mealy function
604
605	// LABEL("Test INSERT : "+toString(in_INSERT_VAL->read())+","+toString(out_INSERT_ACK->read()));
606	if (( in_INSERT_VAL->read() == 1) and
607	(out_INSERT_ACK->read() == 1))
608	{
609	LABEL("Accepted INSERT number : "+toString(request_in));
610	request_in ++;
611	}
612
613	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
614	{
615	LABEL("Test RETIRE "+toString(i)+" : "+toString(out_RETIRE_VAL[i]->read())+","+toString(in_RETIRE_ACK[i]->read()));
616	if ((out_RETIRE_VAL [i]->read() == 1) and
617	( in_RETIRE_ACK [i]->read() == 1))
618	{
619	Tpacket_t rob_id;
620	if (_param->_have_port_rob_id)
621	rob_id = out_RETIRE_ROB_ID [i]->read();
622	else
623	rob_id = 0;
624	LABEL("Accepted RETIRE ["+toString(i)+"] number : "+toString(rob_id)+", request number : "+toString(request_out));
625	TEST(bool, request_out_wait [rob_id] , true);
626
627	request_out ++;
628	request_out_wait [rob_id] = false;
629
630	Tcontext_t ooo_engine_id = _ooo_engine_id [rob_id];
631
632	if (_param->_have_port_context_id)
633	TEST(Tcontext_t ,out_RETIRE_CONTEXT_ID [i]->read(),(2*ooo_engine_id)%_param->_nb_context );
634	if (_param->_have_port_front_end_id)
635	TEST(Tcontext_t ,out_RETIRE_FRONT_END_ID [i]->read(),(3*ooo_engine_id)%_param->_nb_front_end);
636	if (_param->_have_port_ooo_engine_id)
637	TEST(Tcontext_t ,out_RETIRE_OOO_ENGINE_ID[i]->read(),ooo_engine_id);
638
639	if (_read_ra [rob_id])
640	TEST(Tgeneral_data_t ,out_RETIRE_DATA_RA [i]->read(),_gpr[_num_reg_ra[rob_id]][ooo_engine_id]);
641
642	if (_read_rb [rob_id])
643	TEST(Tgeneral_data_t ,out_RETIRE_DATA_RB [i]->read(),_gpr[_num_reg_rb[rob_id]][ooo_engine_id]);
644
645	if (_read_rc [rob_id])
646	TEST(Tspecial_data_t ,out_RETIRE_DATA_RC [i]->read(),_spr[_num_reg_rc[rob_id]][ooo_engine_id]);
647
648	// need_gpr [ooo_engine_id][_num_reg_ra[rob_id]]= true;
649	// need_gpr [ooo_engine_id][_num_reg_rb[rob_id]]= true;
650	// need_spr [ooo_engine_id][_num_reg_rc[rob_id]]= true;
651	}
652	}
653
654	SC_START(1);
655	}
656	}
657
658	/********************************************************
659	* Simulation - End
660	********************************************************/
661
662	TEST_OK ("End of Simulation");
663	delete _time;
664	cout << "<" << name << "> ............ Stop Simulation" << endl;
665
666	delete in_CLOCK ;
667	delete in_NRESET;
668
669	delete in_INSERT_VAL ;
670	delete out_INSERT_ACK ;
671	if (_param->_have_port_context_id)
672	delete in_INSERT_CONTEXT_ID ;
673	if (_param->_have_port_front_end_id)
674	delete in_INSERT_FRONT_END_ID ;
675	if (_param->_have_port_ooo_engine_id)
676	delete in_INSERT_OOO_ENGINE_ID ;
677	if (_param->_have_port_rob_id)
678	delete in_INSERT_ROB_ID ;
679	delete in_INSERT_OPERATION ;
680	delete in_INSERT_TYPE ;
681	delete in_INSERT_HAS_IMMEDIAT;
682	delete in_INSERT_IMMEDIAT ;
683	//delete in_INSERT_READ_RA ;
684	delete in_INSERT_NUM_REG_RA ;
685	delete in_INSERT_DATA_RA_VAL ;
686	delete in_INSERT_DATA_RA ;
687	//delete in_INSERT_READ_RB ;
688	delete in_INSERT_NUM_REG_RB ;
689	delete in_INSERT_DATA_RB_VAL ;
690	delete in_INSERT_DATA_RB ;
691	//delete in_INSERT_READ_RC ;
692	delete in_INSERT_NUM_REG_RC ;
693	delete in_INSERT_DATA_RC_VAL ;
694	delete in_INSERT_DATA_RC ;
695	delete in_INSERT_WRITE_RD ;
696	delete in_INSERT_NUM_REG_RD ;
697	delete in_INSERT_WRITE_RE ;
698	delete in_INSERT_NUM_REG_RE ;
699
700	delete [] out_RETIRE_VAL ;
701	delete [] in_RETIRE_ACK ;
702	if (_param->_have_port_context_id)
703	delete [] out_RETIRE_CONTEXT_ID ;
704	if (_param->_have_port_front_end_id)
705	delete [] out_RETIRE_FRONT_END_ID;
706	if (_param->_have_port_ooo_engine_id)
707	delete [] out_RETIRE_OOO_ENGINE_ID ;
708	if (_param->_have_port_rob_id)
709	delete [] out_RETIRE_ROB_ID ;
710	delete [] out_RETIRE_OPERATION ;
711	delete [] out_RETIRE_TYPE ;
712	delete [] out_RETIRE_HAS_IMMEDIAT;
713	delete [] out_RETIRE_IMMEDIAT ;
714	delete [] out_RETIRE_DATA_RA ;
715	delete [] out_RETIRE_DATA_RB ;
716	delete [] out_RETIRE_DATA_RC ;
717	delete [] out_RETIRE_WRITE_RD ;
718	delete [] out_RETIRE_NUM_REG_RD ;
719	delete [] out_RETIRE_WRITE_RE ;
720	delete [] out_RETIRE_NUM_REG_RE ;
721
722	delete [] in_GPR_WRITE_VAL ;
723	if (_param->_have_port_ooo_engine_id)
724	delete [] in_GPR_WRITE_OOO_ENGINE_ID;
725	delete [] in_GPR_WRITE_NUM_REG ;
726	delete [] in_GPR_WRITE_DATA ;
727
728	delete [] in_SPR_WRITE_VAL ;
729	if (_param->_have_port_ooo_engine_id)
730	delete [] in_SPR_WRITE_OOO_ENGINE_ID;
731	delete [] in_SPR_WRITE_NUM_REG ;
732	delete [] in_SPR_WRITE_DATA ;
733
734	if (_param->_have_port_ooo_engine_id)
735	delete [] in_BYPASS_WRITE_OOO_ENGINE_ID ;
736	delete [] in_BYPASS_WRITE_GPR_VAL ;
737	delete [] in_BYPASS_WRITE_GPR_NUM_REG;
738	delete [] in_BYPASS_WRITE_GPR_DATA ;
739	delete [] in_BYPASS_WRITE_SPR_VAL ;
740	delete [] in_BYPASS_WRITE_SPR_NUM_REG;
741	delete [] in_BYPASS_WRITE_SPR_DATA ;
742
743	delete [] in_BYPASS_MEMORY_VAL ;
744	if (_param->_have_port_ooo_engine_id)
745	delete [] in_BYPASS_MEMORY_OOO_ENGINE_ID;
746	delete [] in_BYPASS_MEMORY_NUM_REG ;
747	delete [] in_BYPASS_MEMORY_DATA ;
748	#endif
749
750	delete _Reservation_station;
751	#ifdef STATISTICS
752	delete _parameters_statistics;
753	#endif
754	}

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