[55] | 1 | #ifdef SYSTEMC |
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| 2 | /* |
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| 3 | * $Id$ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Reservation_station.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace core { |
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| 14 | namespace multi_execute_loop { |
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| 15 | namespace execute_loop { |
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| 16 | namespace multi_read_unit { |
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| 17 | namespace read_unit { |
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| 18 | namespace reservation_station { |
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| 19 | |
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| 20 | |
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| 21 | |
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| 22 | #undef FUNCTION |
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| 23 | #define FUNCTION "Reservation_station::allocation" |
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| 24 | void Reservation_station::allocation (void) |
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| 25 | { |
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| 26 | string rename; |
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| 27 | |
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| 28 | log_printf(FUNC,Reservation_station,FUNCTION,"Begin"); |
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| 29 | |
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| 30 | _component = new Component (); |
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| 31 | |
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| 32 | Entity * entity = _component->set_entity (_name |
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| 33 | ,"Reservation_station" |
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| 34 | #ifdef POSITION |
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| 35 | ,COMBINATORY |
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| 36 | #endif |
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| 37 | ); |
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| 38 | |
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| 39 | _interfaces = entity->set_interfaces(); |
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| 40 | |
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| 41 | // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 42 | |
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| 43 | Interface * interface = _interfaces->set_interface("" |
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| 44 | #ifdef POSITION |
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| 45 | ,IN |
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| 46 | ,SOUTH, |
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| 47 | "Generalist interface" |
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| 48 | #endif |
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| 49 | ); |
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| 50 | |
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| 51 | in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); |
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| 52 | in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES); |
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| 53 | |
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[69] | 54 | // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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[55] | 55 | { |
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[69] | 56 | Interface_fifo * interface = _interfaces->set_interface("insert" |
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[55] | 57 | #ifdef POSITION |
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| 58 | ,IN |
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| 59 | ,EAST |
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| 60 | ,"Input of reservation_station" |
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| 61 | #endif |
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| 62 | ); |
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| 63 | |
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[69] | 64 | in_INSERT_VAL = interface->set_signal_valack_in (VAL); |
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| 65 | out_INSERT_ACK = interface->set_signal_valack_out (ACK); |
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| 66 | if (_param->_have_port_context_id) |
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| 67 | in_INSERT_CONTEXT_ID = interface->set_signal_in <Tcontext_t > ("context_id" ,_param->_size_context_id ); |
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| 68 | if (_param->_have_port_front_end_id) |
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| 69 | in_INSERT_FRONT_END_ID = interface->set_signal_in <Tcontext_t > ("front_end_id" ,_param->_size_front_end_id ); |
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| 70 | if (_param->_have_port_ooo_engine_id) |
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| 71 | in_INSERT_OOO_ENGINE_ID = interface->set_signal_in <Tcontext_t > ("ooo_engine_id" ,_param->_size_ooo_engine_id ); |
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| 72 | if (_param->_have_port_rob_id) |
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| 73 | in_INSERT_ROB_ID = interface->set_signal_in <Tpacket_t > ("rob_id" ,_param->_size_rob_id ); |
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| 74 | in_INSERT_OPERATION = interface->set_signal_in <Toperation_t > ("operation" ,_param->_size_operation ); |
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| 75 | in_INSERT_TYPE = interface->set_signal_in <Ttype_t > ("type" ,_param->_size_type ); |
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| 76 | in_INSERT_HAS_IMMEDIAT = interface->set_signal_in <Tcontrol_t > ("has_immediat" ,1 ); |
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| 77 | in_INSERT_IMMEDIAT = interface->set_signal_in <Tgeneral_data_t > ("immediat" ,_param->_size_general_data ); |
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| 78 | // in_INSERT_READ_RA = interface->set_signal_in <Tcontrol_t > ("read_ra" ,1 ); |
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| 79 | in_INSERT_NUM_REG_RA = interface->set_signal_in <Tgeneral_address_t> ("num_reg_ra" ,_param->_size_general_register ); |
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| 80 | in_INSERT_DATA_RA_VAL = interface->set_signal_in <Tcontrol_t > ("data_ra_val" ,1 ); |
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| 81 | in_INSERT_DATA_RA = interface->set_signal_in <Tgeneral_data_t > ("data_ra" ,_param->_size_general_data ); |
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| 82 | // in_INSERT_READ_RB = interface->set_signal_in <Tcontrol_t > ("read_rb" ,1 ); |
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| 83 | in_INSERT_NUM_REG_RB = interface->set_signal_in <Tgeneral_address_t> ("num_reg_rb" ,_param->_size_general_register ); |
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| 84 | in_INSERT_DATA_RB_VAL = interface->set_signal_in <Tcontrol_t > ("data_rb_val" ,1 ); |
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| 85 | in_INSERT_DATA_RB = interface->set_signal_in <Tgeneral_data_t > ("data_rb" ,_param->_size_general_data ); |
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| 86 | // in_INSERT_READ_RC = interface->set_signal_in <Tcontrol_t > ("read_rc" ,1 ); |
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| 87 | in_INSERT_NUM_REG_RC = interface->set_signal_in <Tspecial_address_t> ("num_reg_rc" ,_param->_size_special_register ); |
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| 88 | in_INSERT_DATA_RC_VAL = interface->set_signal_in <Tcontrol_t > ("data_rc_val" ,1 ); |
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| 89 | in_INSERT_DATA_RC = interface->set_signal_in <Tspecial_data_t > ("data_rc" ,_param->_size_special_data ); |
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| 90 | in_INSERT_WRITE_RD = interface->set_signal_in <Tcontrol_t > ("write_rd" ,1 ); |
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| 91 | in_INSERT_NUM_REG_RD = interface->set_signal_in <Tgeneral_address_t> ("num_reg_rd" ,_param->_size_general_register ); |
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| 92 | in_INSERT_WRITE_RE = interface->set_signal_in <Tcontrol_t > ("write_re" ,1 ); |
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| 93 | in_INSERT_NUM_REG_RE = interface->set_signal_in <Tspecial_address_t> ("num_reg_re" ,_param->_size_special_register ); |
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[55] | 94 | } |
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| 95 | |
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[69] | 96 | // ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 97 | out_RETIRE_VAL = new SC_OUT(Tcontrol_t ) * [_param->_nb_inst_retire]; |
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| 98 | in_RETIRE_ACK = new SC_IN (Tcontrol_t ) * [_param->_nb_inst_retire]; |
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| 99 | if (_param->_have_port_context_id) |
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| 100 | out_RETIRE_CONTEXT_ID = new SC_OUT(Tcontext_t ) * [_param->_nb_inst_retire]; |
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| 101 | if (_param->_have_port_front_end_id) |
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| 102 | out_RETIRE_FRONT_END_ID = new SC_OUT(Tcontext_t ) * [_param->_nb_inst_retire]; |
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| 103 | if (_param->_have_port_ooo_engine_id) |
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| 104 | out_RETIRE_OOO_ENGINE_ID = new SC_OUT(Tcontext_t ) * [_param->_nb_inst_retire]; |
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| 105 | if (_param->_have_port_rob_id) |
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| 106 | out_RETIRE_ROB_ID = new SC_OUT(Tpacket_t ) * [_param->_nb_inst_retire]; |
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| 107 | out_RETIRE_OPERATION = new SC_OUT(Toperation_t ) * [_param->_nb_inst_retire]; |
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| 108 | out_RETIRE_TYPE = new SC_OUT(Ttype_t ) * [_param->_nb_inst_retire]; |
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| 109 | out_RETIRE_HAS_IMMEDIAT = new SC_OUT(Tcontrol_t ) * [_param->_nb_inst_retire]; |
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| 110 | out_RETIRE_IMMEDIAT = new SC_OUT(Tgeneral_data_t ) * [_param->_nb_inst_retire]; |
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| 111 | out_RETIRE_DATA_RA = new SC_OUT(Tgeneral_data_t ) * [_param->_nb_inst_retire]; |
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| 112 | out_RETIRE_DATA_RB = new SC_OUT(Tgeneral_data_t ) * [_param->_nb_inst_retire]; |
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| 113 | out_RETIRE_DATA_RC = new SC_OUT(Tspecial_data_t ) * [_param->_nb_inst_retire]; |
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| 114 | out_RETIRE_WRITE_RD = new SC_OUT(Tcontrol_t ) * [_param->_nb_inst_retire]; |
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| 115 | out_RETIRE_NUM_REG_RD = new SC_OUT(Tgeneral_address_t) * [_param->_nb_inst_retire]; |
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| 116 | out_RETIRE_WRITE_RE = new SC_OUT(Tcontrol_t ) * [_param->_nb_inst_retire]; |
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| 117 | out_RETIRE_NUM_REG_RE = new SC_OUT(Tspecial_address_t) * [_param->_nb_inst_retire]; |
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[55] | 118 | |
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[69] | 119 | for (uint32_t i=0; i<_param->_nb_inst_retire; i++) |
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[55] | 120 | { |
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[69] | 121 | Interface_fifo * interface = _interfaces->set_interface("retire_"+toString(i) |
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[55] | 122 | #ifdef POSITION |
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| 123 | ,OUT |
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| 124 | ,WEST |
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| 125 | ,"Output of reservation_station" |
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| 126 | #endif |
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| 127 | ); |
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[69] | 128 | out_RETIRE_VAL [i] = interface->set_signal_valack_out(VAL); |
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| 129 | in_RETIRE_ACK [i] = interface->set_signal_valack_in (ACK); |
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| 130 | if (_param->_have_port_context_id) |
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| 131 | out_RETIRE_CONTEXT_ID [i] = interface->set_signal_out<Tcontext_t > ("context_id" ,_param->_size_context_id); |
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| 132 | if (_param->_have_port_front_end_id) |
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| 133 | out_RETIRE_FRONT_END_ID [i] = interface->set_signal_out<Tcontext_t > ("front_end_id" ,_param->_size_front_end_id); |
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| 134 | if (_param->_have_port_ooo_engine_id) |
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| 135 | out_RETIRE_OOO_ENGINE_ID[i] = interface->set_signal_out<Tcontext_t > ("ooo_engine_id",_param->_size_ooo_engine_id); |
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| 136 | if (_param->_have_port_rob_id) |
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| 137 | out_RETIRE_ROB_ID [i] = interface->set_signal_out<Tpacket_t > ("rob_id" ,_param->_size_rob_id); |
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| 138 | out_RETIRE_OPERATION [i] = interface->set_signal_out<Toperation_t > ("operation" ,_param->_size_operation); |
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| 139 | out_RETIRE_TYPE [i] = interface->set_signal_out<Ttype_t > ("type" ,_param->_size_type); |
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| 140 | out_RETIRE_HAS_IMMEDIAT [i] = interface->set_signal_out<Tcontrol_t > ("has_immediat" ,1); |
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| 141 | out_RETIRE_IMMEDIAT [i] = interface->set_signal_out<Tgeneral_data_t > ("immediat" ,_param->_size_general_data); |
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| 142 | out_RETIRE_DATA_RA [i] = interface->set_signal_out<Tgeneral_data_t > ("data_ra" ,_param->_size_general_data); |
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| 143 | out_RETIRE_DATA_RB [i] = interface->set_signal_out<Tgeneral_data_t > ("data_rb" ,_param->_size_general_data); |
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| 144 | out_RETIRE_DATA_RC [i] = interface->set_signal_out<Tspecial_data_t > ("data_rc" ,_param->_size_special_data); |
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| 145 | out_RETIRE_WRITE_RD [i] = interface->set_signal_out<Tcontrol_t > ("write_rd" ,1); |
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| 146 | out_RETIRE_NUM_REG_RD [i] = interface->set_signal_out<Tgeneral_address_t> ("num_reg_rd" ,_param->_size_general_register); |
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| 147 | out_RETIRE_WRITE_RE [i] = interface->set_signal_out<Tcontrol_t > ("write_re" ,1); |
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| 148 | out_RETIRE_NUM_REG_RE [i] = interface->set_signal_out<Tspecial_address_t> ("num_reg_re" ,_param->_size_special_register); |
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[55] | 149 | } |
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| 150 | |
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| 151 | // ~~~~~[ Interface : "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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[69] | 152 | in_GPR_WRITE_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_gpr_write]; |
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| 153 | if (_param->_have_port_ooo_engine_id) |
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| 154 | in_GPR_WRITE_OOO_ENGINE_ID= new SC_IN (Tcontext_t ) * [_param->_nb_gpr_write]; |
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| 155 | in_GPR_WRITE_NUM_REG = new SC_IN (Tgeneral_address_t) * [_param->_nb_gpr_write]; |
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| 156 | in_GPR_WRITE_DATA = new SC_IN (Tgeneral_data_t ) * [_param->_nb_gpr_write]; |
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[55] | 157 | |
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| 158 | for (uint32_t i=0; i<_param->_nb_gpr_write; i++) |
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| 159 | { |
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| 160 | Interface_fifo * interface = _interfaces->set_interface("gpr_write_"+toString(i) |
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| 161 | #ifdef POSITION |
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| 162 | , IN |
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| 163 | ,SOUTH |
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| 164 | , "Interface with write queue to bypass the write in the RegisterFile." |
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| 165 | #endif |
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| 166 | ); |
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| 167 | |
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[69] | 168 | in_GPR_WRITE_VAL [i] = interface->set_signal_valack_in (VAL); |
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| 169 | if (_param->_have_port_ooo_engine_id) |
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| 170 | in_GPR_WRITE_OOO_ENGINE_ID [i] = interface->set_signal_in <Tcontext_t > ("ooo_engine_id",_param->_size_ooo_engine_id); |
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| 171 | in_GPR_WRITE_NUM_REG [i] = interface->set_signal_in <Tgeneral_address_t> ("num_reg" ,_param->_size_general_register); |
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| 172 | in_GPR_WRITE_DATA [i] = interface->set_signal_in <Tgeneral_data_t > ("data" ,_param->_size_general_data); |
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[55] | 173 | } |
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| 174 | |
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| 175 | // ~~~~~[ Interface : "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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[69] | 176 | in_SPR_WRITE_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_spr_write]; |
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| 177 | if (_param->_have_port_ooo_engine_id) |
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| 178 | in_SPR_WRITE_OOO_ENGINE_ID= new SC_IN (Tcontext_t ) * [_param->_nb_spr_write]; |
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| 179 | in_SPR_WRITE_NUM_REG = new SC_IN (Tspecial_address_t) * [_param->_nb_spr_write]; |
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| 180 | in_SPR_WRITE_DATA = new SC_IN (Tspecial_data_t ) * [_param->_nb_spr_write]; |
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[55] | 181 | |
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| 182 | for (uint32_t i=0; i<_param->_nb_spr_write; i++) |
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| 183 | { |
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| 184 | Interface_fifo * interface = _interfaces->set_interface("spr_write_"+toString(i) |
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| 185 | #ifdef POSITION |
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| 186 | , IN |
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| 187 | ,SOUTH |
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| 188 | , "Interface with write queue to bypass the write in the RegisterFile." |
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| 189 | #endif |
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| 190 | ); |
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| 191 | |
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[69] | 192 | in_SPR_WRITE_VAL [i] = interface->set_signal_valack_in (VAL); |
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| 193 | if (_param->_have_port_ooo_engine_id) |
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| 194 | in_SPR_WRITE_OOO_ENGINE_ID [i] = interface->set_signal_in <Tcontext_t > ("ooo_engine_id",_param->_size_ooo_engine_id); |
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| 195 | in_SPR_WRITE_NUM_REG [i] = interface->set_signal_in <Tspecial_address_t> ("num_reg" ,_param->_size_special_register); |
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| 196 | in_SPR_WRITE_DATA [i] = interface->set_signal_in <Tspecial_data_t > ("data" ,_param->_size_special_data); |
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[55] | 197 | } |
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| 198 | |
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| 199 | // ~~~~~[ Interface : "bypass_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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[69] | 200 | if (_param->_have_port_ooo_engine_id) |
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| 201 | in_BYPASS_WRITE_OOO_ENGINE_ID = new SC_IN (Tcontext_t ) * [_param->_nb_bypass_write]; |
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| 202 | in_BYPASS_WRITE_GPR_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_bypass_write]; |
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| 203 | in_BYPASS_WRITE_GPR_NUM_REG = new SC_IN (Tgeneral_address_t) * [_param->_nb_bypass_write]; |
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| 204 | in_BYPASS_WRITE_GPR_DATA = new SC_IN (Tgeneral_data_t ) * [_param->_nb_bypass_write]; |
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| 205 | in_BYPASS_WRITE_SPR_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_bypass_write]; |
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| 206 | in_BYPASS_WRITE_SPR_NUM_REG = new SC_IN (Tspecial_address_t) * [_param->_nb_bypass_write]; |
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| 207 | in_BYPASS_WRITE_SPR_DATA = new SC_IN (Tspecial_data_t ) * [_param->_nb_bypass_write]; |
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[55] | 208 | |
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| 209 | for (uint32_t i=0; i<_param->_nb_bypass_write; i++) |
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| 210 | { |
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| 211 | Interface_fifo * interface = _interfaces->set_interface("bypass_write_"+toString(i) |
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| 212 | #ifdef POSITION |
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| 213 | , IN |
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| 214 | ,NORTH |
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| 215 | , "Interface with write queue to bypass the write in the RegisterFile." |
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| 216 | #endif |
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| 217 | ); |
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| 218 | |
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[69] | 219 | if (_param->_have_port_ooo_engine_id) |
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| 220 | in_BYPASS_WRITE_OOO_ENGINE_ID [i] = interface->set_signal_in <Tcontext_t > ("ooo_engine_id" ,_param->_size_ooo_engine_id); |
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| 221 | in_BYPASS_WRITE_GPR_VAL [i] = interface->set_signal_valack_in ("gpr_val",VAL); |
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| 222 | in_BYPASS_WRITE_GPR_NUM_REG [i] = interface->set_signal_in <Tgeneral_address_t> ("gpr_num_reg" ,_param->_size_general_register); |
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| 223 | in_BYPASS_WRITE_GPR_DATA [i] = interface->set_signal_in <Tgeneral_data_t > ("gpr_data" ,_param->_size_general_data); |
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| 224 | in_BYPASS_WRITE_SPR_VAL [i] = interface->set_signal_valack_in ("spr_val",VAL); |
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| 225 | in_BYPASS_WRITE_SPR_NUM_REG [i] = interface->set_signal_in <Tspecial_address_t> ("spr_num_reg" ,_param->_size_general_register); |
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| 226 | in_BYPASS_WRITE_SPR_DATA [i] = interface->set_signal_in <Tspecial_data_t > ("spr_data" ,_param->_size_general_data); |
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[55] | 227 | } |
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| 228 | |
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| 229 | // ~~~~~[ Interface : "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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[69] | 230 | in_BYPASS_MEMORY_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_bypass_memory]; |
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| 231 | if (_param->_have_port_ooo_engine_id) |
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| 232 | in_BYPASS_MEMORY_OOO_ENGINE_ID= new SC_IN (Tcontext_t ) * [_param->_nb_bypass_memory]; |
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| 233 | in_BYPASS_MEMORY_NUM_REG = new SC_IN (Tgeneral_address_t) * [_param->_nb_bypass_memory]; |
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| 234 | in_BYPASS_MEMORY_DATA = new SC_IN (Tgeneral_data_t ) * [_param->_nb_bypass_memory]; |
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[55] | 235 | |
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| 236 | for (uint32_t i=0; i<_param->_nb_bypass_memory; i++) |
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| 237 | { |
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| 238 | Interface_fifo * interface = _interfaces->set_interface("bypass_memory_"+toString(i) |
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| 239 | #ifdef POSITION |
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| 240 | , IN |
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| 241 | , NORTH |
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| 242 | , "Interface with load/store unit to bypass the write in the RegisterFile." |
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| 243 | #endif |
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| 244 | ); |
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| 245 | |
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[69] | 246 | in_BYPASS_MEMORY_VAL [i] = interface->set_signal_valack_in (VAL); |
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| 247 | if (_param->_have_port_ooo_engine_id) |
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| 248 | in_BYPASS_MEMORY_OOO_ENGINE_ID[i] = interface->set_signal_in <Tcontext_t > ("ooo_engine_id",_param->_size_ooo_engine_id); |
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| 249 | in_BYPASS_MEMORY_NUM_REG [i] = interface->set_signal_in <Tgeneral_address_t> ("num_reg" ,_param->_size_general_register); |
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| 250 | in_BYPASS_MEMORY_DATA [i] = interface->set_signal_in <Tgeneral_data_t > ("data" ,_param->_size_general_data); |
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[55] | 251 | } |
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| 252 | |
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| 253 | |
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| 254 | // ~~~~~[ internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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[69] | 255 | internal_RETIRE_VAL = new Tcontrol_t [_param->_nb_inst_retire]; |
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| 256 | internal_RETIRE_SLOT = new uint32_t [_param->_nb_inst_retire]; |
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[55] | 257 | |
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| 258 | // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 259 | |
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| 260 | #ifdef POSITION |
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| 261 | _component->generate_file(); |
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| 262 | #endif |
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[69] | 263 | #ifdef SYSTEMC_VHDL_COMPATIBILITY |
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| 264 | _queue_valid = new bool [_param->_size_queue]; |
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| 265 | #else |
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[56] | 266 | _queue_control = new morpheo::behavioural::generic::queue_control::Queue_Control::Queue_Control(_param->_size_queue); |
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[69] | 267 | #endif |
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[55] | 268 | _queue = new Treservation_station_entry_t [_param->_size_queue]; |
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| 269 | |
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| 270 | log_printf(FUNC,Reservation_station,FUNCTION,"End"); |
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| 271 | }; |
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| 272 | |
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| 273 | }; // end namespace reservation_station |
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| 274 | }; // end namespace read_unit |
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| 275 | }; // end namespace multi_read_unit |
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| 276 | }; // end namespace execute_loop |
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| 277 | }; // end namespace multi_execute_loop |
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| 278 | }; // end namespace core |
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| 279 | |
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| 280 | }; // end namespace behavioural |
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| 281 | }; // end namespace morpheo |
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| 282 | #endif |
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