[55] | 1 | #ifdef SYSTEMC |
---|
| 2 | /* |
---|
| 3 | * $Id: Reservation_station_allocation.cpp 97 2008-12-19 15:34:00Z rosiere $ |
---|
| 4 | * |
---|
[88] | 5 | * [ Description ] |
---|
[55] | 6 | * |
---|
| 7 | */ |
---|
| 8 | |
---|
| 9 | #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Reservation_station.h" |
---|
| 10 | |
---|
| 11 | namespace morpheo { |
---|
| 12 | namespace behavioural { |
---|
| 13 | namespace core { |
---|
| 14 | namespace multi_execute_loop { |
---|
| 15 | namespace execute_loop { |
---|
| 16 | namespace multi_read_unit { |
---|
| 17 | namespace read_unit { |
---|
| 18 | namespace reservation_station { |
---|
| 19 | |
---|
| 20 | |
---|
| 21 | |
---|
| 22 | #undef FUNCTION |
---|
| 23 | #define FUNCTION "Reservation_station::allocation" |
---|
| 24 | void Reservation_station::allocation (void) |
---|
| 25 | { |
---|
| 26 | log_printf(FUNC,Reservation_station,FUNCTION,"Begin"); |
---|
| 27 | |
---|
[82] | 28 | _component = new Component (_usage); |
---|
[55] | 29 | |
---|
| 30 | Entity * entity = _component->set_entity (_name |
---|
| 31 | ,"Reservation_station" |
---|
| 32 | #ifdef POSITION |
---|
| 33 | ,COMBINATORY |
---|
| 34 | #endif |
---|
| 35 | ); |
---|
| 36 | |
---|
| 37 | _interfaces = entity->set_interfaces(); |
---|
| 38 | |
---|
[88] | 39 | // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
[55] | 40 | |
---|
| 41 | Interface * interface = _interfaces->set_interface("" |
---|
| 42 | #ifdef POSITION |
---|
| 43 | ,IN |
---|
| 44 | ,SOUTH, |
---|
| 45 | "Generalist interface" |
---|
| 46 | #endif |
---|
| 47 | ); |
---|
| 48 | |
---|
| 49 | in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); |
---|
| 50 | in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES); |
---|
| 51 | |
---|
[88] | 52 | // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
[55] | 53 | { |
---|
[69] | 54 | Interface_fifo * interface = _interfaces->set_interface("insert" |
---|
[55] | 55 | #ifdef POSITION |
---|
| 56 | ,IN |
---|
| 57 | ,EAST |
---|
| 58 | ,"Input of reservation_station" |
---|
| 59 | #endif |
---|
| 60 | ); |
---|
| 61 | |
---|
[69] | 62 | in_INSERT_VAL = interface->set_signal_valack_in (VAL); |
---|
| 63 | out_INSERT_ACK = interface->set_signal_valack_out (ACK); |
---|
| 64 | if (_param->_have_port_context_id) |
---|
| 65 | in_INSERT_CONTEXT_ID = interface->set_signal_in <Tcontext_t > ("context_id" ,_param->_size_context_id ); |
---|
| 66 | if (_param->_have_port_front_end_id) |
---|
| 67 | in_INSERT_FRONT_END_ID = interface->set_signal_in <Tcontext_t > ("front_end_id" ,_param->_size_front_end_id ); |
---|
| 68 | if (_param->_have_port_ooo_engine_id) |
---|
| 69 | in_INSERT_OOO_ENGINE_ID = interface->set_signal_in <Tcontext_t > ("ooo_engine_id" ,_param->_size_ooo_engine_id ); |
---|
[88] | 70 | if (_param->_have_port_rob_ptr) |
---|
| 71 | in_INSERT_ROB_ID = interface->set_signal_in <Tpacket_t > ("rob_id" ,_param->_size_rob_ptr ); |
---|
[69] | 72 | in_INSERT_OPERATION = interface->set_signal_in <Toperation_t > ("operation" ,_param->_size_operation ); |
---|
| 73 | in_INSERT_TYPE = interface->set_signal_in <Ttype_t > ("type" ,_param->_size_type ); |
---|
[88] | 74 | in_INSERT_STORE_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t> ("store_queue_ptr_write" ,_param->_size_store_queue_ptr); |
---|
[78] | 75 | if (_param->_have_port_load_queue_ptr) |
---|
[88] | 76 | in_INSERT_LOAD_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t> ("load_queue_ptr_write" ,_param->_size_load_queue_ptr ); |
---|
[69] | 77 | in_INSERT_HAS_IMMEDIAT = interface->set_signal_in <Tcontrol_t > ("has_immediat" ,1 ); |
---|
| 78 | in_INSERT_IMMEDIAT = interface->set_signal_in <Tgeneral_data_t > ("immediat" ,_param->_size_general_data ); |
---|
| 79 | // in_INSERT_READ_RA = interface->set_signal_in <Tcontrol_t > ("read_ra" ,1 ); |
---|
| 80 | in_INSERT_NUM_REG_RA = interface->set_signal_in <Tgeneral_address_t> ("num_reg_ra" ,_param->_size_general_register ); |
---|
| 81 | in_INSERT_DATA_RA_VAL = interface->set_signal_in <Tcontrol_t > ("data_ra_val" ,1 ); |
---|
| 82 | in_INSERT_DATA_RA = interface->set_signal_in <Tgeneral_data_t > ("data_ra" ,_param->_size_general_data ); |
---|
| 83 | // in_INSERT_READ_RB = interface->set_signal_in <Tcontrol_t > ("read_rb" ,1 ); |
---|
| 84 | in_INSERT_NUM_REG_RB = interface->set_signal_in <Tgeneral_address_t> ("num_reg_rb" ,_param->_size_general_register ); |
---|
| 85 | in_INSERT_DATA_RB_VAL = interface->set_signal_in <Tcontrol_t > ("data_rb_val" ,1 ); |
---|
| 86 | in_INSERT_DATA_RB = interface->set_signal_in <Tgeneral_data_t > ("data_rb" ,_param->_size_general_data ); |
---|
| 87 | // in_INSERT_READ_RC = interface->set_signal_in <Tcontrol_t > ("read_rc" ,1 ); |
---|
| 88 | in_INSERT_NUM_REG_RC = interface->set_signal_in <Tspecial_address_t> ("num_reg_rc" ,_param->_size_special_register ); |
---|
| 89 | in_INSERT_DATA_RC_VAL = interface->set_signal_in <Tcontrol_t > ("data_rc_val" ,1 ); |
---|
| 90 | in_INSERT_DATA_RC = interface->set_signal_in <Tspecial_data_t > ("data_rc" ,_param->_size_special_data ); |
---|
| 91 | in_INSERT_WRITE_RD = interface->set_signal_in <Tcontrol_t > ("write_rd" ,1 ); |
---|
| 92 | in_INSERT_NUM_REG_RD = interface->set_signal_in <Tgeneral_address_t> ("num_reg_rd" ,_param->_size_general_register ); |
---|
| 93 | in_INSERT_WRITE_RE = interface->set_signal_in <Tcontrol_t > ("write_re" ,1 ); |
---|
| 94 | in_INSERT_NUM_REG_RE = interface->set_signal_in <Tspecial_address_t> ("num_reg_re" ,_param->_size_special_register ); |
---|
[55] | 95 | } |
---|
| 96 | |
---|
[88] | 97 | // ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
[69] | 98 | out_RETIRE_VAL = new SC_OUT(Tcontrol_t ) * [_param->_nb_inst_retire]; |
---|
| 99 | in_RETIRE_ACK = new SC_IN (Tcontrol_t ) * [_param->_nb_inst_retire]; |
---|
| 100 | if (_param->_have_port_context_id) |
---|
| 101 | out_RETIRE_CONTEXT_ID = new SC_OUT(Tcontext_t ) * [_param->_nb_inst_retire]; |
---|
| 102 | if (_param->_have_port_front_end_id) |
---|
| 103 | out_RETIRE_FRONT_END_ID = new SC_OUT(Tcontext_t ) * [_param->_nb_inst_retire]; |
---|
| 104 | if (_param->_have_port_ooo_engine_id) |
---|
| 105 | out_RETIRE_OOO_ENGINE_ID = new SC_OUT(Tcontext_t ) * [_param->_nb_inst_retire]; |
---|
[88] | 106 | if (_param->_have_port_rob_ptr) |
---|
[69] | 107 | out_RETIRE_ROB_ID = new SC_OUT(Tpacket_t ) * [_param->_nb_inst_retire]; |
---|
| 108 | out_RETIRE_OPERATION = new SC_OUT(Toperation_t ) * [_param->_nb_inst_retire]; |
---|
| 109 | out_RETIRE_TYPE = new SC_OUT(Ttype_t ) * [_param->_nb_inst_retire]; |
---|
[76] | 110 | out_RETIRE_STORE_QUEUE_PTR_WRITE = new SC_OUT(Tlsq_ptr_t ) * [_param->_nb_inst_retire]; |
---|
[78] | 111 | if (_param->_have_port_load_queue_ptr) |
---|
[76] | 112 | out_RETIRE_LOAD_QUEUE_PTR_WRITE = new SC_OUT(Tlsq_ptr_t ) * [_param->_nb_inst_retire]; |
---|
[69] | 113 | out_RETIRE_HAS_IMMEDIAT = new SC_OUT(Tcontrol_t ) * [_param->_nb_inst_retire]; |
---|
| 114 | out_RETIRE_IMMEDIAT = new SC_OUT(Tgeneral_data_t ) * [_param->_nb_inst_retire]; |
---|
| 115 | out_RETIRE_DATA_RA = new SC_OUT(Tgeneral_data_t ) * [_param->_nb_inst_retire]; |
---|
| 116 | out_RETIRE_DATA_RB = new SC_OUT(Tgeneral_data_t ) * [_param->_nb_inst_retire]; |
---|
| 117 | out_RETIRE_DATA_RC = new SC_OUT(Tspecial_data_t ) * [_param->_nb_inst_retire]; |
---|
| 118 | out_RETIRE_WRITE_RD = new SC_OUT(Tcontrol_t ) * [_param->_nb_inst_retire]; |
---|
| 119 | out_RETIRE_NUM_REG_RD = new SC_OUT(Tgeneral_address_t) * [_param->_nb_inst_retire]; |
---|
| 120 | out_RETIRE_WRITE_RE = new SC_OUT(Tcontrol_t ) * [_param->_nb_inst_retire]; |
---|
| 121 | out_RETIRE_NUM_REG_RE = new SC_OUT(Tspecial_address_t) * [_param->_nb_inst_retire]; |
---|
[55] | 122 | |
---|
[69] | 123 | for (uint32_t i=0; i<_param->_nb_inst_retire; i++) |
---|
[55] | 124 | { |
---|
[69] | 125 | Interface_fifo * interface = _interfaces->set_interface("retire_"+toString(i) |
---|
[55] | 126 | #ifdef POSITION |
---|
| 127 | ,OUT |
---|
| 128 | ,WEST |
---|
| 129 | ,"Output of reservation_station" |
---|
| 130 | #endif |
---|
| 131 | ); |
---|
[69] | 132 | out_RETIRE_VAL [i] = interface->set_signal_valack_out(VAL); |
---|
| 133 | in_RETIRE_ACK [i] = interface->set_signal_valack_in (ACK); |
---|
| 134 | if (_param->_have_port_context_id) |
---|
| 135 | out_RETIRE_CONTEXT_ID [i] = interface->set_signal_out<Tcontext_t > ("context_id" ,_param->_size_context_id); |
---|
| 136 | if (_param->_have_port_front_end_id) |
---|
| 137 | out_RETIRE_FRONT_END_ID [i] = interface->set_signal_out<Tcontext_t > ("front_end_id" ,_param->_size_front_end_id); |
---|
| 138 | if (_param->_have_port_ooo_engine_id) |
---|
| 139 | out_RETIRE_OOO_ENGINE_ID[i] = interface->set_signal_out<Tcontext_t > ("ooo_engine_id",_param->_size_ooo_engine_id); |
---|
[88] | 140 | if (_param->_have_port_rob_ptr) |
---|
| 141 | out_RETIRE_ROB_ID [i] = interface->set_signal_out<Tpacket_t > ("rob_id" ,_param->_size_rob_ptr); |
---|
[69] | 142 | out_RETIRE_OPERATION [i] = interface->set_signal_out<Toperation_t > ("operation" ,_param->_size_operation); |
---|
| 143 | out_RETIRE_TYPE [i] = interface->set_signal_out<Ttype_t > ("type" ,_param->_size_type); |
---|
[88] | 144 | out_RETIRE_STORE_QUEUE_PTR_WRITE [i] = interface->set_signal_out<Tlsq_ptr_t> ("store_queue_ptr_write" ,_param->_size_store_queue_ptr); |
---|
[78] | 145 | if (_param->_have_port_load_queue_ptr) |
---|
[88] | 146 | out_RETIRE_LOAD_QUEUE_PTR_WRITE [i] = interface->set_signal_out<Tlsq_ptr_t> ("load_queue_ptr_write" ,_param->_size_load_queue_ptr ); |
---|
[76] | 147 | |
---|
[69] | 148 | out_RETIRE_HAS_IMMEDIAT [i] = interface->set_signal_out<Tcontrol_t > ("has_immediat" ,1); |
---|
| 149 | out_RETIRE_IMMEDIAT [i] = interface->set_signal_out<Tgeneral_data_t > ("immediat" ,_param->_size_general_data); |
---|
| 150 | out_RETIRE_DATA_RA [i] = interface->set_signal_out<Tgeneral_data_t > ("data_ra" ,_param->_size_general_data); |
---|
| 151 | out_RETIRE_DATA_RB [i] = interface->set_signal_out<Tgeneral_data_t > ("data_rb" ,_param->_size_general_data); |
---|
| 152 | out_RETIRE_DATA_RC [i] = interface->set_signal_out<Tspecial_data_t > ("data_rc" ,_param->_size_special_data); |
---|
| 153 | out_RETIRE_WRITE_RD [i] = interface->set_signal_out<Tcontrol_t > ("write_rd" ,1); |
---|
| 154 | out_RETIRE_NUM_REG_RD [i] = interface->set_signal_out<Tgeneral_address_t> ("num_reg_rd" ,_param->_size_general_register); |
---|
| 155 | out_RETIRE_WRITE_RE [i] = interface->set_signal_out<Tcontrol_t > ("write_re" ,1); |
---|
| 156 | out_RETIRE_NUM_REG_RE [i] = interface->set_signal_out<Tspecial_address_t> ("num_reg_re" ,_param->_size_special_register); |
---|
[55] | 157 | } |
---|
| 158 | |
---|
[88] | 159 | // ~~~~~[ Interface : "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
[69] | 160 | in_GPR_WRITE_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_gpr_write]; |
---|
| 161 | if (_param->_have_port_ooo_engine_id) |
---|
| 162 | in_GPR_WRITE_OOO_ENGINE_ID= new SC_IN (Tcontext_t ) * [_param->_nb_gpr_write]; |
---|
| 163 | in_GPR_WRITE_NUM_REG = new SC_IN (Tgeneral_address_t) * [_param->_nb_gpr_write]; |
---|
| 164 | in_GPR_WRITE_DATA = new SC_IN (Tgeneral_data_t ) * [_param->_nb_gpr_write]; |
---|
[55] | 165 | |
---|
| 166 | for (uint32_t i=0; i<_param->_nb_gpr_write; i++) |
---|
| 167 | { |
---|
| 168 | Interface_fifo * interface = _interfaces->set_interface("gpr_write_"+toString(i) |
---|
| 169 | #ifdef POSITION |
---|
| 170 | , IN |
---|
| 171 | ,SOUTH |
---|
| 172 | , "Interface with write queue to bypass the write in the RegisterFile." |
---|
| 173 | #endif |
---|
| 174 | ); |
---|
| 175 | |
---|
[69] | 176 | in_GPR_WRITE_VAL [i] = interface->set_signal_valack_in (VAL); |
---|
| 177 | if (_param->_have_port_ooo_engine_id) |
---|
| 178 | in_GPR_WRITE_OOO_ENGINE_ID [i] = interface->set_signal_in <Tcontext_t > ("ooo_engine_id",_param->_size_ooo_engine_id); |
---|
| 179 | in_GPR_WRITE_NUM_REG [i] = interface->set_signal_in <Tgeneral_address_t> ("num_reg" ,_param->_size_general_register); |
---|
| 180 | in_GPR_WRITE_DATA [i] = interface->set_signal_in <Tgeneral_data_t > ("data" ,_param->_size_general_data); |
---|
[55] | 181 | } |
---|
| 182 | |
---|
[88] | 183 | // ~~~~~[ Interface : "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
[69] | 184 | in_SPR_WRITE_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_spr_write]; |
---|
| 185 | if (_param->_have_port_ooo_engine_id) |
---|
| 186 | in_SPR_WRITE_OOO_ENGINE_ID= new SC_IN (Tcontext_t ) * [_param->_nb_spr_write]; |
---|
| 187 | in_SPR_WRITE_NUM_REG = new SC_IN (Tspecial_address_t) * [_param->_nb_spr_write]; |
---|
| 188 | in_SPR_WRITE_DATA = new SC_IN (Tspecial_data_t ) * [_param->_nb_spr_write]; |
---|
[55] | 189 | |
---|
| 190 | for (uint32_t i=0; i<_param->_nb_spr_write; i++) |
---|
| 191 | { |
---|
| 192 | Interface_fifo * interface = _interfaces->set_interface("spr_write_"+toString(i) |
---|
| 193 | #ifdef POSITION |
---|
| 194 | , IN |
---|
| 195 | ,SOUTH |
---|
| 196 | , "Interface with write queue to bypass the write in the RegisterFile." |
---|
| 197 | #endif |
---|
| 198 | ); |
---|
| 199 | |
---|
[69] | 200 | in_SPR_WRITE_VAL [i] = interface->set_signal_valack_in (VAL); |
---|
| 201 | if (_param->_have_port_ooo_engine_id) |
---|
| 202 | in_SPR_WRITE_OOO_ENGINE_ID [i] = interface->set_signal_in <Tcontext_t > ("ooo_engine_id",_param->_size_ooo_engine_id); |
---|
| 203 | in_SPR_WRITE_NUM_REG [i] = interface->set_signal_in <Tspecial_address_t> ("num_reg" ,_param->_size_special_register); |
---|
| 204 | in_SPR_WRITE_DATA [i] = interface->set_signal_in <Tspecial_data_t > ("data" ,_param->_size_special_data); |
---|
[55] | 205 | } |
---|
| 206 | |
---|
[88] | 207 | // ~~~~~[ Interface : "bypass_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
[69] | 208 | if (_param->_have_port_ooo_engine_id) |
---|
| 209 | in_BYPASS_WRITE_OOO_ENGINE_ID = new SC_IN (Tcontext_t ) * [_param->_nb_bypass_write]; |
---|
| 210 | in_BYPASS_WRITE_GPR_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_bypass_write]; |
---|
| 211 | in_BYPASS_WRITE_GPR_NUM_REG = new SC_IN (Tgeneral_address_t) * [_param->_nb_bypass_write]; |
---|
| 212 | in_BYPASS_WRITE_GPR_DATA = new SC_IN (Tgeneral_data_t ) * [_param->_nb_bypass_write]; |
---|
| 213 | in_BYPASS_WRITE_SPR_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_bypass_write]; |
---|
| 214 | in_BYPASS_WRITE_SPR_NUM_REG = new SC_IN (Tspecial_address_t) * [_param->_nb_bypass_write]; |
---|
| 215 | in_BYPASS_WRITE_SPR_DATA = new SC_IN (Tspecial_data_t ) * [_param->_nb_bypass_write]; |
---|
[55] | 216 | |
---|
| 217 | for (uint32_t i=0; i<_param->_nb_bypass_write; i++) |
---|
| 218 | { |
---|
| 219 | Interface_fifo * interface = _interfaces->set_interface("bypass_write_"+toString(i) |
---|
| 220 | #ifdef POSITION |
---|
| 221 | , IN |
---|
| 222 | ,NORTH |
---|
| 223 | , "Interface with write queue to bypass the write in the RegisterFile." |
---|
| 224 | #endif |
---|
| 225 | ); |
---|
| 226 | |
---|
[69] | 227 | if (_param->_have_port_ooo_engine_id) |
---|
| 228 | in_BYPASS_WRITE_OOO_ENGINE_ID [i] = interface->set_signal_in <Tcontext_t > ("ooo_engine_id" ,_param->_size_ooo_engine_id); |
---|
| 229 | in_BYPASS_WRITE_GPR_VAL [i] = interface->set_signal_valack_in ("gpr_val",VAL); |
---|
| 230 | in_BYPASS_WRITE_GPR_NUM_REG [i] = interface->set_signal_in <Tgeneral_address_t> ("gpr_num_reg" ,_param->_size_general_register); |
---|
| 231 | in_BYPASS_WRITE_GPR_DATA [i] = interface->set_signal_in <Tgeneral_data_t > ("gpr_data" ,_param->_size_general_data); |
---|
| 232 | in_BYPASS_WRITE_SPR_VAL [i] = interface->set_signal_valack_in ("spr_val",VAL); |
---|
[97] | 233 | in_BYPASS_WRITE_SPR_NUM_REG [i] = interface->set_signal_in <Tspecial_address_t> ("spr_num_reg" ,_param->_size_special_register); |
---|
| 234 | in_BYPASS_WRITE_SPR_DATA [i] = interface->set_signal_in <Tspecial_data_t > ("spr_data" ,_param->_size_special_data); |
---|
[55] | 235 | } |
---|
| 236 | |
---|
[88] | 237 | // ~~~~~[ Interface : "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
[69] | 238 | in_BYPASS_MEMORY_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_bypass_memory]; |
---|
| 239 | if (_param->_have_port_ooo_engine_id) |
---|
| 240 | in_BYPASS_MEMORY_OOO_ENGINE_ID= new SC_IN (Tcontext_t ) * [_param->_nb_bypass_memory]; |
---|
| 241 | in_BYPASS_MEMORY_NUM_REG = new SC_IN (Tgeneral_address_t) * [_param->_nb_bypass_memory]; |
---|
| 242 | in_BYPASS_MEMORY_DATA = new SC_IN (Tgeneral_data_t ) * [_param->_nb_bypass_memory]; |
---|
[55] | 243 | |
---|
| 244 | for (uint32_t i=0; i<_param->_nb_bypass_memory; i++) |
---|
| 245 | { |
---|
| 246 | Interface_fifo * interface = _interfaces->set_interface("bypass_memory_"+toString(i) |
---|
| 247 | #ifdef POSITION |
---|
| 248 | , IN |
---|
| 249 | , NORTH |
---|
| 250 | , "Interface with load/store unit to bypass the write in the RegisterFile." |
---|
| 251 | #endif |
---|
| 252 | ); |
---|
| 253 | |
---|
[69] | 254 | in_BYPASS_MEMORY_VAL [i] = interface->set_signal_valack_in (VAL); |
---|
| 255 | if (_param->_have_port_ooo_engine_id) |
---|
| 256 | in_BYPASS_MEMORY_OOO_ENGINE_ID[i] = interface->set_signal_in <Tcontext_t > ("ooo_engine_id",_param->_size_ooo_engine_id); |
---|
| 257 | in_BYPASS_MEMORY_NUM_REG [i] = interface->set_signal_in <Tgeneral_address_t> ("num_reg" ,_param->_size_general_register); |
---|
| 258 | in_BYPASS_MEMORY_DATA [i] = interface->set_signal_in <Tgeneral_data_t > ("data" ,_param->_size_general_data); |
---|
[55] | 259 | } |
---|
| 260 | |
---|
| 261 | |
---|
[88] | 262 | if (usage_is_set(_usage,USE_SYSTEMC)) |
---|
| 263 | { |
---|
| 264 | // ~~~~~[ internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
[69] | 265 | internal_RETIRE_VAL = new Tcontrol_t [_param->_nb_inst_retire]; |
---|
| 266 | internal_RETIRE_SLOT = new uint32_t [_param->_nb_inst_retire]; |
---|
[88] | 267 | } |
---|
[55] | 268 | |
---|
[88] | 269 | // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
---|
[55] | 270 | |
---|
| 271 | #ifdef POSITION |
---|
[88] | 272 | if (usage_is_set(_usage,USE_POSITION)) |
---|
| 273 | _component->generate_file(); |
---|
[55] | 274 | #endif |
---|
[69] | 275 | #ifdef SYSTEMC_VHDL_COMPATIBILITY |
---|
| 276 | _queue_valid = new bool [_param->_size_queue]; |
---|
| 277 | #else |
---|
[56] | 278 | _queue_control = new morpheo::behavioural::generic::queue_control::Queue_Control::Queue_Control(_param->_size_queue); |
---|
[69] | 279 | #endif |
---|
[55] | 280 | _queue = new Treservation_station_entry_t [_param->_size_queue]; |
---|
| 281 | |
---|
| 282 | log_printf(FUNC,Reservation_station,FUNCTION,"End"); |
---|
| 283 | }; |
---|
| 284 | |
---|
| 285 | }; // end namespace reservation_station |
---|
| 286 | }; // end namespace read_unit |
---|
| 287 | }; // end namespace multi_read_unit |
---|
| 288 | }; // end namespace execute_loop |
---|
| 289 | }; // end namespace multi_execute_loop |
---|
| 290 | }; // end namespace core |
---|
| 291 | |
---|
| 292 | }; // end namespace behavioural |
---|
| 293 | }; // end namespace morpheo |
---|
| 294 | #endif |
---|