1 | #ifdef VHDL |
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2 | /* |
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3 | * $Id: Reservation_station_vhdl_body.cpp 97 2008-12-19 15:34:00Z rosiere $ |
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4 | * |
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5 | * [ Description ] |
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6 | * |
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7 | */ |
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8 | |
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9 | #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Reservation_station.h" |
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10 | |
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11 | namespace morpheo { |
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12 | namespace behavioural { |
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13 | namespace core { |
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14 | namespace multi_execute_loop { |
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15 | namespace execute_loop { |
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16 | namespace multi_read_unit { |
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17 | namespace read_unit { |
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18 | namespace reservation_station { |
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19 | |
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20 | #undef FUNCTION |
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21 | #define FUNCTION "Reservation_station::vhdl_body" |
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22 | void Reservation_station::vhdl_body (Vhdl * & vhdl) |
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23 | { |
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24 | std::string range_retire, range_insert; |
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25 | |
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26 | if (_param->_size_queue == 1) |
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27 | range_insert = "(0)"; |
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28 | else |
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29 | range_insert = "(conv_integer(internal_INSERT_SLOT"+std_logic_range(log2(_param->_size_queue))+"))"; |
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30 | |
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31 | log_printf(FUNC,Reservation_station,FUNCTION,"Begin"); |
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32 | |
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33 | vhdl->set_body ("-----------------------------------"); |
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34 | vhdl->set_body ("-- interface 'INSERT'"); |
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35 | vhdl->set_body ("-----------------------------------"); |
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36 | vhdl->set_body (""); |
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37 | vhdl->set_body (" out_INSERT_ACK <= not internal_FULL;"); |
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38 | vhdl->set_body ("internal_INSERT_TRANSACTION <= not internal_FULL and in_INSERT_VAL;"); |
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39 | |
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40 | vhdl->set_body ("internal_INSERT_SLOT <="); |
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41 | for (uint32_t i=0; i<_param->_size_queue; i++) |
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42 | { |
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43 | vhdl->set_body ("\t"+std_logic_conv(log2(_param->_size_queue+1),i)+" when reg_VAL("+toString(i)+")='0' else"); |
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44 | } |
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45 | vhdl->set_body ("\t"+std_logic_conv(log2(_param->_size_queue+1),_param->_size_queue)+";"); |
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46 | |
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47 | vhdl->set_body (""); |
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48 | vhdl->set_body ("-----------------------------------"); |
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49 | vhdl->set_body ("-- interface 'RETIRE'"); |
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50 | vhdl->set_body ("-----------------------------------"); |
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51 | vhdl->set_body (""); |
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52 | for (uint32_t i=0; i<_param->_nb_inst_retire; i++) |
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53 | vhdl->set_body ("internal_RETIRE_TRANSACTION_"+toString(i)+"<= not internal_RETIRE_SLOT_"+toString(i)+std_logic_range(log2(_param->_size_queue)+1,log2(_param->_size_queue),log2(_param->_size_queue))+" and in_RETIRE_"+toString(i)+"_ACK;"); |
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54 | vhdl->set_body (""); |
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55 | |
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56 | uint32_t nb_slot_scan = _param->_size_queue-_param->_nb_inst_retire+1; |
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57 | for (uint32_t i=0; i<_param->_nb_inst_retire; i++) |
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58 | { |
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59 | vhdl->set_body ("internal_RETIRE_SLOT_"+toString(i)+" <= "); |
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60 | for (uint32_t j=i; j<nb_slot_scan+i; j++) |
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61 | { |
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62 | vhdl->set_body ("\t"+std_logic_conv(log2(_param->_size_queue+1),j)+" when"); |
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63 | for (uint32_t k=0; k<i; k++) |
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64 | { |
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65 | vhdl->set_body ("\t\tnot (internal_RETIRE_SLOT_"+toString(k)+std_logic_range(log2(_param->_size_queue)+1,log2(_param->_size_queue)-1,0)+" = "+std_logic_conv(log2(_param->_size_queue),j)+std_logic_range(log2(_param->_size_queue))+") and"); |
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66 | } |
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67 | vhdl->set_body ("\t\t(reg_VAL ("+toString(j)+")='1') and"); |
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68 | vhdl->set_body ("\t\t(reg_DATA_RA_VAL("+toString(j)+")='1') and"); |
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69 | vhdl->set_body ("\t\t(reg_DATA_RB_VAL("+toString(j)+")='1') and"); |
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70 | vhdl->set_body ("\t\t(reg_DATA_RC_VAL("+toString(j)+")='1') else"); |
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71 | } |
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72 | vhdl->set_body ("\t"+std_logic_conv(log2(_param->_size_queue+1),_param->_size_queue)+";"); |
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73 | vhdl->set_body (""); |
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74 | } |
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75 | |
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76 | for (uint32_t i=0; i<_param->_nb_inst_retire; i++) |
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77 | { |
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78 | if (_param->_size_queue == 1) |
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79 | range_retire = "(0)"; |
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80 | else |
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81 | range_retire = "(conv_integer(internal_RETIRE_SLOT_"+toString(i)+std_logic_range(log2(_param->_size_queue)+1,log2(_param->_size_queue)-1,0)+"))"; |
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82 | |
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83 | vhdl->set_body ("out_RETIRE_"+toString(i)+"_VAL <= not internal_RETIRE_SLOT_"+toString(i)+std_logic_range(log2(_param->_size_queue)+1,log2(_param->_size_queue),log2(_param->_size_queue))+";"); |
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84 | if (_param->_have_port_context_id) |
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85 | vhdl->set_body ("out_RETIRE_"+toString(i)+"_CONTEXT_ID <= reg_CONTEXT_ID "+range_retire+";"); |
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86 | if (_param->_have_port_front_end_id) |
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87 | vhdl->set_body ("out_RETIRE_"+toString(i)+"_FRONT_END_ID <= reg_FRONT_END_ID "+range_retire+";"); |
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88 | if (_param->_have_port_ooo_engine_id) |
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89 | vhdl->set_body ("out_RETIRE_"+toString(i)+"_OOO_ENGINE_ID <= reg_OOO_ENGINE_ID"+range_retire+";"); |
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90 | if (_param->_have_port_rob_ptr) |
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91 | vhdl->set_body ("out_RETIRE_"+toString(i)+"_ROB_ID <= reg_ROB_ID "+range_retire+";"); |
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92 | vhdl->set_body ("out_RETIRE_"+toString(i)+"_OPERATION <= reg_OPERATION "+range_retire+";"); |
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93 | vhdl->set_body ("out_RETIRE_"+toString(i)+"_TYPE <= reg_TYPE "+range_retire+";"); |
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94 | vhdl->set_body ("out_RETIRE_"+toString(i)+"_HAS_IMMEDIAT <= reg_HAS_IMMEDIAT "+range_retire+";"); |
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95 | vhdl->set_body ("out_RETIRE_"+toString(i)+"_IMMEDIAT <= reg_IMMEDIAT "+range_retire+";"); |
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96 | vhdl->set_body ("out_RETIRE_"+toString(i)+"_DATA_RA <= reg_DATA_RA "+range_retire+";"); |
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97 | vhdl->set_body ("out_RETIRE_"+toString(i)+"_DATA_RB <= reg_DATA_RB "+range_retire+";"); |
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98 | vhdl->set_body ("out_RETIRE_"+toString(i)+"_DATA_RC <= reg_DATA_RC "+range_retire+";"); |
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99 | vhdl->set_body ("out_RETIRE_"+toString(i)+"_WRITE_RD <= reg_WRITE_RD "+range_retire+";"); |
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100 | vhdl->set_body ("out_RETIRE_"+toString(i)+"_NUM_REG_RD <= reg_NUM_REG_RD "+range_retire+";"); |
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101 | vhdl->set_body ("out_RETIRE_"+toString(i)+"_WRITE_RE <= reg_WRITE_RE "+range_retire+";"); |
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102 | vhdl->set_body ("out_RETIRE_"+toString(i)+"_NUM_REG_RE <= reg_NUM_REG_RE "+range_retire+";"); |
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103 | vhdl->set_body (""); |
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104 | } |
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105 | |
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106 | // vhdl->set_body ("-----------------------------------"); |
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107 | // vhdl->set_body ("-- flags"); |
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108 | // vhdl->set_body ("-----------------------------------"); |
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109 | // vhdl->set_body (""); |
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110 | // vhdl->set_body ("internal_EMPTY <="); |
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111 | // for (uint32_t i=_param->_size_queue-1; i>0; i--) |
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112 | // vhdl->set_body ("\tnot reg_VAL ("+toString(i)+") and"); |
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113 | // vhdl->set_body ("\tnot reg_VAL (0);"); |
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114 | // vhdl->set_body ("internal_FULL <="); |
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115 | // for (uint32_t i=_param->_size_queue-1; i>0; i--) |
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116 | // vhdl->set_body ("\t reg_VAL ("+toString(i)+") and"); |
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117 | // vhdl->set_body ("\t reg_VAL (0);"); |
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118 | |
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119 | vhdl->set_body (""); |
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120 | vhdl->set_body ("-----------------------------------"); |
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121 | vhdl->set_body ("-- transition"); |
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122 | vhdl->set_body ("-----------------------------------"); |
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123 | vhdl->set_body (""); |
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124 | vhdl->set_body ("transition: process (in_CLOCK)"); |
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125 | vhdl->set_body ("begin -- process transition"); |
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126 | vhdl->set_body ("\tif in_CLOCK'event and in_CLOCK = '1' then"); |
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127 | vhdl->set_body (""); |
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128 | vhdl->set_body ("\t\tif (in_NRESET = '0') then"); |
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129 | for (uint32_t i=0; i<_param->_size_queue; i++) |
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130 | { |
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131 | vhdl->set_body ("\t\t\treg_VAL ("+toString(i)+")<= '0';"); |
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132 | } |
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133 | vhdl->set_body ("\t\telse"); |
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134 | |
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135 | |
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136 | vhdl->set_body (""); |
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137 | vhdl->set_body ("\t\t\t-----------------------------------"); |
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138 | vhdl->set_body ("\t\t\t-- bypass"); |
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139 | vhdl->set_body ("\t\t\t-----------------------------------"); |
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140 | vhdl->set_body (""); |
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141 | vhdl->set_body ("\t\t\t-- interface : 'GPR_WRITE'"); |
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142 | for (uint32_t i=0; i<_param->_nb_gpr_write; i++) |
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143 | { |
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144 | vhdl->set_body ("\t\t\tif (in_GPR_WRITE_"+toString(i)+"_VAL = '1') then"); |
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145 | vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)"); |
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146 | for (uint32_t j=0; j<_param->_size_queue; j++) |
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147 | { |
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148 | if (_param->_have_port_ooo_engine_id) |
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149 | vhdl->set_body ("\t\t\t\tif (in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then"); |
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150 | vhdl->set_body ("\t\t\t\t\tif (in_GPR_WRITE_"+toString(i)+"_NUM_REG = reg_NUM_REG_RA ("+toString(j)+")) then"); |
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151 | vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA_VAL ("+toString(j)+") <= '1';"); |
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152 | vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA ("+toString(j)+") <= in_GPR_WRITE_"+toString(i)+"_DATA;"); |
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153 | vhdl->set_body ("\t\t\t\t\tend if;"); |
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154 | |
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155 | vhdl->set_body ("\t\t\t\t\tif (in_GPR_WRITE_"+toString(i)+"_NUM_REG = reg_NUM_REG_RB ("+toString(j)+")) then"); |
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156 | vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB_VAL ("+toString(j)+") <= '1';"); |
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157 | vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB ("+toString(j)+") <= in_GPR_WRITE_"+toString(i)+"_DATA;"); |
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158 | vhdl->set_body ("\t\t\t\t\tend if;"); |
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159 | |
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160 | if (_param->_have_port_ooo_engine_id) |
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161 | vhdl->set_body ("\t\t\t\tend if;"); |
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162 | } |
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163 | vhdl->set_body ("\t\t\tend if;"); |
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164 | } |
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165 | |
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166 | vhdl->set_body ("\t\t\t-- interface : 'SPR_WRITE'"); |
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167 | for (uint32_t i=0; i<_param->_nb_spr_write; i++) |
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168 | { |
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169 | vhdl->set_body ("\t\t\tif (in_SPR_WRITE_"+toString(i)+"_VAL = '1') then"); |
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170 | vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)"); |
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171 | for (uint32_t j=0; j<_param->_size_queue; j++) |
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172 | { |
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173 | if (_param->_have_port_ooo_engine_id) |
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174 | vhdl->set_body ("\t\t\t\tif (in_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then"); |
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175 | vhdl->set_body ("\t\t\t\t\tif (in_SPR_WRITE_"+toString(i)+"_NUM_REG = reg_NUM_REG_RC ("+toString(j)+")) then"); |
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176 | vhdl->set_body ("\t\t\t\t\t\treg_DATA_RC_VAL ("+toString(j)+") <= '1';"); |
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177 | vhdl->set_body ("\t\t\t\t\t\treg_DATA_RC ("+toString(j)+") <= in_SPR_WRITE_"+toString(i)+"_DATA;"); |
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178 | vhdl->set_body ("\t\t\t\t\tend if;"); |
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179 | |
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180 | if (_param->_have_port_ooo_engine_id) |
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181 | vhdl->set_body ("\t\t\t\tend if;"); |
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182 | } |
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183 | vhdl->set_body ("\t\t\tend if;"); |
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184 | } |
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185 | |
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186 | vhdl->set_body ("\t\t\t-- interface : 'BYPASS_WRITE_GPR'"); |
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187 | for (uint32_t i=0; i<_param->_nb_bypass_write; i++) |
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188 | { |
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189 | vhdl->set_body ("\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_GPR_VAL = '1') then"); |
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190 | vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)"); |
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191 | for (uint32_t j=0; j<_param->_size_queue; j++) |
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192 | { |
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193 | if (_param->_have_port_ooo_engine_id) |
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194 | vhdl->set_body ("\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then"); |
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195 | vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_GPR_NUM_REG = reg_NUM_REG_RA ("+toString(j)+")) then"); |
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196 | vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA_VAL ("+toString(j)+") <= '1';"); |
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197 | vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA ("+toString(j)+") <= in_BYPASS_WRITE_"+toString(i)+"_GPR_DATA;"); |
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198 | vhdl->set_body ("\t\t\t\t\tend if;"); |
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199 | |
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200 | vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_GPR_NUM_REG = reg_NUM_REG_RB ("+toString(j)+")) then"); |
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201 | vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB_VAL ("+toString(j)+") <= '1';"); |
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202 | vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB ("+toString(j)+") <= in_BYPASS_WRITE_"+toString(i)+"_GPR_DATA;"); |
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203 | vhdl->set_body ("\t\t\t\t\tend if;"); |
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204 | |
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205 | if (_param->_have_port_ooo_engine_id) |
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206 | vhdl->set_body ("\t\t\t\tend if;"); |
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207 | } |
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208 | vhdl->set_body ("\t\t\tend if;"); |
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209 | } |
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210 | |
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211 | vhdl->set_body ("\t\t\t-- interface : 'BYPASS_WRITE_SPR'"); |
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212 | for (uint32_t i=0; i<_param->_nb_bypass_write; i++) |
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213 | { |
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214 | vhdl->set_body ("\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_SPR_VAL = '1') then"); |
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215 | vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)"); |
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216 | for (uint32_t j=0; j<_param->_size_queue; j++) |
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217 | { |
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218 | if (_param->_have_port_ooo_engine_id) |
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219 | vhdl->set_body ("\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then"); |
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220 | vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_SPR_NUM_REG = reg_NUM_REG_RC ("+toString(j)+")) then"); |
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221 | vhdl->set_body ("\t\t\t\t\t\treg_DATA_RC_VAL ("+toString(j)+") <= '1';"); |
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222 | vhdl->set_body ("\t\t\t\t\t\treg_DATA_RC ("+toString(j)+") <= in_BYPASS_WRITE_"+toString(i)+"_SPR_DATA;"); |
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223 | vhdl->set_body ("\t\t\t\t\tend if;"); |
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224 | |
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225 | if (_param->_have_port_ooo_engine_id) |
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226 | vhdl->set_body ("\t\t\t\tend if;"); |
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227 | } |
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228 | vhdl->set_body ("\t\t\tend if;"); |
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229 | } |
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230 | |
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231 | vhdl->set_body ("\t\t\t-- interface : 'BYPASS_MEMORY_GPR'"); |
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232 | for (uint32_t i=0; i<_param->_nb_bypass_memory; i++) |
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233 | { |
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234 | vhdl->set_body ("\t\t\tif (in_BYPASS_MEMORY_"+toString(i)+"_VAL = '1') then"); |
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235 | vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)"); |
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236 | for (uint32_t j=0; j<_param->_size_queue; j++) |
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237 | { |
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238 | if (_param->_have_port_ooo_engine_id) |
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239 | vhdl->set_body ("\t\t\t\tif (in_BYPASS_MEMORY_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then"); |
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240 | vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_MEMORY_"+toString(i)+"_NUM_REG = reg_NUM_REG_RA ("+toString(j)+")) then"); |
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241 | vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA_VAL ("+toString(j)+") <= '1';"); |
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242 | vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA ("+toString(j)+") <= in_BYPASS_MEMORY_"+toString(i)+"_DATA;"); |
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243 | vhdl->set_body ("\t\t\t\t\tend if;"); |
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244 | |
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245 | vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_MEMORY_"+toString(i)+"_NUM_REG = reg_NUM_REG_RB ("+toString(j)+")) then"); |
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246 | vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB_VAL ("+toString(j)+") <= '1';"); |
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247 | vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB ("+toString(j)+") <= in_BYPASS_MEMORY_"+toString(i)+"_DATA;"); |
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248 | vhdl->set_body ("\t\t\t\t\tend if;"); |
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249 | |
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250 | if (_param->_have_port_ooo_engine_id) |
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251 | vhdl->set_body ("\t\t\t\tend if;"); |
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252 | } |
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253 | vhdl->set_body ("\t\t\tend if;"); |
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254 | } |
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255 | |
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256 | vhdl->set_body (""); |
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257 | vhdl->set_body ("\t\t\t-- interface : 'INSERT'"); |
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258 | vhdl->set_body ("\t\t\tif (internal_INSERT_TRANSACTION = '1') then"); |
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259 | |
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260 | |
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261 | |
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262 | vhdl->set_body ("\t\t\t\treg_VAL "+range_insert+" <= '1';"); |
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263 | |
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264 | if (_param->_have_port_context_id) |
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265 | vhdl->set_body ("\t\t\t\treg_CONTEXT_ID "+range_insert+" <= in_INSERT_CONTEXT_ID ;"); |
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266 | if (_param->_have_port_front_end_id) |
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267 | vhdl->set_body ("\t\t\t\treg_FRONT_END_ID "+range_insert+" <= in_INSERT_FRONT_END_ID ;"); |
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268 | if (_param->_have_port_ooo_engine_id) |
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269 | vhdl->set_body ("\t\t\t\treg_OOO_ENGINE_ID "+range_insert+" <= in_INSERT_OOO_ENGINE_ID;"); |
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270 | if (_param->_have_port_rob_ptr) |
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271 | vhdl->set_body ("\t\t\t\treg_ROB_ID "+range_insert+" <= in_INSERT_ROB_ID ;"); |
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272 | vhdl->set_body ("\t\t\t\treg_OPERATION "+range_insert+" <= in_INSERT_OPERATION ;"); |
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273 | vhdl->set_body ("\t\t\t\treg_TYPE "+range_insert+" <= in_INSERT_TYPE ;"); |
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274 | vhdl->set_body ("\t\t\t\treg_HAS_IMMEDIAT "+range_insert+" <= in_INSERT_HAS_IMMEDIAT ;"); |
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275 | vhdl->set_body ("\t\t\t\treg_IMMEDIAT "+range_insert+" <= in_INSERT_IMMEDIAT ;"); |
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276 | vhdl->set_body ("\t\t\t\treg_NUM_REG_RA "+range_insert+" <= in_INSERT_NUM_REG_RA ;"); |
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277 | vhdl->set_body ("\t\t\t\treg_DATA_RA_VAL "+range_insert+" <= in_INSERT_DATA_RA_VAL ;"); |
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278 | vhdl->set_body ("\t\t\t\treg_DATA_RA "+range_insert+" <= in_INSERT_DATA_RA ;"); |
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279 | vhdl->set_body ("\t\t\t\treg_NUM_REG_RB "+range_insert+" <= in_INSERT_NUM_REG_RB ;"); |
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280 | vhdl->set_body ("\t\t\t\treg_DATA_RB_VAL "+range_insert+" <= in_INSERT_DATA_RB_VAL ;"); |
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281 | vhdl->set_body ("\t\t\t\treg_DATA_RB "+range_insert+" <= in_INSERT_DATA_RB ;"); |
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282 | vhdl->set_body ("\t\t\t\treg_NUM_REG_RC "+range_insert+" <= in_INSERT_NUM_REG_RC ;"); |
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283 | vhdl->set_body ("\t\t\t\treg_DATA_RC_VAL "+range_insert+" <= in_INSERT_DATA_RC_VAL ;"); |
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284 | vhdl->set_body ("\t\t\t\treg_DATA_RC "+range_insert+" <= in_INSERT_DATA_RC ;"); |
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285 | vhdl->set_body ("\t\t\t\treg_WRITE_RD "+range_insert+" <= in_INSERT_WRITE_RD ;"); |
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286 | vhdl->set_body ("\t\t\t\treg_NUM_REG_RD "+range_insert+" <= in_INSERT_NUM_REG_RD ;"); |
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287 | vhdl->set_body ("\t\t\t\treg_WRITE_RE "+range_insert+" <= in_INSERT_WRITE_RE ;"); |
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288 | vhdl->set_body ("\t\t\t\treg_NUM_REG_RE "+range_insert+" <= in_INSERT_NUM_REG_RE ;"); |
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289 | vhdl->set_body ("\t\t\tend if;"); |
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290 | |
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291 | vhdl->set_body (""); |
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292 | vhdl->set_body ("\t\t\t-- interface : 'RETIRE'"); |
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293 | for (uint32_t i=0; i<_param->_nb_inst_retire; i++) |
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294 | { |
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295 | if (_param->_size_queue == 1) |
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296 | range_retire = "(0)"; |
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297 | else |
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298 | range_retire = "(conv_integer(internal_RETIRE_SLOT_"+toString(i)+std_logic_range(log2(_param->_size_queue)+1,log2(_param->_size_queue)-1,0)+"))"; |
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299 | |
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300 | vhdl->set_body ("\t\t\tif (internal_RETIRE_TRANSACTION_"+toString(i)+" = '1') then"); |
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301 | |
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302 | vhdl->set_body ("\t\t\t\treg_VAL "+range_retire+" <= '0';"); |
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303 | vhdl->set_body ("\t\t\tend if;"); |
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304 | } |
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305 | |
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306 | vhdl->set_body (""); |
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307 | vhdl->set_body ("\t\tend if;"); |
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308 | vhdl->set_body (""); |
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309 | vhdl->set_body ("\tend if;"); |
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310 | vhdl->set_body ("end process transition;"); |
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311 | |
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312 | log_printf(FUNC,Reservation_station,FUNCTION,"End"); |
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313 | }; |
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314 | |
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315 | }; // end namespace reservation_station |
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316 | }; // end namespace read_unit |
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317 | }; // end namespace multi_read_unit |
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318 | }; // end namespace execute_loop |
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319 | }; // end namespace multi_execute_loop |
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320 | }; // end namespace core |
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321 | |
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322 | }; // end namespace behavioural |
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323 | }; // end namespace morpheo |
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324 | #endif |
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