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Read_unit_allocation.cpp @ 138

Last change on this file since 138 was 136, checked in by rosiere, 15 years ago
1) Add new algo in ifetch queue 2) Add Cancel bit 3) new config
Property svn:keywords set to `Id`
File size: 36.9 KB

Line
1	/*
2	* $id: Read_unit_allocation.cpp 88 2008-12-10 18:31:39Z rosiere $
3	*
4	* [ Description ]
5	*
6	*/
7
8	#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/include/Read_unit.h"
9	#include "Behavioural/include/Allocation.h"
10
11	namespace morpheo {
12	namespace behavioural {
13	namespace core {
14	namespace multi_execute_loop {
15	namespace execute_loop {
16	namespace multi_read_unit {
17	namespace read_unit {
18
19
20
21	#undef FUNCTION
22	#define FUNCTION "Read_unit::allocation"
23	void Read_unit::allocation (
24	#ifdef STATISTICS
25	morpheo::behavioural::Parameters_Statistics * param_statistics
26	#else
27	void
28	#endif
29	)
30	{
31	log_printf(FUNC,Read_unit,FUNCTION,"Begin");
32
33	_component = new Component (_usage);
34
35	Entity * entity = _component->set_entity (_name
36	,"Read_unit"
37	#ifdef POSITION
38	,COMBINATORY
39	#endif
40	);
41
42	_interfaces = entity->set_interfaces();
43
44	// ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
45
46	Interface * interface = _interfaces->set_interface(""
47	#ifdef POSITION
48	,IN
49	,SOUTH,
50	_("Generalist interface")
51	#endif
52	);
53
54	in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES);
55	in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
56
57	// ~~~~~[ Interface "read_unit_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
58	{
59	ALLOC0_INTERFACE_BEGIN("read_unit_in", IN, WEST, _("Enter of new operation"));
60
61	ALLOC0_VALACK_IN ( in_READ_UNIT_IN_VAL,VAL);
62	ALLOC0_VALACK_OUT (out_READ_UNIT_IN_ACK,ACK);
63	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id );
64	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id );
65	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_OOO_ENGINE_ID ,"ooo_engine_id" ,Tcontext_t ,_param->_size_ooo_engine_id);
66	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_rob_ptr );
67	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation );
68	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type );
69	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_CANCEL ,"cancel" ,Tcontrol_t ,1);
70	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr);
71	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr);
72	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_STORE_QUEUE_EMPTY ,"store_queue_empty" ,Tcontrol_t ,1);
73	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,_param->_size_load_queue_ptr);
74	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1);
75	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_IMMEDIAT ,"immediat" ,Tgeneral_data_t ,_param->_size_general_data);
76	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_READ_RA ,"read_ra" ,Tcontrol_t ,1);
77	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_NUM_REG_RA ,"num_reg_ra" ,Tgeneral_address_t,_param->_size_general_register);
78	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_READ_RB ,"read_rb" ,Tcontrol_t ,1);
79	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_NUM_REG_RB ,"num_reg_rb" ,Tgeneral_address_t,_param->_size_general_register);
80	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_READ_RC ,"read_rc" ,Tcontrol_t ,1);
81	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_NUM_REG_RC ,"num_reg_rc" ,Tspecial_address_t,_param->_size_special_register);
82	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_WRITE_RD ,"write_rd" ,Tcontrol_t ,1);
83	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register);
84	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_WRITE_RE ,"write_re" ,Tcontrol_t ,1);
85	ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_NUM_REG_RE ,"num_reg_re" ,Tspecial_address_t,_param->_size_special_register);
86
87	ALLOC0_INTERFACE_END();
88	}
89
90	// ~~~~~[ Interface "read_unit_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
91	{
92	ALLOC1_INTERFACE_BEGIN("read_unit_out", OUT, EAST, _("Output of operation. All operand is valid."), _param->_nb_inst_retire);
93
94	ALLOC1_VALACK_OUT (out_READ_UNIT_OUT_VAL,VAL);
95	ALLOC1_VALACK_IN ( in_READ_UNIT_OUT_ACK,ACK);
96	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id );
97	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id );
98	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_OOO_ENGINE_ID ,"ooo_engine_id" ,Tcontext_t ,_param->_size_ooo_engine_id );
99	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_rob_ptr );
100	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation );
101	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type );
102	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1);
103	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr);
104	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr);
105	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_STORE_QUEUE_EMPTY ,"store_queue_empty" ,Tcontrol_t ,1);
106	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,_param->_size_load_queue_ptr);
107	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1 );
108	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_IMMEDIAT ,"immediat" ,Tgeneral_data_t ,_param->_size_general_data );
109	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_DATA_RA ,"data_ra" ,Tgeneral_data_t ,_param->_size_general_data );
110	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_DATA_RB ,"data_rb" ,Tgeneral_data_t ,_param->_size_general_data );
111	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_DATA_RC ,"data_rc" ,Tspecial_data_t ,_param->_size_special_data );
112	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 );
113	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register);
114	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_WRITE_RE ,"write_re" ,Tcontrol_t ,1 );
115	ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_NUM_REG_RE ,"num_reg_re" ,Tspecial_address_t,_param->_size_special_register);
116
117	ALLOC1_INTERFACE_END(_param->_nb_inst_retire);
118	}
119
120	// ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
121	{
122	ALLOC1_INTERFACE_BEGIN("gpr_read", OUT, SOUTH, _("Read port."), _param->_nb_gpr_read);
123
124	ALLOC1_VALACK_OUT (out_GPR_READ_VAL,VAL);
125	ALLOC1_VALACK_IN ( in_GPR_READ_ACK,ACK);
126	ALLOC1_SIGNAL_OUT(out_GPR_READ_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id );
127	ALLOC1_SIGNAL_OUT(out_GPR_READ_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_general_register);
128	ALLOC1_SIGNAL_IN ( in_GPR_READ_DATA ,"data" ,Tgeneral_data_t ,_param->_size_general_data );
129	ALLOC1_SIGNAL_IN ( in_GPR_READ_DATA_VAL ,"data_val" ,Tcontrol_t ,1);
130
131	ALLOC1_INTERFACE_END(_param->_nb_gpr_read);
132	}
133
134	// ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
135	{
136	ALLOC1_INTERFACE_BEGIN("spr_read", OUT, SOUTH, _("Read port."), _param->_nb_spr_read);
137
138	ALLOC1_VALACK_OUT (out_SPR_READ_VAL,VAL);
139	ALLOC1_VALACK_IN ( in_SPR_READ_ACK,ACK);
140	ALLOC1_SIGNAL_OUT(out_SPR_READ_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id );
141	ALLOC1_SIGNAL_OUT(out_SPR_READ_NUM_REG ,"num_reg" ,Tspecial_address_t,_param->_size_special_register);
142	ALLOC1_SIGNAL_IN ( in_SPR_READ_DATA ,"data" ,Tspecial_data_t ,_param->_size_special_data );
143	ALLOC1_SIGNAL_IN ( in_SPR_READ_DATA_VAL ,"data_val" ,Tcontrol_t ,1);
144
145	ALLOC1_INTERFACE_END(_param->_nb_spr_read);
146	}
147
148	// ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
149	{
150	ALLOC1_INTERFACE_BEGIN("gpr_write", IN , SOUTH, _("Write port."), _param->_nb_gpr_write);
151
152	ALLOC1_VALACK_IN ( in_GPR_WRITE_VAL,VAL);
153	ALLOC1_SIGNAL_IN ( in_GPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id );
154	ALLOC1_SIGNAL_IN ( in_GPR_WRITE_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_general_register);
155	ALLOC1_SIGNAL_IN ( in_GPR_WRITE_DATA ,"data" ,Tgeneral_data_t ,_param->_size_general_data);
156
157	ALLOC1_INTERFACE_END(_param->_nb_gpr_write);
158	}
159
160	// ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
161	{
162	ALLOC1_INTERFACE_BEGIN("spr_write", IN , SOUTH, _("Write port."), _param->_nb_spr_write);
163
164	ALLOC1_VALACK_IN ( in_SPR_WRITE_VAL,VAL);
165	ALLOC1_SIGNAL_IN ( in_SPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id );
166	ALLOC1_SIGNAL_IN ( in_SPR_WRITE_NUM_REG ,"num_reg" ,Tspecial_address_t,_param->_size_special_register);
167	ALLOC1_SIGNAL_IN ( in_SPR_WRITE_DATA ,"data" ,Tspecial_data_t ,_param->_size_special_data);
168
169	ALLOC1_INTERFACE_END(_param->_nb_spr_write);
170	}
171
172	// ~~~~~[ Interface "bypass_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
173	{
174	ALLOC1_INTERFACE_BEGIN("bypass_write", IN , NORTH, _("Output of write_queue."), _param->_nb_bypass_write);
175
176	ALLOC1_SIGNAL_IN ( in_BYPASS_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id );
177	ALLOC1_SIGNAL_IN ( in_BYPASS_WRITE_GPR_VAL ,"gpr_val" ,Tcontrol_t ,1);
178	ALLOC1_SIGNAL_IN ( in_BYPASS_WRITE_GPR_NUM_REG ,"gpr_num_reg" ,Tgeneral_address_t,_param->_size_general_register);
179	ALLOC1_SIGNAL_IN ( in_BYPASS_WRITE_GPR_DATA ,"gpr_data" ,Tgeneral_data_t ,_param->_size_general_data );
180	ALLOC1_SIGNAL_IN ( in_BYPASS_WRITE_SPR_VAL ,"spr_val" ,Tcontrol_t ,1);
181	ALLOC1_SIGNAL_IN ( in_BYPASS_WRITE_SPR_NUM_REG ,"spr_num_reg" ,Tspecial_address_t,_param->_size_special_register);
182	ALLOC1_SIGNAL_IN ( in_BYPASS_WRITE_SPR_DATA ,"spr_data" ,Tspecial_data_t ,_param->_size_special_data );
183
184	ALLOC1_INTERFACE_END(_param->_nb_bypass_write);
185	}
186
187	// ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
188	{
189	ALLOC1_INTERFACE_BEGIN("bypass_memory", IN , NORTH, _("Output of write_queue."), _param->_nb_bypass_memory);
190
191	ALLOC1_SIGNAL_IN ( in_BYPASS_MEMORY_VAL ,"val" ,Tcontrol_t ,1);
192	ALLOC1_SIGNAL_IN ( in_BYPASS_MEMORY_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id );
193	ALLOC1_SIGNAL_IN ( in_BYPASS_MEMORY_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_general_register);
194	ALLOC1_SIGNAL_IN ( in_BYPASS_MEMORY_DATA ,"data" ,Tgeneral_data_t ,_param->_size_general_data );
195
196	ALLOC1_INTERFACE_END(_param->_nb_bypass_memory);
197	}
198
199	// ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
200
201	std::string name;
202
203	{
204	name = _name+"_read_queue";
205	log_printf(INFO,Core,FUNCTION,_("Create : %s"),name.c_str());
206
207	_component_read_queue = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::read_queue::Read_queue
208	(name.c_str()
209	#ifdef STATISTICS
210	,param_statistics
211	#endif
212	,_param->_param_read_queue
213	,_usage);
214
215	_component->set_component (_component_read_queue->_component
216	#ifdef POSITION
217	, 50, 50, 10, 10
218	#endif
219	);
220	}
221	{
222	name = _name+"_reservation_station";
223	log_printf(INFO,Core,FUNCTION,_("Create : %s"),name.c_str());
224
225	_component_reservation_station = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::reservation_station::Reservation_station
226	(name.c_str()
227	#ifdef STATISTICS
228	,param_statistics
229	#endif
230	,_param->_param_reservation_station
231	,_usage);
232
233	_component->set_component (_component_reservation_station->_component
234	#ifdef POSITION
235	, 50, 50, 10, 10
236	#endif
237	);
238	}
239
240	// ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
241	{
242	name = _name+"_read_queue";
243	log_printf(INFO,Core,FUNCTION,_("Instance : %s"),name.c_str());
244
245	{
246	#ifdef POSITION
247	_component->interface_map (name ,"",
248	_name,"");
249	#endif
250
251	_component->port_map(name,"in_CLOCK" , _name, "in_CLOCK");
252	_component->port_map(name,"in_NRESET", _name, "in_NRESET");
253	}
254
255	// ~~~~~[ Interface "read_queue_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
256	{
257	std::string dest = _name;
258	#ifdef POSITION
259	_component->interface_map (name,"read_queue_in",
260	dest,"read_unit_in");
261	#endif
262
263	_component->port_map(name, "in_READ_QUEUE_IN_VAL" ,dest, "in_READ_UNIT_IN_VAL" );
264	_component->port_map(name,"out_READ_QUEUE_IN_ACK" ,dest,"out_READ_UNIT_IN_ACK" );
265	if (_param->_have_port_context_id)
266	_component->port_map(name, "in_READ_QUEUE_IN_CONTEXT_ID" ,dest, "in_READ_UNIT_IN_CONTEXT_ID" );
267	if (_param->_have_port_front_end_id)
268	_component->port_map(name, "in_READ_QUEUE_IN_FRONT_END_ID" ,dest, "in_READ_UNIT_IN_FRONT_END_ID" );
269	if (_param->_have_port_ooo_engine_id)
270	_component->port_map(name, "in_READ_QUEUE_IN_OOO_ENGINE_ID" ,dest, "in_READ_UNIT_IN_OOO_ENGINE_ID" );
271	if (_param->_have_port_rob_ptr)
272	_component->port_map(name, "in_READ_QUEUE_IN_ROB_ID" ,dest, "in_READ_UNIT_IN_PACKET_ID" );
273	_component->port_map(name, "in_READ_QUEUE_IN_OPERATION" ,dest, "in_READ_UNIT_IN_OPERATION" );
274	_component->port_map(name, "in_READ_QUEUE_IN_TYPE" ,dest, "in_READ_UNIT_IN_TYPE" );
275	_component->port_map(name, "in_READ_QUEUE_IN_CANCEL" ,dest, "in_READ_UNIT_IN_CANCEL" );
276	_component->port_map(name, "in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE",dest, "in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE");
277	_component->port_map(name, "in_READ_QUEUE_IN_STORE_QUEUE_PTR_READ" ,dest, "in_READ_UNIT_IN_STORE_QUEUE_PTR_READ" );
278	_component->port_map(name, "in_READ_QUEUE_IN_STORE_QUEUE_EMPTY" ,dest, "in_READ_UNIT_IN_STORE_QUEUE_EMPTY" );
279	if (_param->_have_port_load_queue_ptr)
280	_component->port_map(name, "in_READ_QUEUE_IN_LOAD_QUEUE_PTR_WRITE" ,dest, "in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE" );
281	_component->port_map(name, "in_READ_QUEUE_IN_HAS_IMMEDIAT" ,dest, "in_READ_UNIT_IN_HAS_IMMEDIAT" );
282	_component->port_map(name, "in_READ_QUEUE_IN_IMMEDIAT" ,dest, "in_READ_UNIT_IN_IMMEDIAT" );
283	_component->port_map(name, "in_READ_QUEUE_IN_READ_RA" ,dest, "in_READ_UNIT_IN_READ_RA" );
284	_component->port_map(name, "in_READ_QUEUE_IN_NUM_REG_RA" ,dest, "in_READ_UNIT_IN_NUM_REG_RA" );
285	_component->port_map(name, "in_READ_QUEUE_IN_READ_RB" ,dest, "in_READ_UNIT_IN_READ_RB" );
286	_component->port_map(name, "in_READ_QUEUE_IN_NUM_REG_RB" ,dest, "in_READ_UNIT_IN_NUM_REG_RB" );
287	_component->port_map(name, "in_READ_QUEUE_IN_READ_RC" ,dest, "in_READ_UNIT_IN_READ_RC" );
288	_component->port_map(name, "in_READ_QUEUE_IN_NUM_REG_RC" ,dest, "in_READ_UNIT_IN_NUM_REG_RC" );
289	_component->port_map(name, "in_READ_QUEUE_IN_WRITE_RD" ,dest, "in_READ_UNIT_IN_WRITE_RD" );
290	_component->port_map(name, "in_READ_QUEUE_IN_NUM_REG_RD" ,dest, "in_READ_UNIT_IN_NUM_REG_RD" );
291	_component->port_map(name, "in_READ_QUEUE_IN_WRITE_RE" ,dest, "in_READ_UNIT_IN_WRITE_RE" );
292	_component->port_map(name, "in_READ_QUEUE_IN_NUM_REG_RE" ,dest, "in_READ_UNIT_IN_NUM_REG_RE" );
293	}
294	// ~~~~~[ Interface "read_queue_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
295	{
296	std::string dest = _name+"_reservation_station";
297
298	#ifdef POSITION
299	_component->interface_map (name,"read_queue_in",
300	dest,"insert");
301	#endif
302
303	_component->port_map(name,"out_READ_QUEUE_OUT_VAL" ,dest, "in_INSERT_VAL" );
304	_component->port_map(name, "in_READ_QUEUE_OUT_ACK" ,dest,"out_INSERT_ACK" );
305	if (_param->_have_port_context_id)
306	_component->port_map(name,"out_READ_QUEUE_OUT_CONTEXT_ID" ,dest, "in_INSERT_CONTEXT_ID" );
307	if (_param->_have_port_front_end_id)
308	_component->port_map(name,"out_READ_QUEUE_OUT_FRONT_END_ID" ,dest, "in_INSERT_FRONT_END_ID" );
309	if (_param->_have_port_ooo_engine_id)
310	_component->port_map(name,"out_READ_QUEUE_OUT_OOO_ENGINE_ID" ,dest, "in_INSERT_OOO_ENGINE_ID" );
311	if (_param->_have_port_rob_ptr)
312	_component->port_map(name,"out_READ_QUEUE_OUT_ROB_ID" ,dest, "in_INSERT_ROB_ID" );
313	_component->port_map(name,"out_READ_QUEUE_OUT_OPERATION" ,dest, "in_INSERT_OPERATION" );
314	_component->port_map(name,"out_READ_QUEUE_OUT_TYPE" ,dest, "in_INSERT_TYPE" );
315	_component->port_map(name,"out_READ_QUEUE_OUT_CANCEL" ,dest, "in_INSERT_CANCEL" );
316	_component->port_map(name,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE",dest, "in_INSERT_STORE_QUEUE_PTR_WRITE");
317	_component->port_map(name,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_READ" ,dest, "in_INSERT_STORE_QUEUE_PTR_READ" );
318	_component->port_map(name,"out_READ_QUEUE_OUT_STORE_QUEUE_EMPTY" ,dest, "in_INSERT_STORE_QUEUE_EMPTY" );
319	if (_param->_have_port_load_queue_ptr)
320	_component->port_map(name,"out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE" ,dest, "in_INSERT_LOAD_QUEUE_PTR_WRITE" );
321	_component->port_map(name,"out_READ_QUEUE_OUT_HAS_IMMEDIAT" ,dest, "in_INSERT_HAS_IMMEDIAT" );
322	_component->port_map(name,"out_READ_QUEUE_OUT_IMMEDIAT" ,dest, "in_INSERT_IMMEDIAT" );
323	// _component->port_map(name,"out_READ_QUEUE_OUT_READ_RA" ,dest, "in_INSERT_READ_RA" );
324	_component->port_map(name,"out_READ_QUEUE_OUT_NUM_REG_RA" ,dest, "in_INSERT_NUM_REG_RA" );
325	_component->port_map(name,"out_READ_QUEUE_OUT_DATA_RA_VAL" ,dest, "in_INSERT_DATA_RA_VAL" );
326	_component->port_map(name,"out_READ_QUEUE_OUT_DATA_RA" ,dest, "in_INSERT_DATA_RA" );
327	// _component->port_map(name,"out_READ_QUEUE_OUT_READ_RB" ,dest, "in_INSERT_READ_RB" );
328	_component->port_map(name,"out_READ_QUEUE_OUT_NUM_REG_RB" ,dest, "in_INSERT_NUM_REG_RB" );
329	_component->port_map(name,"out_READ_QUEUE_OUT_DATA_RB_VAL" ,dest, "in_INSERT_DATA_RB_VAL" );
330	_component->port_map(name,"out_READ_QUEUE_OUT_DATA_RB" ,dest, "in_INSERT_DATA_RB" );
331	// _component->port_map(name,"out_READ_QUEUE_OUT_READ_RC" ,dest, "in_INSERT_READ_RC" );
332	_component->port_map(name,"out_READ_QUEUE_OUT_NUM_REG_RC" ,dest, "in_INSERT_NUM_REG_RC" );
333	_component->port_map(name,"out_READ_QUEUE_OUT_DATA_RC_VAL" ,dest, "in_INSERT_DATA_RC_VAL" );
334	_component->port_map(name,"out_READ_QUEUE_OUT_DATA_RC" ,dest, "in_INSERT_DATA_RC" );
335	_component->port_map(name,"out_READ_QUEUE_OUT_WRITE_RD" ,dest, "in_INSERT_WRITE_RD" );
336	_component->port_map(name,"out_READ_QUEUE_OUT_NUM_REG_RD" ,dest, "in_INSERT_NUM_REG_RD" );
337	_component->port_map(name,"out_READ_QUEUE_OUT_WRITE_RE" ,dest, "in_INSERT_WRITE_RE" );
338	_component->port_map(name,"out_READ_QUEUE_OUT_NUM_REG_RE" ,dest, "in_INSERT_NUM_REG_RE" );
339	}
340	// ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
341	for (uint32_t i=0; i<_param->_nb_gpr_read; i++)
342	{
343	std::string dest = _name;
344	#ifdef POSITION
345	_component->interface_map (name,"gpr_read_"+toString(i),
346	dest,"gpr_read_"+toString(i));
347	#endif
348
349	_component->port_map(name,"out_GPR_READ_"+toString(i)+"_VAL" ,dest,"out_GPR_READ_"+toString(i)+"_VAL" );
350	_component->port_map(name, "in_GPR_READ_"+toString(i)+"_ACK" ,dest, "in_GPR_READ_"+toString(i)+"_ACK" );
351	if (_param->_have_port_ooo_engine_id)
352	_component->port_map(name,"out_GPR_READ_"+toString(i)+"_OOO_ENGINE_ID",dest,"out_GPR_READ_"+toString(i)+"_OOO_ENGINE_ID");
353	_component->port_map(name,"out_GPR_READ_"+toString(i)+"_NUM_REG" ,dest,"out_GPR_READ_"+toString(i)+"_NUM_REG" );
354	_component->port_map(name, "in_GPR_READ_"+toString(i)+"_DATA" ,dest, "in_GPR_READ_"+toString(i)+"_DATA" );
355	_component->port_map(name, "in_GPR_READ_"+toString(i)+"_DATA_VAL" ,dest, "in_GPR_READ_"+toString(i)+"_DATA_VAL" );
356	}
357
358	// ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
359	for (uint32_t i=0; i<_param->_nb_spr_read; i++)
360	{
361	std::string dest = _name;
362	#ifdef POSITION
363	_component->interface_map (name,"spr_read_"+toString(i),
364	dest,"spr_read_"+toString(i));
365	#endif
366
367	_component->port_map(name,"out_SPR_READ_"+toString(i)+"_VAL" ,dest,"out_SPR_READ_"+toString(i)+"_VAL" );
368	_component->port_map(name, "in_SPR_READ_"+toString(i)+"_ACK" ,dest, "in_SPR_READ_"+toString(i)+"_ACK" );
369	if (_param->_have_port_ooo_engine_id)
370	_component->port_map(name,"out_SPR_READ_"+toString(i)+"_OOO_ENGINE_ID",dest,"out_SPR_READ_"+toString(i)+"_OOO_ENGINE_ID");
371	_component->port_map(name,"out_SPR_READ_"+toString(i)+"_NUM_REG" ,dest,"out_SPR_READ_"+toString(i)+"_NUM_REG" );
372	_component->port_map(name, "in_SPR_READ_"+toString(i)+"_DATA" ,dest, "in_SPR_READ_"+toString(i)+"_DATA" );
373	_component->port_map(name, "in_SPR_READ_"+toString(i)+"_DATA_VAL" ,dest, "in_SPR_READ_"+toString(i)+"_DATA_VAL" );
374	}
375
376	// ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
377	for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
378	{
379	std::string dest = _name;
380	#ifdef POSITION
381	_component->interface_map (name,"gpr_write_"+toString(i),
382	dest,"gpr_write_"+toString(i));
383	#endif
384
385	_component->port_map(name, "in_GPR_WRITE_"+toString(i)+"_VAL" ,dest, "in_GPR_WRITE_"+toString(i)+"_VAL" );
386	if (_param->_have_port_ooo_engine_id)
387	_component->port_map(name, "in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID",dest, "in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID");
388	_component->port_map(name, "in_GPR_WRITE_"+toString(i)+"_NUM_REG" ,dest, "in_GPR_WRITE_"+toString(i)+"_NUM_REG" );
389	_component->port_map(name, "in_GPR_WRITE_"+toString(i)+"_DATA" ,dest, "in_GPR_WRITE_"+toString(i)+"_DATA" );
390	}
391	// ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
392	for (uint32_t i=0; i<_param->_nb_spr_write; i++)
393	{
394	std::string dest = _name;
395	#ifdef POSITION
396	_component->interface_map (name,"spr_write_"+toString(i),
397	dest,"spr_write_"+toString(i));
398	#endif
399
400	_component->port_map(name, "in_SPR_WRITE_"+toString(i)+"_VAL" ,dest, "in_SPR_WRITE_"+toString(i)+"_VAL" );
401	if (_param->_have_port_ooo_engine_id)
402	_component->port_map(name, "in_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID",dest, "in_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID");
403	_component->port_map(name, "in_SPR_WRITE_"+toString(i)+"_NUM_REG" ,dest, "in_SPR_WRITE_"+toString(i)+"_NUM_REG" );
404	_component->port_map(name, "in_SPR_WRITE_"+toString(i)+"_DATA" ,dest, "in_SPR_WRITE_"+toString(i)+"_DATA" );
405	}
406	}
407
408	{
409	name = _name+"_reservation_station";
410	log_printf(INFO,Core,FUNCTION,_("Instance : %s"),name.c_str());
411	{
412	#ifdef POSITION
413	_component->interface_map (name ,"",
414	_name,"");
415	#endif
416
417	_component->port_map(name,"in_CLOCK" , _name, "in_CLOCK");
418	_component->port_map(name,"in_NRESET", _name, "in_NRESET");
419	}
420
421	// ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
422	{
423	std::string dest = _name+"_read_queue";
424
425	#ifdef POSITION
426	_component->interface_map (name,"insert",
427	dest,"read_queue_in");
428	#endif
429
430	_component->port_map(name, "in_INSERT_VAL" ,dest,"out_READ_QUEUE_OUT_VAL" );
431	_component->port_map(name,"out_INSERT_ACK" ,dest, "in_READ_QUEUE_OUT_ACK" );
432	if (_param->_have_port_context_id)
433	_component->port_map(name, "in_INSERT_CONTEXT_ID" ,dest,"out_READ_QUEUE_OUT_CONTEXT_ID" );
434	if (_param->_have_port_front_end_id)
435	_component->port_map(name, "in_INSERT_FRONT_END_ID" ,dest,"out_READ_QUEUE_OUT_FRONT_END_ID" );
436	if (_param->_have_port_ooo_engine_id)
437	_component->port_map(name, "in_INSERT_OOO_ENGINE_ID" ,dest,"out_READ_QUEUE_OUT_OOO_ENGINE_ID" );
438	if (_param->_have_port_rob_ptr)
439	_component->port_map(name, "in_INSERT_ROB_ID" ,dest,"out_READ_QUEUE_OUT_ROB_ID" );
440	_component->port_map(name, "in_INSERT_OPERATION" ,dest,"out_READ_QUEUE_OUT_OPERATION" );
441	_component->port_map(name, "in_INSERT_TYPE" ,dest,"out_READ_QUEUE_OUT_TYPE" );
442	_component->port_map(name, "in_INSERT_CANCEL" ,dest,"out_READ_QUEUE_OUT_CANCEL" );
443	_component->port_map(name, "in_INSERT_STORE_QUEUE_PTR_WRITE",dest,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE");
444	_component->port_map(name, "in_INSERT_STORE_QUEUE_PTR_READ" ,dest,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_READ" );
445	_component->port_map(name, "in_INSERT_STORE_QUEUE_EMPTY" ,dest,"out_READ_QUEUE_OUT_STORE_QUEUE_EMPTY" );
446	if (_param->_have_port_load_queue_ptr)
447	_component->port_map(name, "in_INSERT_LOAD_QUEUE_PTR_WRITE" ,dest,"out_READ_QUEUE_OUT_LOAD_QUEUE_PTR_WRITE" );
448	_component->port_map(name, "in_INSERT_HAS_IMMEDIAT" ,dest,"out_READ_QUEUE_OUT_HAS_IMMEDIAT" );
449	_component->port_map(name, "in_INSERT_IMMEDIAT" ,dest,"out_READ_QUEUE_OUT_IMMEDIAT" );
450	// _component->port_map(name, "in_INSERT_READ_RA" ,dest,"out_READ_QUEUE_OUT_READ_RA" );
451	_component->port_map(name, "in_INSERT_NUM_REG_RA" ,dest,"out_READ_QUEUE_OUT_NUM_REG_RA" );
452	_component->port_map(name, "in_INSERT_DATA_RA_VAL" ,dest,"out_READ_QUEUE_OUT_DATA_RA_VAL" );
453	_component->port_map(name, "in_INSERT_DATA_RA" ,dest,"out_READ_QUEUE_OUT_DATA_RA" );
454	// _component->port_map(name, "in_INSERT_READ_RB" ,dest,"out_READ_QUEUE_OUT_READ_RB" );
455	_component->port_map(name, "in_INSERT_NUM_REG_RB" ,dest,"out_READ_QUEUE_OUT_NUM_REG_RB" );
456	_component->port_map(name, "in_INSERT_DATA_RB_VAL" ,dest,"out_READ_QUEUE_OUT_DATA_RB_VAL" );
457	_component->port_map(name, "in_INSERT_DATA_RB" ,dest,"out_READ_QUEUE_OUT_DATA_RB" );
458	// _component->port_map(name, "in_INSERT_READ_RC" ,dest,"out_READ_QUEUE_OUT_READ_RC" );
459	_component->port_map(name, "in_INSERT_NUM_REG_RC" ,dest,"out_READ_QUEUE_OUT_NUM_REG_RC" );
460	_component->port_map(name, "in_INSERT_DATA_RC_VAL" ,dest,"out_READ_QUEUE_OUT_DATA_RC_VAL" );
461	_component->port_map(name, "in_INSERT_DATA_RC" ,dest,"out_READ_QUEUE_OUT_DATA_RC" );
462	_component->port_map(name, "in_INSERT_WRITE_RD" ,dest,"out_READ_QUEUE_OUT_WRITE_RD" );
463	_component->port_map(name, "in_INSERT_NUM_REG_RD" ,dest,"out_READ_QUEUE_OUT_NUM_REG_RD" );
464	_component->port_map(name, "in_INSERT_WRITE_RE" ,dest,"out_READ_QUEUE_OUT_WRITE_RE" );
465	_component->port_map(name, "in_INSERT_NUM_REG_RE" ,dest,"out_READ_QUEUE_OUT_NUM_REG_RE" );
466	}
467
468	// ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
469	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
470	{
471	std::string dest = _name;
472
473	#ifdef POSITION
474	_component->interface_map (name,"retire_"+toString(i),
475	dest,"read_unit_out_"+toString(i));
476	#endif
477
478	_component->port_map(name,"out_RETIRE_"+toString(i)+"_VAL" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_VAL" );
479	_component->port_map(name, "in_RETIRE_"+toString(i)+"_ACK" ,dest, "in_READ_UNIT_OUT_"+toString(i)+"_ACK" );
480	if (_param->_have_port_context_id)
481	_component->port_map(name,"out_RETIRE_"+toString(i)+"_CONTEXT_ID" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_CONTEXT_ID" );
482	if (_param->_have_port_front_end_id)
483	_component->port_map(name,"out_RETIRE_"+toString(i)+"_FRONT_END_ID" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_FRONT_END_ID" );
484	if (_param->_have_port_ooo_engine_id)
485	_component->port_map(name,"out_RETIRE_"+toString(i)+"_OOO_ENGINE_ID" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_OOO_ENGINE_ID" );
486	if (_param->_have_port_rob_ptr)
487	_component->port_map(name,"out_RETIRE_"+toString(i)+"_ROB_ID" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_PACKET_ID" );
488	_component->port_map(name,"out_RETIRE_"+toString(i)+"_OPERATION" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_OPERATION" );
489	_component->port_map(name,"out_RETIRE_"+toString(i)+"_TYPE" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_TYPE" );
490	_component->port_map(name,"out_RETIRE_"+toString(i)+"_CANCEL" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_CANCEL" );
491	_component->port_map(name,"out_RETIRE_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",dest,"out_READ_UNIT_OUT_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
492	_component->port_map(name,"out_RETIRE_"+toString(i)+"_STORE_QUEUE_PTR_READ" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_STORE_QUEUE_PTR_READ" );
493	_component->port_map(name,"out_RETIRE_"+toString(i)+"_STORE_QUEUE_EMPTY" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_STORE_QUEUE_EMPTY" );
494	if (_param->_have_port_load_queue_ptr)
495	_component->port_map(name,"out_RETIRE_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
496	_component->port_map(name,"out_RETIRE_"+toString(i)+"_HAS_IMMEDIAT" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_HAS_IMMEDIAT" );
497	_component->port_map(name,"out_RETIRE_"+toString(i)+"_IMMEDIAT" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_IMMEDIAT" );
498	_component->port_map(name,"out_RETIRE_"+toString(i)+"_DATA_RA" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_DATA_RA" );
499	_component->port_map(name,"out_RETIRE_"+toString(i)+"_DATA_RB" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_DATA_RB" );
500	_component->port_map(name,"out_RETIRE_"+toString(i)+"_DATA_RC" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_DATA_RC" );
501	_component->port_map(name,"out_RETIRE_"+toString(i)+"_WRITE_RD" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_WRITE_RD" );
502	_component->port_map(name,"out_RETIRE_"+toString(i)+"_NUM_REG_RD" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_NUM_REG_RD" );
503	_component->port_map(name,"out_RETIRE_"+toString(i)+"_WRITE_RE" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_WRITE_RE" );
504	_component->port_map(name,"out_RETIRE_"+toString(i)+"_NUM_REG_RE" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_NUM_REG_RE" );
505	}
506
507	// ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
508	for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
509	{
510	std::string dest = _name;
511	#ifdef POSITION
512	_component->interface_map (name,"gpr_write_"+toString(i),
513	dest,"gpr_write_"+toString(i));
514	#endif
515
516	_component->port_map(name, "in_GPR_WRITE_"+toString(i)+"_VAL" ,dest, "in_GPR_WRITE_"+toString(i)+"_VAL" );
517	if (_param->_have_port_ooo_engine_id)
518	_component->port_map(name, "in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID",dest, "in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID");
519	_component->port_map(name, "in_GPR_WRITE_"+toString(i)+"_NUM_REG" ,dest, "in_GPR_WRITE_"+toString(i)+"_NUM_REG" );
520	_component->port_map(name, "in_GPR_WRITE_"+toString(i)+"_DATA" ,dest, "in_GPR_WRITE_"+toString(i)+"_DATA" );
521	}
522	// ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
523	for (uint32_t i=0; i<_param->_nb_spr_write; i++)
524	{
525	std::string dest = _name;
526	#ifdef POSITION
527	_component->interface_map (name,"spr_write_"+toString(i),
528	dest,"spr_write_"+toString(i));
529	#endif
530
531	_component->port_map(name, "in_SPR_WRITE_"+toString(i)+"_VAL" ,dest, "in_SPR_WRITE_"+toString(i)+"_VAL" );
532	if (_param->_have_port_ooo_engine_id)
533	_component->port_map(name, "in_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID",dest, "in_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID");
534	_component->port_map(name, "in_SPR_WRITE_"+toString(i)+"_NUM_REG" ,dest, "in_SPR_WRITE_"+toString(i)+"_NUM_REG" );
535	_component->port_map(name, "in_SPR_WRITE_"+toString(i)+"_DATA" ,dest, "in_SPR_WRITE_"+toString(i)+"_DATA" );
536	}
537	// ~~~~~[ Interface "bypass_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
538	for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
539	{
540	std::string dest = _name;
541	#ifdef POSITION
542	_component->interface_map (name,"bypass_write_"+toString(i),
543	dest,"bypass_write_"+toString(i));
544	#endif
545
546	if (_param->_have_port_ooo_engine_id)
547	_component->port_map(name, "in_BYPASS_WRITE_"+toString(i)+"_OOO_ENGINE_ID",dest, "in_BYPASS_WRITE_"+toString(i)+"_OOO_ENGINE_ID");
548	_component->port_map(name, "in_BYPASS_WRITE_"+toString(i)+"_GPR_VAL" ,dest, "in_BYPASS_WRITE_"+toString(i)+"_GPR_VAL" );
549	_component->port_map(name, "in_BYPASS_WRITE_"+toString(i)+"_GPR_NUM_REG" ,dest, "in_BYPASS_WRITE_"+toString(i)+"_GPR_NUM_REG" );
550	_component->port_map(name, "in_BYPASS_WRITE_"+toString(i)+"_GPR_DATA" ,dest, "in_BYPASS_WRITE_"+toString(i)+"_GPR_DATA" );
551	_component->port_map(name, "in_BYPASS_WRITE_"+toString(i)+"_SPR_VAL" ,dest, "in_BYPASS_WRITE_"+toString(i)+"_SPR_VAL" );
552	_component->port_map(name, "in_BYPASS_WRITE_"+toString(i)+"_SPR_NUM_REG" ,dest, "in_BYPASS_WRITE_"+toString(i)+"_SPR_NUM_REG" );
553	_component->port_map(name, "in_BYPASS_WRITE_"+toString(i)+"_SPR_DATA" ,dest, "in_BYPASS_WRITE_"+toString(i)+"_SPR_DATA" );
554	}
555	// ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
556	for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
557	{
558	std::string dest = _name;
559	#ifdef POSITION
560	_component->interface_map (name,"bypass_memory_"+toString(i),
561	dest,"bypass_memory_"+toString(i));
562	#endif
563
564	if (_param->_have_port_ooo_engine_id)
565	_component->port_map(name, "in_BYPASS_MEMORY_"+toString(i)+"_OOO_ENGINE_ID",dest, "in_BYPASS_MEMORY_"+toString(i)+"_OOO_ENGINE_ID");
566	_component->port_map(name, "in_BYPASS_MEMORY_"+toString(i)+"_VAL" ,dest, "in_BYPASS_MEMORY_"+toString(i)+"_VAL" );
567	_component->port_map(name, "in_BYPASS_MEMORY_"+toString(i)+"_NUM_REG" ,dest, "in_BYPASS_MEMORY_"+toString(i)+"_NUM_REG" );
568	_component->port_map(name, "in_BYPASS_MEMORY_"+toString(i)+"_DATA" ,dest, "in_BYPASS_MEMORY_"+toString(i)+"_DATA" );
569	}
570	}
571
572	#if DEBUG_Read_unit == true
573	_component->test_map();
574	#endif
575
576	#ifdef POSITION
577	if (usage_is_set(_usage,USE_POSITION))
578	_component->generate_file();
579	#endif
580
581	log_printf(FUNC,Read_unit,FUNCTION,"End");
582	};
583
584	}; // end namespace read_unit
585	}; // end namespace multi_read_unit
586	}; // end namespace execute_loop
587	}; // end namespace multi_execute_loop
588	}; // end namespace core
589
590	}; // end namespace behavioural
591	}; // end namespace morpheo

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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_allocation.cpp @ 138

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