[73] | 1 | #ifdef VHDL |
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| 2 | /* |
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| 3 | * $Id: Execute_queue_vhdl_body.cpp 96 2008-12-16 19:36:25Z moulu $ |
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| 4 | * |
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[96] | 5 | * [ Description ] |
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[73] | 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Execute_queue.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace core { |
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| 14 | namespace multi_execute_loop { |
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| 15 | namespace execute_loop { |
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| 16 | namespace multi_write_unit { |
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| 17 | namespace write_unit { |
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| 18 | namespace execute_queue { |
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| 19 | |
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| 20 | |
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| 21 | #undef FUNCTION |
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| 22 | #define FUNCTION "Execute_queue::vhdl_body" |
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| 23 | void Execute_queue::vhdl_body (Vhdl * & vhdl) |
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| 24 | { |
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| 25 | log_printf(FUNC,Execute_queue,FUNCTION,"Begin"); |
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[96] | 26 | vhdl->set_body (0,""); |
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| 27 | vhdl->set_body (0,"process (in_CLOCK)"); |
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| 28 | vhdl->set_body (0,"begin"); |
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| 29 | vhdl->set_body (1,"if in_CLOCK'event and in_CLOCK = '1' then"); |
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| 30 | // vhdl->set_body (2,"if in_NRESET = '0' then"); |
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| 31 | // vhdl->set_body (3,"reg_CURRENT_STATE <= STATE_0;"); |
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| 32 | // vhdl->set_body (2,"else"); |
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| 33 | vhdl->set_body (3,"reg_CURRENT_STATE <= sig_NEXT_STATE;"); |
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| 34 | // vhdl->set_body (2,"end if;"); |
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| 35 | |
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| 36 | for (uint32_t i = 0; i <_param->_size_queue - 1; i++) |
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| 37 | { |
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| 38 | vhdl->set_body (2,"if sig_WEN_"+toString(i)+" = '1' then"); |
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| 39 | vhdl->set_body (3,"if sig_SEL_"+toString(i)+" = '0' then"); |
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| 40 | if (_param->_have_port_context_id) |
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| 41 | vhdl->set_body (4,"reg_CONTEXT_ID_"+toString(i)+" <= in_EXECUTE_QUEUE_IN_CONTEXT_ID;"); |
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| 42 | if (_param->_have_port_front_end_id) |
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| 43 | vhdl->set_body (4,"reg_FRONT_END_ID_"+toString(i)+" <= in_EXECUTE_QUEUE_IN_FRONT_END_ID;"); |
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| 44 | if (_param->_have_port_ooo_engine_id) |
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| 45 | vhdl->set_body (4,"reg_OOO_ENGINE_ID_"+toString(i)+" <= in_EXECUTE_QUEUE_IN_OOO_ENGINE_ID;"); |
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| 46 | if (_param->_have_port_rob_ptr) |
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| 47 | vhdl->set_body (4,"reg_PACKET_ID_"+toString(i)+" <= in_EXECUTE_QUEUE_IN_PACKET_ID;"); |
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| 48 | vhdl->set_body (4, "reg_FLAGS_"+toString(i)+" <= in_EXECUTE_QUEUE_IN_FLAGS;"); |
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| 49 | vhdl->set_body (4, "reg_EXCEPTION_"+toString(i)+" <= in_EXECUTE_QUEUE_IN_EXCEPTION;"); |
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| 50 | vhdl->set_body (4, "reg_NO_SEQUENCE_"+toString(i)+" <= in_EXECUTE_QUEUE_IN_NO_SEQUENCE;"); |
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| 51 | vhdl->set_body (4, "reg_ADDRESS_"+toString(i)+" <= in_EXECUTE_QUEUE_IN_ADDRESS;"); |
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| 52 | vhdl->set_body (4, "reg_DATA_"+toString(i)+" <= in_EXECUTE_QUEUE_IN_DATA;"); |
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| 53 | |
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| 54 | vhdl->set_body (3, "else"); |
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| 55 | if (_param->_have_port_context_id) |
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| 56 | vhdl->set_body (4,"reg_CONTEXT_ID_"+toString(i)+" <= reg_CONTEXT_ID_"+toString(i+1)+";"); |
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| 57 | if (_param->_have_port_front_end_id) |
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| 58 | vhdl->set_body (4,"reg_FRONT_END_ID_"+toString(i)+" <= reg_FRONT_END_ID_"+toString(i+1)+";"); |
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| 59 | if (_param->_have_port_ooo_engine_id) |
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| 60 | vhdl->set_body (4,"reg_OOO_ENGINE_ID_"+toString(i)+" <= reg_OOO_ENGINE_ID_"+toString(i+1)+";"); |
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| 61 | if (_param->_have_port_rob_ptr) |
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| 62 | vhdl->set_body (4,"reg_PACKET_ID_"+toString(i)+" <= reg_PACKET_ID_"+toString(i+1)+";"); |
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| 63 | vhdl->set_body (4, "reg_FLAGS_"+toString(i)+" <= reg_FLAGS_"+toString(i+1)+";"); |
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| 64 | vhdl->set_body (4, "reg_EXCEPTION_"+toString(i)+" <= reg_EXCEPTION_"+toString(i+1)+";"); |
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| 65 | vhdl->set_body (4, "reg_NO_SEQUENCE_"+toString(i)+" <= reg_NO_SEQUENCE_"+toString(i+1)+";"); |
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| 66 | vhdl->set_body (4, "reg_ADDRESS_"+toString(i)+" <= reg_ADDRESS_"+toString(i+1)+";"); |
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| 67 | vhdl->set_body (4, "reg_DATA_"+toString(i)+" <= reg_DATA_"+toString(i+1)+";"); |
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| 68 | |
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| 69 | vhdl->set_body (3,"end if;"); |
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| 70 | |
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| 71 | vhdl->set_body (2,"end if;"); |
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| 72 | } |
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| 73 | |
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| 74 | vhdl->set_body (2,"if sig_WEN_"+toString(_param->_size_queue-1)+" = '1' then"); |
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| 75 | if (_param->_have_port_context_id) |
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| 76 | vhdl->set_body (3,"reg_CONTEXT_ID_"+toString(_param->_size_queue-1)+" <= in_EXECUTE_QUEUE_IN_CONTEXT_ID;"); |
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| 77 | if (_param->_have_port_front_end_id) |
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| 78 | vhdl->set_body (3,"reg_FRONT_END_ID_"+toString(_param->_size_queue-1)+" <= in_EXECUTE_QUEUE_IN_FRONT_END_ID;"); |
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| 79 | if (_param->_have_port_ooo_engine_id) |
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| 80 | vhdl->set_body (3,"reg_OOO_ENGINE_ID_"+toString(_param->_size_queue-1)+" <= in_EXECUTE_QUEUE_IN_OOO_ENGINE_ID;"); |
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| 81 | if (_param->_have_port_rob_ptr) |
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| 82 | vhdl->set_body (3,"reg_PACKET_ID_"+toString(_param->_size_queue-1)+" <= in_EXECUTE_QUEUE_IN_PACKET_ID;"); |
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| 83 | vhdl->set_body (3, "reg_FLAGS_"+toString(_param->_size_queue-1)+" <= in_EXECUTE_QUEUE_IN_FLAGS;"); |
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| 84 | vhdl->set_body (3, "reg_EXCEPTION_"+toString(_param->_size_queue-1)+" <= in_EXECUTE_QUEUE_IN_EXCEPTION;"); |
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| 85 | vhdl->set_body (3, "reg_NO_SEQUENCE_"+toString(_param->_size_queue-1)+" <= in_EXECUTE_QUEUE_IN_NO_SEQUENCE;"); |
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| 86 | vhdl->set_body (3, "reg_ADDRESS_"+toString(_param->_size_queue-1)+" <= in_EXECUTE_QUEUE_IN_ADDRESS;"); |
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| 87 | vhdl->set_body (3, "reg_DATA_"+toString(_param->_size_queue-1)+" <= in_EXECUTE_QUEUE_IN_DATA;"); |
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| 88 | vhdl->set_body (2,"end if;"); |
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| 89 | |
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| 90 | |
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| 91 | vhdl->set_body (1,"end if;"); |
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| 92 | vhdl->set_body (0,"end process;"); |
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| 93 | |
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| 94 | |
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| 95 | vhdl->set_body (0,""); |
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| 96 | vhdl->set_body (0,""); |
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| 97 | vhdl->set_body (0,""); |
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| 98 | |
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| 99 | vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_VAL <= sig_OUT_VAL;"); |
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| 100 | vhdl->set_body (0,"out_EXECUTE_QUEUE_IN_ACK <= sig_IN_ACK;"); |
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| 101 | if (_param->_have_port_context_id) |
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| 102 | vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_CONTEXT_ID <= reg_CONTEXT_ID_0;"); |
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| 103 | if (_param->_have_port_front_end_id) |
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| 104 | vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_FRONT_END_ID <= reg_FRONT_END_ID_0;"); |
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| 105 | if (_param->_have_port_ooo_engine_id) |
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| 106 | vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_OOO_ENGINE_ID <= reg_OOO_ENGINE_ID_0;"); |
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| 107 | if (_param->_have_port_rob_ptr) |
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| 108 | vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_PACKET_ID <= reg_PACKET_ID_0;"); |
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| 109 | vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_FLAGS <= reg_FLAGS_0;"); |
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| 110 | vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_EXCEPTION <= reg_EXCEPTION_0;"); |
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| 111 | vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_NO_SEQUENCE <= reg_NO_SEQUENCE_0;"); |
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| 112 | vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_ADDRESS <= reg_ADDRESS_0;"); |
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| 113 | vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_DATA <= reg_DATA_0;"); |
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| 114 | |
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| 115 | |
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| 116 | vhdl->set_body (0,""); |
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| 117 | |
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| 118 | vhdl->set_body (0,"process (reg_CURRENT_STATE, in_EXECUTE_QUEUE_OUT_ACK, in_EXECUTE_QUEUE_IN_VAL, in_NRESET)"); |
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| 119 | vhdl->set_body (0,"begin"); |
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| 120 | vhdl->set_body (1,"if in_NRESET = '0' then"); |
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| 121 | vhdl->set_body (2,"sig_NEXT_STATE <= STATE_0;"); |
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| 122 | vhdl->set_body (1,"else"); |
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| 123 | vhdl->set_body (2,"case reg_CURRENT_STATE is"); |
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| 124 | for (uint32_t i = 0; i <_param->_size_queue + 1; i++) |
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| 125 | { |
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| 126 | vhdl->set_body (3,"when STATE_"+toString(i)+" =>"); |
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| 127 | if (i == 0) |
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| 128 | { |
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| 129 | vhdl->set_body (4,"if in_EXECUTE_QUEUE_IN_VAL = '1' then"); |
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| 130 | vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE ("+toString(_param->_size_queue-1)+" downto 0) & '0';"); |
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| 131 | vhdl->set_body (4,"else"); |
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| 132 | vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE;"); |
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| 133 | vhdl->set_body (4,"end if;"); |
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| 134 | continue; |
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| 135 | } |
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| 136 | if (i == (_param->_size_queue)) |
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| 137 | { |
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| 138 | vhdl->set_body (4,"if in_EXECUTE_QUEUE_OUT_ACK = '1' then"); |
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| 139 | vhdl->set_body (5,"sig_NEXT_STATE <= '0' & reg_CURRENT_STATE ("+toString(_param->_size_queue)+" downto 1);"); |
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| 140 | vhdl->set_body (4,"else"); |
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| 141 | vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE;"); |
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| 142 | vhdl->set_body (4,"end if;"); |
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| 143 | continue; |
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| 144 | } |
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| 145 | vhdl->set_body (4,"if in_EXECUTE_QUEUE_IN_VAL = '1' and in_EXECUTE_QUEUE_OUT_ACK = '0' then"); |
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| 146 | vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE ("+toString(_param->_size_queue-1)+" downto 0) & '0';"); |
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| 147 | vhdl->set_body (4,"elsif in_EXECUTE_QUEUE_IN_VAL = '0' and in_EXECUTE_QUEUE_OUT_ACK = '1' then"); |
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| 148 | vhdl->set_body (5,"sig_NEXT_STATE <= '0' & reg_CURRENT_STATE ("+toString(_param->_size_queue)+" downto 1);"); |
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| 149 | vhdl->set_body (4,"else"); |
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| 150 | vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE;"); |
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| 151 | vhdl->set_body (4,"end if;"); |
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| 152 | } |
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| 153 | vhdl->set_body (3,"when others => assert false report \"wrong state\" severity failure;"); |
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| 154 | vhdl->set_body (2,"end case;"); |
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| 155 | vhdl->set_body (1,"end if;"); |
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| 156 | |
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| 157 | vhdl->set_body (2,"case reg_CURRENT_STATE is"); |
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| 158 | for (uint32_t i = 0; i <_param->_size_queue + 1; i++) |
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| 159 | { |
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| 160 | vhdl->set_body (3,"when STATE_"+toString(i)+" =>"); |
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| 161 | if (i == 0) |
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| 162 | { |
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| 163 | vhdl->set_body (4,"sig_OUT_VAL <= '0';"); |
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| 164 | vhdl->set_body (4,"sig_IN_ACK <= '1';"); |
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| 165 | for (uint32_t j = 0; j <_param->_size_queue; j++) |
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| 166 | { |
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| 167 | if (i == j) |
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| 168 | { |
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| 169 | vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';"); |
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| 170 | vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_IN_VAL;"); |
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| 171 | } |
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| 172 | else |
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| 173 | { |
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| 174 | if (j < (_param->_size_queue - 1)) |
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| 175 | vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';"); |
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| 176 | vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= '0';"); |
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| 177 | } |
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| 178 | } |
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| 179 | continue; |
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| 180 | } |
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| 181 | if (i == (_param->_size_queue)) |
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| 182 | { |
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| 183 | vhdl->set_body (4,"sig_OUT_VAL <= '1';"); |
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| 184 | vhdl->set_body (4,"sig_IN_ACK <= '0';"); |
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| 185 | for (uint32_t j = 0; j <_param->_size_queue; j++) |
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| 186 | { |
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| 187 | if (j == (i - 1)) |
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| 188 | { |
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| 189 | vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= '0';"); |
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| 190 | } |
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| 191 | else |
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| 192 | { |
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| 193 | vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;"); |
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| 194 | vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;"); |
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| 195 | } |
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| 196 | } |
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| 197 | continue; |
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| 198 | } |
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| 199 | vhdl->set_body (4,"sig_OUT_VAL <= '1';"); |
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| 200 | vhdl->set_body (4,"sig_IN_ACK <= '1';"); |
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| 201 | for (uint32_t j = 0; j <_param->_size_queue; j++) |
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| 202 | { |
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| 203 | if (j < (i - 1)) |
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| 204 | { |
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| 205 | vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;"); |
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| 206 | vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;"); |
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| 207 | } |
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| 208 | if (j == (i - 1)) |
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| 209 | { |
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| 210 | vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';"); |
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| 211 | vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK and in_EXECUTE_QUEUE_IN_VAL;"); |
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| 212 | } |
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| 213 | if (j == i) |
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| 214 | { |
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| 215 | if (j < (_param->_size_queue - 1)) |
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| 216 | vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';"); |
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| 217 | vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_IN_VAL and not in_EXECUTE_QUEUE_OUT_ACK;"); |
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| 218 | } |
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| 219 | if (j > i) |
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| 220 | { |
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| 221 | if (j < (_param->_size_queue - 1)) |
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| 222 | vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';"); |
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| 223 | vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= '0';"); |
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| 224 | } |
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| 225 | } |
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| 226 | } |
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| 227 | vhdl->set_body (3,"when others =>"); |
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| 228 | vhdl->set_body (2,"end case;"); |
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| 229 | |
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| 230 | vhdl->set_body (0,"end process;"); |
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| 231 | |
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| 232 | |
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| 233 | |
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| 234 | // vhdl->set_body (2,"end case;"); |
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| 235 | // for (uint32_t i = 0; i <_param->_size_queue; i++) |
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| 236 | // { |
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| 237 | // if (i == 0) |
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| 238 | // vhdl->set_body (4,"sig_WEN_"+toString(i)+" <= in_EXECUTE_QUEUE_IN_VAL;"); |
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| 239 | // else |
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| 240 | // vhdl->set_body (4,"sig_WEN_"+toString(i)+" <= '0';"); |
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| 241 | // if (i < _param->_size_queue - 1) |
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| 242 | // vhdl->set_body (4,"sig_SEL_"+toString(i)+" <= '0';"); |
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| 243 | // } |
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| 244 | // vhdl->set_body (2,"end process;"); |
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| 245 | |
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| 246 | // vhdl->set_body (0,"sig_TRANS_OUT <="); |
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| 247 | // vhdl->set_body (1,"'0' when reg_CURRENT_STATE = STATE_0 else"); |
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| 248 | // vhdl->set_body (1,"'1';"); |
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| 249 | |
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| 250 | // vhdl->set_body (0,"sig_TRANS_IN <="); |
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| 251 | // vhdl->set_body (1,"'0' when reg_CURRENT_STATE = STATE_"+toString(_param->_size_queue)+" else"); |
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| 252 | // vhdl->set_body (1,"'1';"); |
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| 253 | |
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| 254 | |
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| 255 | |
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| 256 | // vhdl->set_body (0,"sig_NEXT_STATE <="); |
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| 257 | // vhdl->set_body (1,"reg_CURRENT_STATE("+toString(_param->_size_queue-1)+" downto 0) & '0' when in_EXECUTE_QUEUE_IN_VAL = '1' and ((reg_CURRENT_STATE = STATE_0) xor (in_EXECUTE_QUEUE_OUT_ACK = '0')) and sig_TRANS_IN = '1' else"); |
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| 258 | // vhdl->set_body (1,"'0' & reg_CURRENT_STATE("+toString(_param->_size_queue)+" downto 1) when in_EXECUTE_QUEUE_OUT_ACK = '1' and ((in_EXECUTE_QUEUE_IN_VAL = '0') xor (reg_CURRENT_STATE = STATE_"+toString(_param->_size_queue)+")) and sig_TRANS_OUT = '1' else"); |
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| 259 | // vhdl->set_body (1,"reg_CURRENT_STATE;"); |
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| 260 | |
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| 261 | // vhdl->set_body (0,"sig_WEN_0 <="); |
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| 262 | // vhdl->set_body (1,"in_EXECUTE_QUEUE_IN_VAL when reg_CURRENT_STATE = STATE_0 else"); |
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| 263 | // vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK and in_EXECUTE_QUEUE_IN_VAL when reg_CURRENT_STATE = STATE_1 else"); |
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| 264 | // vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK;"); |
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| 265 | // for (uint32_t i = 1; i <_param->_size_queue-1; i++) |
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| 266 | // { |
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| 267 | // vhdl->set_body (0,"sig_WEN_"+toString(i)+" <="); |
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| 268 | // vhdl->set_body (1,"in_EXECUTE_QUEUE_IN_VAL and not in_EXECUTE_QUEUE_OUT_ACK when reg_CURRENT_STATE = STATE_"+toString(i)+" else"); |
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| 269 | // vhdl->set_body (1,"in_EXECUTE_QUEUE_IN_VAL and in_EXECUTE_QUEUE_OUT_ACK when reg_CURRENT_STATE = STATE_"+toString(i+1)+" else"); |
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| 270 | // vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK;"); |
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| 271 | // } |
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| 272 | // vhdl->set_body (0,"sig_WEN_"+toString(_param->_size_queue-1)+" <="); |
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| 273 | // vhdl->set_body (1,"in_EXECUTE_QUEUE_IN_VAL and not in_EXECUTE_QUEUE_OUT_ACK when reg_CURRENT_STATE = STATE_"+toString(_param->_size_queue-1)+" else"); |
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| 274 | // vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK;"); |
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| 275 | |
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| 276 | // vhdl->set_body (0,""); |
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| 277 | // for (uint32_t i = 0; i <_param->_size_queue-1; i++) |
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| 278 | // { |
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| 279 | // vhdl->set_body (0,"sig_SEL_"+toString(i)+" <="); |
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| 280 | // vhdl->set_body (1,"'0' when reg_CURRENT_STATE = STATE_"+toString(i+1)+" or reg_CURRENT_STATE = STATE_"+toString(i)+" else"); |
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| 281 | // vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK;"); |
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| 282 | // } |
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| 283 | |
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| 284 | // process (reg_CURRENT_STATE, in_PUSH_0_VAL, in_POP_0_ACK) |
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| 285 | // begin |
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| 286 | // case reg_CURRENT_STATE is |
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| 287 | |
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| 288 | // with reg_CURRENT_STATE select |
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| 289 | // sig_WEN0 <= |
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| 290 | // 0 when 1, |
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| 291 | // 4 when 6; |
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| 292 | // when "00001" => out_POP_0_VAL <= '0'; |
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| 293 | // out_PUSH_0_ACK <= '1'; |
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| 294 | // sig_SEL0 <= '0'; |
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| 295 | // sig_WEN0 <= in_PUSH_0_VAL; |
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| 296 | // sig_SEL1 <= '0'; |
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| 297 | // sig_WEN1 <= '0'; |
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| 298 | // sig_SEL2 <= '0'; |
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| 299 | // sig_WEN2 <= '0'; |
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| 300 | // sig_WEN3 <= '0'; |
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| 301 | // if in_PUSH_0_VAL = '1' then |
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| 302 | // sig_NEXT_STATE <= reg_CURRENT_STATE(3 downto 0) & '0'; |
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| 303 | // else |
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| 304 | // sig_NEXT_STATE <= reg_CURRENT_STATE; |
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| 305 | // end if; |
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| 306 | |
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| 307 | // when "00010" => out_POP_0_VAL <= '1'; |
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| 308 | // out_PUSH_0_ACK <= '1'; |
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| 309 | // sig_SEL0 <= '0'; |
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| 310 | // sig_WEN0 <= in_POP_0_ACK and in_PUSH_0_VAL; |
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| 311 | // sig_SEL1 <= '0'; |
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| 312 | // sig_WEN1 <= in_PUSH_0_VAL and not in_POP_0_ACK; |
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| 313 | // sig_SEL2 <= '0'; |
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| 314 | // sig_WEN2 <= '0'; |
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| 315 | // sig_WEN3 <= '0'; |
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| 316 | // if (in_PUSH_0_VAL = '1') and (in_POP_0_ACK = '0') then |
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| 317 | // sig_NEXT_STATE <= reg_CURRENT_STATE(3 downto 0) & '0'; |
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| 318 | // elsif (in_PUSH_0_VAL = '0') and (in_POP_0_ACK = '1') then |
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| 319 | // sig_NEXT_STATE <= '0' & reg_CURRENT_STATE(4 downto 1); |
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| 320 | // else |
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| 321 | // sig_NEXT_STATE <= reg_CURRENT_STATE; |
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| 322 | // end if; |
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| 323 | |
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| 324 | // when "00100" => out_POP_0_VAL <= '1'; |
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| 325 | // out_PUSH_0_ACK <= '1'; |
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| 326 | // sig_SEL0 <= in_POP_0_ACK; |
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| 327 | // sig_WEN0 <= in_POP_0_ACK; |
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| 328 | // sig_SEL1 <= '0'; |
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| 329 | // sig_WEN1 <= in_POP_0_ACK and in_PUSH_0_VAL; |
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| 330 | // sig_SEL2 <= '0'; |
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| 331 | // sig_WEN2 <= in_PUSH_0_VAL and not in_POP_0_ACK; |
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| 332 | // sig_WEN3 <= '0'; |
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| 333 | // if (in_PUSH_0_VAL = '1') and (in_POP_0_ACK = '0') then |
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| 334 | // sig_NEXT_STATE <= reg_CURRENT_STATE(3 downto 0) & '0'; |
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| 335 | // elsif (in_PUSH_0_VAL = '0') and (in_POP_0_ACK = '1') then |
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| 336 | // sig_NEXT_STATE <= '0' & reg_CURRENT_STATE(4 downto 1); |
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| 337 | // else |
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| 338 | // sig_NEXT_STATE <= reg_CURRENT_STATE; |
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| 339 | // end if; |
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| 340 | |
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| 341 | // when "01000" => out_POP_0_VAL <= '1'; |
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| 342 | // out_PUSH_0_ACK <= '1'; |
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| 343 | // sig_SEL0 <= in_POP_0_ACK; |
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| 344 | // sig_WEN0 <= in_POP_0_ACK; |
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| 345 | // sig_SEL1 <= in_POP_0_ACK; |
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| 346 | // sig_WEN1 <= in_POP_0_ACK; |
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| 347 | // sig_SEL2 <= '0'; |
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| 348 | // sig_WEN2 <= in_POP_0_ACK and in_PUSH_0_VAL; |
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| 349 | // sig_WEN3 <= in_PUSH_0_VAL and not in_POP_0_ACK; |
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| 350 | // if (in_PUSH_0_VAL = '1') and (in_POP_0_ACK = '0') then |
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| 351 | // sig_NEXT_STATE <= reg_CURRENT_STATE(3 downto 0) & '0'; |
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| 352 | // elsif (in_PUSH_0_VAL = '0') and (in_POP_0_ACK = '1') then |
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| 353 | // sig_NEXT_STATE <= '0' & reg_CURRENT_STATE(4 downto 1); |
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| 354 | // else |
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| 355 | // sig_NEXT_STATE <= reg_CURRENT_STATE; |
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| 356 | // end if; |
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| 357 | |
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| 358 | // when "10000" => out_POP_0_VAL <= '1'; |
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| 359 | // out_PUSH_0_ACK <= '0'; |
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| 360 | // sig_SEL0 <= in_POP_0_ACK; |
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| 361 | // sig_WEN0 <= in_POP_0_ACK; |
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| 362 | // sig_SEL1 <= in_POP_0_ACK; |
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| 363 | // sig_WEN1 <= in_POP_0_ACK; |
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| 364 | // sig_SEL2 <= in_POP_0_ACK; |
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| 365 | // sig_WEN2 <= in_POP_0_ACK; |
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| 366 | // sig_WEN3 <= '0'; |
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| 367 | // if (in_PUSH_0_VAL = '0') and (in_POP_0_ACK = '1') then |
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| 368 | // sig_NEXT_STATE <= '0' & reg_CURRENT_STATE(4 downto 1); |
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| 369 | // else |
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| 370 | // sig_NEXT_STATE <= reg_CURRENT_STATE; |
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| 371 | // end if; |
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| 372 | |
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| 373 | // when others => |
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| 374 | // sig_next_state <= "00001"; |
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| 375 | |
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| 376 | // end case; |
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| 377 | // end process; |
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| 378 | |
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[73] | 379 | log_printf(FUNC,Execute_queue,FUNCTION,"End"); |
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| 380 | }; |
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| 381 | |
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| 382 | }; // end namespace execute_queue |
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| 383 | }; // end namespace write_unit |
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| 384 | }; // end namespace multi_write_unit |
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| 385 | }; // end namespace execute_loop |
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| 386 | }; // end namespace multi_execute_loop |
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| 387 | }; // end namespace core |
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| 388 | |
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| 389 | }; // end namespace behavioural |
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| 390 | }; // end namespace morpheo |
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| 391 | #endif |
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