1 | /* |
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2 | * $Id: top_test.cpp 113 2009-04-14 18:39:12Z rosiere $ |
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3 | * |
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4 | * [ Description ] |
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5 | * |
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6 | * Test |
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7 | */ |
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8 | |
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9 | #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest/include/top.h" |
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10 | #include "Behavioural/include/Allocation.h" |
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11 | #include "Common/include/BitManipulation.h" |
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12 | |
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13 | class entry_t |
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14 | { |
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15 | public : Tcontext_t _context_id ; |
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16 | public : Tcontext_t _front_end_id ; |
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17 | public : Tcontext_t _ooo_engine_id; |
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18 | public : Tpacket_t _packet_id ; |
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19 | //public : Toperation_t _operation ; |
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20 | //public : Ttype_t _type ; |
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21 | public : Tcontrol_t _write_rd ; |
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22 | public : Tgeneral_address_t _num_reg_rd ; |
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23 | public : Tgeneral_data_t _data_rd ; |
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24 | public : Tcontrol_t _write_re ; |
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25 | public : Tspecial_address_t _num_reg_re ; |
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26 | public : Tspecial_data_t _data_re ; |
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27 | public : Texception_t _exception ; |
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28 | public : Tcontrol_t _no_sequence ; |
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29 | public : Tgeneral_data_t _address ; |
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30 | |
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31 | public : entry_t (Tcontext_t context_id , |
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32 | Tcontext_t front_end_id , |
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33 | Tcontext_t ooo_engine_id, |
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34 | Tpacket_t packet_id , |
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35 | // Toperation_t operation , |
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36 | // Ttype_t type , |
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37 | Tcontrol_t write_rd , |
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38 | Tgeneral_address_t num_reg_rd , |
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39 | Tgeneral_data_t data_rd , |
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40 | Tcontrol_t write_re , |
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41 | Tspecial_address_t num_reg_re , |
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42 | Tspecial_data_t data_re , |
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43 | Texception_t exception , |
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44 | Tcontrol_t no_sequence , |
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45 | Tgeneral_data_t address ) |
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46 | { |
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47 | _context_id = context_id ; |
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48 | _front_end_id = front_end_id ; |
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49 | _ooo_engine_id = ooo_engine_id; |
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50 | _packet_id = packet_id ; |
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51 | //_operation = operation ; |
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52 | //_type = type ; |
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53 | _write_rd = write_rd ; |
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54 | _num_reg_rd = num_reg_rd ; |
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55 | _data_rd = data_rd ; |
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56 | _write_re = write_re ; |
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57 | _num_reg_re = num_reg_re ; |
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58 | _data_re = data_re ; |
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59 | _exception = exception ; |
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60 | _no_sequence = no_sequence ; |
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61 | _address = address ; |
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62 | }; |
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63 | |
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64 | friend std::ostream& operator<< (std::ostream& output_stream, |
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65 | entry_t & x) |
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66 | { |
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67 | output_stream << " * _context_id : " << toString(x._context_id ) << std::endl |
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68 | << " * _front_end_id : " << toString(x._front_end_id ) << std::endl |
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69 | << " * _ooo_engine_id : " << toString(x._ooo_engine_id) << std::endl |
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70 | << " * _packet_id : " << toString(x._packet_id ) << std::endl |
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71 | //<< " * _operation : " << toString(x._operation ) << std::endl |
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72 | //<< " * _type : " << toString(x._type ) << std::endl |
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73 | << " * _write_rd : " << toString(x._write_rd ) << std::endl |
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74 | << " * _num_reg_rd : " << toString(x._num_reg_rd ) << std::endl |
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75 | << " * _data_rd : " << toString(x._data_rd ) << std::endl |
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76 | << " * _write_re : " << toString(x._write_re ) << std::endl |
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77 | << " * _num_reg_re : " << toString(x._num_reg_re ) << std::endl |
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78 | << " * _data_re : " << toString(x._data_re ) << std::endl |
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79 | << " * _exception : " << toString(x._exception ) << std::endl |
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80 | << " * _no_sequence : " << toString(x._no_sequence ) << std::endl |
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81 | << " * _address : " << toString(x._address ) << std::endl; |
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82 | |
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83 | return output_stream; |
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84 | } |
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85 | }; |
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86 | |
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87 | void top::test (void) |
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88 | { |
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89 | #ifdef SYSTEMC |
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90 | if (usage_is_set(_usage,USE_SYSTEMC)) |
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91 | { |
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92 | msgInformation(_("<%s> : Start Simulation ............\n"),name.c_str()); |
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93 | |
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94 | Time * _time = new Time(); |
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95 | |
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96 | /******************************************************** |
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97 | * Simulation - Begin |
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98 | ********************************************************/ |
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99 | |
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100 | // Initialisation |
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101 | |
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102 | const uint32_t seed = 0; |
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103 | //const uint32_t seed = static_cast<uint32_t>(time(NULL)); |
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104 | |
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105 | srand(seed); |
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106 | |
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107 | const int32_t percent_transaction_write_queue_in = 75; |
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108 | const int32_t percent_transaction_write_queue_out = 75; |
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109 | const int32_t percent_transaction_gpr = 75; |
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110 | const int32_t percent_transaction_spr = 75; |
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111 | |
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112 | bool gpr_val [_param->_nb_ooo_engine][_param->_nb_general_register]; |
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113 | bool gpr_use [_param->_nb_ooo_engine][_param->_nb_general_register]; |
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114 | Tgeneral_data_t gpr [_param->_nb_ooo_engine][_param->_nb_general_register]; |
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115 | bool spr_val [_param->_nb_ooo_engine][_param->_nb_special_register]; |
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116 | bool spr_use [_param->_nb_ooo_engine][_param->_nb_special_register]; |
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117 | Tgeneral_data_t spr [_param->_nb_ooo_engine][_param->_nb_special_register]; |
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118 | |
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119 | entry_t * request [_param->_nb_packet]; |
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120 | |
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121 | SC_CYCLE(0); |
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122 | LABEL("Initialisation"); |
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123 | |
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124 | LABEL("Reset"); |
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125 | in_NRESET->write(0); |
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126 | SC_CYCLE(5); |
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127 | in_NRESET->write(1); |
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128 | |
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129 | LABEL("Loop of Test"); |
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130 | |
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131 | for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) |
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132 | { |
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133 | LABEL("Iteration %d",iteration); |
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134 | |
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135 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
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136 | { |
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137 | for (uint32_t j=0; j<_param->_nb_general_register; j++) |
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138 | { |
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139 | gpr_val [i][j] = 0; |
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140 | gpr_use [i][j] = 0; |
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141 | gpr [i][j] = rand(); |
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142 | } |
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143 | for (uint32_t j=0; j<_param->_nb_special_register; j++) |
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144 | { |
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145 | spr_val [i][j] = 0; |
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146 | spr_use [i][j] = 0; |
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147 | spr [i][j] = rand(); |
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148 | } |
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149 | } |
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150 | |
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151 | for (uint32_t i=0; i<_param->_nb_packet; i++) |
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152 | { |
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153 | request [i] = new entry_t (range<Tcontext_t >(rand(),_param->_size_context_id ), |
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154 | range<Tcontext_t >(rand(),_param->_size_front_end_id ), |
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155 | range<Tcontext_t >(rand(),_param->_size_ooo_engine_id ), |
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156 | i, |
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157 | //range<Toperation_t >(rand(),_param->_size_operation ), |
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158 | //range<Ttype_t >(rand(),_param->_size_type ), |
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159 | range<Tcontrol_t >(rand(),1 ), |
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160 | range<Tgeneral_address_t>(rand(),_param->_size_general_register), |
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161 | range<Tgeneral_data_t >(rand(),_param->_size_general_data ), |
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162 | range<Tcontrol_t >(rand(),1 ), |
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163 | range<Tspecial_address_t>(rand(),_param->_size_special_register), |
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164 | range<Tspecial_data_t >(rand(),_param->_size_special_data ), |
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165 | range<Texception_t >(rand(),0 ), |
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166 | range<Tcontrol_t >(rand(),1 ), |
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167 | range<Tgeneral_data_t >(rand(),_param->_size_general_data )); |
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168 | } |
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169 | |
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170 | uint32_t nb_request_in = 0; |
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171 | uint32_t nb_request_out = 0; |
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172 | |
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173 | while (nb_request_out < _param->_nb_packet) |
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174 | { |
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175 | bool val = (((rand()%100)<percent_transaction_write_queue_in) and |
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176 | (nb_request_in < _param->_nb_packet) and |
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177 | not (request [nb_request_in]->_write_rd and |
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178 | gpr_use [request [nb_request_in]->_ooo_engine_id][request [nb_request_in]->_num_reg_rd]) and |
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179 | not (request [nb_request_in]->_write_re and |
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180 | spr_use [request [nb_request_in]->_ooo_engine_id][request [nb_request_in]->_num_reg_re])); |
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181 | |
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182 | in_WRITE_QUEUE_IN_VAL ->write(val); |
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183 | if (val) |
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184 | { |
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185 | in_WRITE_QUEUE_IN_CONTEXT_ID ->write(request [nb_request_in]->_context_id ); |
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186 | in_WRITE_QUEUE_IN_FRONT_END_ID ->write(request [nb_request_in]->_front_end_id ); |
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187 | in_WRITE_QUEUE_IN_OOO_ENGINE_ID->write(request [nb_request_in]->_ooo_engine_id); |
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188 | in_WRITE_QUEUE_IN_PACKET_ID ->write(request [nb_request_in]->_packet_id ); |
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189 | //in_WRITE_QUEUE_IN_OPERATION ->write(request [nb_request_in]->_operation ); |
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190 | //in_WRITE_QUEUE_IN_TYPE ->write(request [nb_request_in]->_type ); |
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191 | in_WRITE_QUEUE_IN_WRITE_RD ->write(request [nb_request_in]->_write_rd ); |
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192 | in_WRITE_QUEUE_IN_NUM_REG_RD ->write(request [nb_request_in]->_num_reg_rd ); |
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193 | in_WRITE_QUEUE_IN_DATA_RD ->write(request [nb_request_in]->_data_rd ); |
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194 | in_WRITE_QUEUE_IN_WRITE_RE ->write(request [nb_request_in]->_write_re ); |
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195 | in_WRITE_QUEUE_IN_NUM_REG_RE ->write(request [nb_request_in]->_num_reg_re ); |
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196 | in_WRITE_QUEUE_IN_DATA_RE ->write(request [nb_request_in]->_data_re ); |
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197 | in_WRITE_QUEUE_IN_EXCEPTION ->write(request [nb_request_in]->_exception ); |
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198 | in_WRITE_QUEUE_IN_NO_SEQUENCE ->write(request [nb_request_in]->_no_sequence ); |
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199 | in_WRITE_QUEUE_IN_ADDRESS ->write(request [nb_request_in]->_address ); |
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200 | } |
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201 | in_WRITE_QUEUE_OUT_ACK ->write((rand()%100)<percent_transaction_write_queue_out); |
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202 | in_GPR_WRITE_ACK [0] ->write((rand()%100)<percent_transaction_gpr); |
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203 | in_SPR_WRITE_ACK [0] ->write((rand()%100)<percent_transaction_spr); |
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204 | |
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205 | SC_CYCLE(0); |
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206 | |
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207 | // ====================================================================== |
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208 | // ====================================================================== |
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209 | // ====================================================================== |
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210 | if (out_GPR_WRITE_VAL [0]->read() and |
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211 | in_GPR_WRITE_ACK [0]->read()) |
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212 | { |
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213 | Tcontext_t ooo_engine_id = (_param->_have_port_ooo_engine_id)?out_GPR_WRITE_OOO_ENGINE_ID[0]->read():0; |
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214 | Tgeneral_address_t num_reg = out_GPR_WRITE_NUM_REG [0]->read(); |
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215 | Tgeneral_data_t data = out_GPR_WRITE_DATA [0]->read(); |
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216 | |
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217 | LABEL(" * Accepted GPR_WRITE in register [%d][%d]", ooo_engine_id,num_reg); |
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218 | |
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219 | TEST(bool , gpr_val [ooo_engine_id][num_reg], 0); |
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220 | TEST(bool , gpr_use [ooo_engine_id][num_reg], 1); |
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221 | TEST(Tgeneral_data_t, gpr [ooo_engine_id][num_reg], data); |
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222 | |
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223 | gpr_val [ooo_engine_id][num_reg] = 1; |
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224 | } |
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225 | |
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226 | // ====================================================================== |
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227 | // ====================================================================== |
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228 | // ====================================================================== |
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229 | if (out_SPR_WRITE_VAL [0]->read() and |
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230 | in_SPR_WRITE_ACK [0]->read()) |
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231 | { |
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232 | Tcontext_t ooo_engine_id = (_param->_have_port_ooo_engine_id)?out_SPR_WRITE_OOO_ENGINE_ID[0]->read():0; |
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233 | Tspecial_address_t num_reg = out_SPR_WRITE_NUM_REG [0]->read(); |
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234 | Tspecial_data_t data = out_SPR_WRITE_DATA [0]->read(); |
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235 | |
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236 | LABEL(" * Accepted SPR_WRITE in register [%d][%d]", ooo_engine_id,num_reg); |
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237 | |
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238 | TEST(bool , spr_val [ooo_engine_id][num_reg], 0); |
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239 | TEST(bool , spr_use [ooo_engine_id][num_reg], 1); |
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240 | TEST(Tgeneral_data_t, spr [ooo_engine_id][num_reg], data); |
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241 | |
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242 | spr_val [ooo_engine_id][num_reg] = 1; |
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243 | } |
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244 | |
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245 | // ====================================================================== |
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246 | // ====================================================================== |
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247 | // ====================================================================== |
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248 | for (uint32_t i=0; i<_param->_nb_bypass_write; i++) |
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249 | { |
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250 | Tcontext_t ooo_engine_id = (_param->_have_port_ooo_engine_id)?out_BYPASS_WRITE_OOO_ENGINE_ID[i]->read():0; |
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251 | |
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252 | if (out_BYPASS_WRITE_GPR_VAL [i]->read()) |
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253 | { |
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254 | Tgeneral_address_t num_reg = out_BYPASS_WRITE_GPR_NUM_REG [i]->read(); // RD |
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255 | Tgeneral_data_t data = out_BYPASS_WRITE_GPR_DATA [i]->read(); |
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256 | |
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257 | LABEL(" * Accepted BYPASS_WRITE in register [%d][%d] (GPR)", ooo_engine_id,num_reg); |
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258 | |
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259 | |
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260 | TEST(bool , gpr_use [ooo_engine_id][num_reg], 1); |
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261 | TEST(Tgeneral_data_t, gpr [ooo_engine_id][num_reg], data); |
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262 | } |
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263 | if (out_BYPASS_WRITE_SPR_VAL [i]->read()) |
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264 | { |
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265 | Tspecial_address_t num_reg = out_BYPASS_WRITE_SPR_NUM_REG [i]->read(); // RE |
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266 | Tspecial_data_t data = out_BYPASS_WRITE_SPR_DATA [i]->read(); |
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267 | |
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268 | LABEL(" * Accepted BYPASS_WRITE in register [%d][%d] (SPR)", ooo_engine_id,num_reg); |
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269 | |
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270 | TEST(bool , spr_use [ooo_engine_id][num_reg], 1); |
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271 | TEST(Tspecial_data_t, spr [ooo_engine_id][num_reg], data); |
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272 | } |
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273 | } |
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274 | |
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275 | // ====================================================================== |
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276 | // ====================================================================== |
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277 | // ====================================================================== |
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278 | if ( in_WRITE_QUEUE_IN_VAL->read() and |
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279 | out_WRITE_QUEUE_IN_ACK->read()) |
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280 | { |
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281 | LABEL(" * Accepted WRITE_QUEUE_IN [%d]",nb_request_in); |
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282 | // std::cout << *request [nb_request_in] << std::endl; |
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283 | |
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284 | if (request [nb_request_in]->_write_rd) |
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285 | { |
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286 | gpr_val [request [nb_request_in]->_ooo_engine_id][request [nb_request_in]->_num_reg_rd] = 0; |
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287 | gpr_use [request [nb_request_in]->_ooo_engine_id][request [nb_request_in]->_num_reg_rd] = 1; |
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288 | gpr [request [nb_request_in]->_ooo_engine_id][request [nb_request_in]->_num_reg_rd] = request [nb_request_in]->_data_rd; |
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289 | } |
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290 | if (request [nb_request_in]->_write_re) |
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291 | { |
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292 | spr_val [request [nb_request_in]->_ooo_engine_id][request [nb_request_in]->_num_reg_re] = 0; |
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293 | spr_use [request [nb_request_in]->_ooo_engine_id][request [nb_request_in]->_num_reg_re] = 1; |
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294 | spr [request [nb_request_in]->_ooo_engine_id][request [nb_request_in]->_num_reg_re] = request [nb_request_in]->_data_re; |
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295 | } |
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296 | nb_request_in ++; |
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297 | } |
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298 | |
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299 | // ====================================================================== |
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300 | // ====================================================================== |
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301 | // ====================================================================== |
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302 | if (out_WRITE_QUEUE_OUT_VAL->read() and |
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303 | in_WRITE_QUEUE_OUT_ACK->read()) |
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304 | { |
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305 | Tcontext_t packet; |
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306 | if (_param->_have_port_rob_ptr) |
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307 | packet = out_WRITE_QUEUE_OUT_PACKET_ID->read(); |
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308 | else |
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309 | packet = 0; |
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310 | |
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311 | LABEL(" * Accepted WRITE_QUEUE_OUT [%d]",packet); |
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312 | // std::cout << *request [packet] << std::endl; |
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313 | |
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314 | if (request [packet]->_write_rd) |
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315 | { |
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316 | TEST(bool, gpr_val [request [packet]->_ooo_engine_id][request [packet]->_num_reg_rd], 1); |
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317 | TEST(bool, gpr_use [request [packet]->_ooo_engine_id][request [packet]->_num_reg_rd], 1); |
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318 | gpr_use [request [packet]->_ooo_engine_id][request [packet]->_num_reg_rd] = 0; |
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319 | } |
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320 | if (request [packet]->_write_re) |
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321 | { |
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322 | TEST(bool, spr_val [request [packet]->_ooo_engine_id][request [packet]->_num_reg_re], 1); |
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323 | TEST(bool, spr_use [request [packet]->_ooo_engine_id][request [packet]->_num_reg_re], 1); |
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324 | spr_use [request [packet]->_ooo_engine_id][request [packet]->_num_reg_re] = 0; |
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325 | } |
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326 | |
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327 | if (_param->_have_port_context_id) |
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328 | TEST(Tcontext_t , out_WRITE_QUEUE_OUT_CONTEXT_ID ->read(), request [packet]->_context_id ); |
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329 | if (_param->_have_port_front_end_id) |
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330 | TEST(Tcontext_t , out_WRITE_QUEUE_OUT_FRONT_END_ID ->read(), request [packet]->_front_end_id ); |
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331 | if (_param->_have_port_ooo_engine_id) |
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332 | TEST(Tcontext_t , out_WRITE_QUEUE_OUT_OOO_ENGINE_ID->read(), request [packet]->_ooo_engine_id); |
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333 | |
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334 | //TEST(Toperation_t , out_WRITE_QUEUE_OUT_OPERATION ->read(), request [packet]->_operation ); |
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335 | //TEST(Ttype_t , out_WRITE_QUEUE_OUT_TYPE ->read(), request [packet]->_type ); |
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336 | TEST(Tcontrol_t , out_WRITE_QUEUE_OUT_FLAGS ->read(), request [packet]->_data_re ); |
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337 | TEST(Texception_t , out_WRITE_QUEUE_OUT_EXCEPTION ->read(), request [packet]->_exception ); |
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338 | TEST(Tcontrol_t , out_WRITE_QUEUE_OUT_NO_SEQUENCE ->read(), request [packet]->_no_sequence ); |
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339 | TEST(Tgeneral_data_t, out_WRITE_QUEUE_OUT_ADDRESS ->read(), request [packet]->_address ); |
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340 | TEST(Tgeneral_data_t, out_WRITE_QUEUE_OUT_DATA ->read(), request [packet]->_data_rd ); |
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341 | |
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342 | nb_request_out ++; |
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343 | } |
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344 | |
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345 | SC_CYCLE(1); |
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346 | } |
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347 | |
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348 | for (uint32_t i=0; i<_param->_nb_packet; i++) |
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349 | delete request [i]; |
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350 | |
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351 | } |
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352 | |
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353 | /******************************************************** |
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354 | * Simulation - End |
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355 | ********************************************************/ |
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356 | |
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357 | TEST_OK (""); |
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358 | |
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359 | sc_stop(); |
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360 | delete _time; |
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361 | |
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362 | msgInformation(_("<%s> : ............ Stop Simulation\n"),name.c_str()); |
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363 | } |
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364 | #endif |
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365 | } |
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