source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_allocation.cpp @ 136

Last change on this file since 136 was 136, checked in by rosiere, 15 years ago

1) Add new algo in ifetch queue
2) Add Cancel bit
3) new config
  • Property svn:keywords set to Id
File size: 9.2 KB
Line 
1/*
2 * $Id: Write_queue_allocation.cpp 136 2009-10-20 18:52:15Z rosiere $
3 *
4 * [ Description ]
5 *
6 */
7
8#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h"
9#include "Behavioural/include/Allocation.h"
10
11namespace morpheo                    {
12namespace behavioural {
13namespace core {
14namespace multi_execute_loop {
15namespace execute_loop {
16namespace multi_write_unit {
17namespace write_unit {
18namespace write_queue {
19
20
21#undef  FUNCTION
22#define FUNCTION "Write_queue::allocation"
23  void Write_queue::allocation (void)
24  {
25    log_printf(FUNC,Write_queue,FUNCTION,"Begin");
26
27    _component   = new Component (_usage);
28
29    Entity * entity = _component->set_entity (_name       
30                                              ,_param->_type
31#ifdef POSITION
32                                              ,COMBINATORY
33#endif
34                                              );
35
36    _interfaces = entity->set_interfaces();
37
38    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
39
40      Interface * interface = _interfaces->set_interface(""
41#ifdef POSITION
42                                                         ,IN
43                                                         ,SOUTH,
44                                                         "Generalist interface"
45#endif
46                                                         );
47
48     in_CLOCK        = interface->set_signal_clk              ("clock" ,1, CLOCK_VHDL_YES);
49     in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
50
51    // -----[ Interface "Write_queue_in" ]--------------------------------   
52     {
53       ALLOC0_INTERFACE_BEGIN ("write_queue_in", IN, WEST, "Input of write_queue");
54       
55       ALLOC0_VALACK_IN ( in_WRITE_QUEUE_IN_VAL,VAL);
56       ALLOC0_VALACK_OUT(out_WRITE_QUEUE_IN_ACK,ACK);
57       ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_CONTEXT_ID   ,"context_id"   ,Tcontext_t        ,_param->_size_context_id       );
58       ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t        ,_param->_size_front_end_id     );
59       ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id    );
60       ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_PACKET_ID    ,"packet_id"    ,Tpacket_t         ,_param->_size_rob_ptr          );
61//     ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_OPERATION    ,"operation"    ,Toperation_t      ,_param->_size_operation        );
62//     ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_TYPE         ,"type"         ,Ttype_t           ,_param->_size_type             );
63       ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_CANCEL       ,"cancel"       ,Tcontrol_t        ,1                              );
64       ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_WRITE_RD     ,"write_rd"     ,Tcontrol_t        ,1                              );
65       ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_NUM_REG_RD   ,"num_reg_rd"   ,Tgeneral_address_t,_param->_size_general_register );
66       ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_DATA_RD      ,"data_rd"      ,Tgeneral_data_t   ,_param->_size_general_data     );
67       ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_WRITE_RE     ,"write_re"     ,Tcontrol_t        ,1                              );
68       ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_NUM_REG_RE   ,"num_reg_re"   ,Tspecial_address_t,_param->_size_special_register );
69       ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_DATA_RE      ,"data_re"      ,Tspecial_data_t   ,_param->_size_special_data     );
70       ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_EXCEPTION    ,"exception"    ,Texception_t      ,_param->_size_exception        );
71       ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_NO_SEQUENCE  ,"no_sequence"  ,Tcontrol_t        ,1                              );
72       ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_ADDRESS      ,"address"      ,Taddress_t        ,_param->_size_instruction_address);
73
74       ALLOC0_INTERFACE_END();
75     }
76
77    // -----[ Interface "Write_queue_out" ]-------------------------------
78     {
79       ALLOC0_INTERFACE_BEGIN("write_queue_out", OUT, EAST, "Output of write_queue");
80       
81       ALLOC0_VALACK_OUT(out_WRITE_QUEUE_OUT_VAL,VAL);
82       ALLOC0_VALACK_IN ( in_WRITE_QUEUE_OUT_ACK,ACK);
83       ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_CONTEXT_ID   ,"context_id"   ,Tcontext_t     ,_param->_size_context_id   );
84       ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t     ,_param->_size_front_end_id );
85       ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t     ,_param->_size_ooo_engine_id);
86       ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_PACKET_ID    ,"packet_id"    ,Tpacket_t      ,_param->_size_rob_ptr      );
87//     ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_OPERATION    ,"operation"    ,Toperation_t   ,_param->_size_operation    );
88//     ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_TYPE         ,"type"         ,Ttype_t        ,_param->_size_type         );
89       ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_CANCEL       ,"cancel"       ,Tcontrol_t     ,1                          );
90       ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_FLAGS        ,"flags"        ,Tspecial_data_t,_param->_size_special_data );
91       ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_EXCEPTION    ,"exception"    ,Texception_t   ,_param->_size_exception    );
92       ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_NO_SEQUENCE  ,"no_sequence"  ,Tcontrol_t     ,1                          );
93       ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_ADDRESS      ,"address"      ,Taddress_t     ,_param->_size_instruction_address);
94       ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_DATA         ,"data"         ,Tgeneral_data_t,_param->_size_general_data );
95
96       ALLOC0_INTERFACE_END();
97     }
98
99    // -----[ Interface "gpr_write" ]-------------------------------------
100     {
101       ALLOC1_INTERFACE_BEGIN("gpr_write", OUT, SOUTH ,"Output of write_queue", _param->_nb_gpr_write);
102
103       ALLOC1_VALACK_OUT(out_GPR_WRITE_VAL,VAL);
104       ALLOC1_VALACK_IN ( in_GPR_WRITE_ACK,ACK);
105       ALLOC1_SIGNAL_OUT(out_GPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id   );
106       ALLOC1_SIGNAL_OUT(out_GPR_WRITE_NUM_REG      ,"num_reg"      ,Tgeneral_address_t,_param->_size_general_register);
107       ALLOC1_SIGNAL_OUT(out_GPR_WRITE_DATA         ,"data"         ,Tgeneral_data_t   ,_param->_size_general_data    );
108
109       ALLOC1_INTERFACE_END(_param->_nb_gpr_write);
110     }
111
112    // -----[ Interface "spr_write" ]-------------------------------------
113     {
114       ALLOC1_INTERFACE_BEGIN("spr_write", OUT, SOUTH ,"Output of write_queue", _param->_nb_spr_write);
115
116       ALLOC1_VALACK_OUT(out_SPR_WRITE_VAL,VAL);
117       ALLOC1_VALACK_IN ( in_SPR_WRITE_ACK,ACK);
118       ALLOC1_SIGNAL_OUT(out_SPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id   );
119       ALLOC1_SIGNAL_OUT(out_SPR_WRITE_NUM_REG      ,"num_reg"      ,Tspecial_address_t,_param->_size_special_register);
120       ALLOC1_SIGNAL_OUT(out_SPR_WRITE_DATA         ,"data"         ,Tspecial_data_t   ,_param->_size_special_data    );
121
122       ALLOC1_INTERFACE_END(_param->_nb_spr_write);
123     }
124
125    // -----[ Interface "bypass_write" ]----------------------------------
126     {
127       ALLOC1_INTERFACE_BEGIN("bypass_write", OUT, NORTH ,"Output of internal write_queue", _param->_nb_bypass_write);
128       
129       ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id   );
130       ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_GPR_VAL      ,"gpr_val"      ,Tcontrol_t        ,1                             );
131       ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_GPR_NUM_REG  ,"gpr_num_reg"  ,Tgeneral_address_t,_param->_size_general_register);
132       ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_GPR_DATA     ,"gpr_data"     ,Tgeneral_data_t   ,_param->_size_general_data    );
133       ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_SPR_VAL      ,"spr_val"      ,Tcontrol_t        ,1                             );
134       ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_SPR_NUM_REG  ,"spr_num_reg"  ,Tspecial_address_t,_param->_size_special_register);
135       ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_SPR_DATA     ,"spr_data"     ,Tspecial_data_t   ,_param->_size_special_data    );
136
137       ALLOC1_INTERFACE_END(_param->_nb_bypass_write);
138     }
139
140    // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
141
142     _queue = new std::list<write_queue_entry_t *>;
143
144    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
145#ifdef VHDL
146     if (usage_is_set(_usage,USE_VHDL))
147       {
148         _param_queue = new morpheo::behavioural::generic::queue::Parameters
149           (_param->_size_queue,
150            _param->_size_internal_queue,
151            _param->_nb_bypass_write,
152            false,
153            false
154            );
155         
156         std::string queue_name = _name + "_queue";
157         _component_queue = new morpheo::behavioural::generic::queue::Queue
158           (queue_name.c_str()
159#ifdef STATISTICS
160            ,NULL
161#endif
162            ,_param_queue
163            ,USE_VHDL);
164         
165         _component->set_component(_component_queue->_component
166#ifdef POSITION
167                                   , 50, 50, 50, 50
168#endif
169                                   , INSTANCE_LIBRARY
170                                   );
171       }
172#endif
173
174#ifdef POSITION
175     if (usage_is_set(_usage,USE_POSITION))
176       _component->generate_file();
177#endif
178
179    log_printf(FUNC,Write_queue,FUNCTION,"End");
180  };
181
182}; // end namespace write_queue
183}; // end namespace write_unit
184}; // end namespace multi_write_unit
185}; // end namespace execute_loop
186}; // end namespace multi_execute_loop
187}; // end namespace core
188
189}; // end namespace behavioural
190}; // end namespace morpheo             
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