1 | #ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_write_unit_write_unit_Write_unit_h |
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2 | #define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_write_unit_write_unit_Write_unit_h |
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3 | |
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4 | /* |
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5 | * $Id: Write_unit.h 113 2009-04-14 18:39:12Z rosiere $ |
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6 | * |
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7 | * [ Description ] |
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8 | * |
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9 | */ |
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10 | |
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11 | #ifdef SYSTEMC |
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12 | #include "systemc.h" |
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13 | #endif |
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14 | |
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15 | #include <iostream> |
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16 | #include "Common/include/ToString.h" |
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17 | #include "Common/include/Debug.h" |
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18 | #include "Behavioural/include/Types.h" |
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19 | |
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20 | #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h" |
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21 | #ifdef STATISTICS |
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22 | #include "Behavioural/include/Stat.h" |
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23 | #endif |
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24 | #include "Behavioural/include/Component.h" |
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25 | #ifdef VHDL |
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26 | #include "Behavioural/include/Vhdl.h" |
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27 | #endif |
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28 | #include "Behavioural/include/Usage.h" |
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29 | |
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30 | #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h" |
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31 | #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Execute_queue.h" |
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32 | |
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33 | namespace morpheo { |
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34 | namespace behavioural { |
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35 | namespace core { |
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36 | namespace multi_execute_loop { |
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37 | namespace execute_loop { |
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38 | namespace multi_write_unit { |
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39 | namespace write_unit { |
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40 | |
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41 | class Write_unit |
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42 | #if SYSTEMC |
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43 | : public sc_module |
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44 | #endif |
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45 | { |
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46 | // -----[ fields ]---------------------------------------------------- |
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47 | // Parameters |
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48 | protected : const std::string _name; |
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49 | protected : const Parameters * _param; |
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50 | public : Tusage_t _usage; |
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51 | |
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52 | #ifdef STATISTICS |
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53 | public : Stat * _stat; |
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54 | #endif |
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55 | |
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56 | public : Component * _component; |
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57 | private : Interfaces * _interfaces; |
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58 | |
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59 | #ifdef SYSTEMC |
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60 | // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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61 | // Interface |
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62 | public : SC_CLOCK * in_CLOCK ; |
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63 | public : SC_IN (Tcontrol_t) * in_NRESET ; |
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64 | |
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65 | // -----[ Interface "write_unit_in" ]--------------------------------- |
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66 | public : SC_IN (Tcontrol_t ) * in_WRITE_UNIT_IN_VAL ; |
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67 | public : SC_OUT(Tcontrol_t ) * out_WRITE_UNIT_IN_ACK ; |
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68 | public : SC_IN (Tcontext_t ) * in_WRITE_UNIT_IN_CONTEXT_ID ; |
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69 | public : SC_IN (Tcontext_t ) * in_WRITE_UNIT_IN_FRONT_END_ID ; |
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70 | public : SC_IN (Tcontext_t ) * in_WRITE_UNIT_IN_OOO_ENGINE_ID; |
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71 | public : SC_IN (Tpacket_t ) * in_WRITE_UNIT_IN_PACKET_ID ; |
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72 | //public : SC_IN (Toperation_t ) * in_WRITE_UNIT_IN_OPERATION ; |
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73 | //public : SC_IN (Ttype_t ) * in_WRITE_UNIT_IN_TYPE ; |
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74 | public : SC_IN (Tcontrol_t ) * in_WRITE_UNIT_IN_WRITE_RD ; |
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75 | public : SC_IN (Tgeneral_address_t) * in_WRITE_UNIT_IN_NUM_REG_RD ; |
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76 | public : SC_IN (Tgeneral_data_t ) * in_WRITE_UNIT_IN_DATA_RD ; |
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77 | public : SC_IN (Tcontrol_t ) * in_WRITE_UNIT_IN_WRITE_RE ; |
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78 | public : SC_IN (Tspecial_address_t) * in_WRITE_UNIT_IN_NUM_REG_RE ; |
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79 | public : SC_IN (Tspecial_data_t ) * in_WRITE_UNIT_IN_DATA_RE ; |
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80 | public : SC_IN (Texception_t ) * in_WRITE_UNIT_IN_EXCEPTION ; |
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81 | public : SC_IN (Tcontrol_t ) * in_WRITE_UNIT_IN_NO_SEQUENCE ; |
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82 | public : SC_IN (Taddress_t ) * in_WRITE_UNIT_IN_ADDRESS ; |
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83 | |
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84 | // -----[ Interface "write_unit_out" ]-------------------------------- |
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85 | public : SC_OUT(Tcontrol_t ) * out_WRITE_UNIT_OUT_VAL ; |
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86 | public : SC_IN (Tcontrol_t ) * in_WRITE_UNIT_OUT_ACK ; |
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87 | public : SC_OUT(Tcontext_t ) * out_WRITE_UNIT_OUT_CONTEXT_ID ; |
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88 | public : SC_OUT(Tcontext_t ) * out_WRITE_UNIT_OUT_FRONT_END_ID ; |
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89 | public : SC_OUT(Tcontext_t ) * out_WRITE_UNIT_OUT_OOO_ENGINE_ID; |
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90 | public : SC_OUT(Tpacket_t ) * out_WRITE_UNIT_OUT_PACKET_ID ; |
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91 | //public : SC_OUT(Toperation_t ) * out_WRITE_UNIT_OUT_OPERATION ; |
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92 | //public : SC_OUT(Ttype_t ) * out_WRITE_UNIT_OUT_TYPE ; |
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93 | public : SC_OUT(Tspecial_data_t ) * out_WRITE_UNIT_OUT_FLAGS ; |
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94 | public : SC_OUT(Texception_t ) * out_WRITE_UNIT_OUT_EXCEPTION ; |
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95 | public : SC_OUT(Tcontrol_t ) * out_WRITE_UNIT_OUT_NO_SEQUENCE ; |
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96 | public : SC_OUT(Taddress_t ) * out_WRITE_UNIT_OUT_ADDRESS ; |
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97 | public : SC_OUT(Tgeneral_data_t ) * out_WRITE_UNIT_OUT_DATA ; |
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98 | |
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99 | // -----[ Interface "gpr_write" ]------------------------------------- |
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100 | public : SC_OUT(Tcontrol_t ) ** out_GPR_WRITE_VAL ; |
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101 | public : SC_IN (Tcontrol_t ) ** in_GPR_WRITE_ACK ; |
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102 | public : SC_OUT(Tcontext_t ) ** out_GPR_WRITE_OOO_ENGINE_ID ; |
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103 | public : SC_OUT(Tgeneral_address_t) ** out_GPR_WRITE_NUM_REG ; |
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104 | public : SC_OUT(Tgeneral_data_t ) ** out_GPR_WRITE_DATA ; |
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105 | |
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106 | // -----[ Interface "spr_write" ]------------------------------------- |
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107 | public : SC_OUT(Tcontrol_t ) ** out_SPR_WRITE_VAL ; |
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108 | public : SC_IN (Tcontrol_t ) ** in_SPR_WRITE_ACK ; |
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109 | public : SC_OUT(Tcontext_t ) ** out_SPR_WRITE_OOO_ENGINE_ID ; |
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110 | public : SC_OUT(Tspecial_address_t) ** out_SPR_WRITE_NUM_REG ; |
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111 | public : SC_OUT(Tspecial_data_t ) ** out_SPR_WRITE_DATA ; |
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112 | |
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113 | // -----[ Interface "bypass_write" ]---------------------------------- |
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114 | public : SC_OUT(Tcontext_t ) ** out_BYPASS_WRITE_OOO_ENGINE_ID ; |
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115 | public : SC_OUT(Tcontrol_t ) ** out_BYPASS_WRITE_GPR_VAL ; |
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116 | public : SC_OUT(Tgeneral_address_t) ** out_BYPASS_WRITE_GPR_NUM_REG ; // RD |
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117 | public : SC_OUT(Tgeneral_data_t ) ** out_BYPASS_WRITE_GPR_DATA ; |
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118 | public : SC_OUT(Tcontrol_t ) ** out_BYPASS_WRITE_SPR_VAL ; |
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119 | public : SC_OUT(Tspecial_address_t) ** out_BYPASS_WRITE_SPR_NUM_REG ; // RE |
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120 | public : SC_OUT(Tspecial_data_t ) ** out_BYPASS_WRITE_SPR_DATA ; |
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121 | |
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122 | // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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123 | |
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124 | private : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue ::Write_queue * component_write_queue ; |
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125 | private : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::execute_queue::Execute_queue * component_execute_queue; |
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126 | |
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127 | // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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128 | |
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129 | // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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130 | #endif |
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131 | |
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132 | // -----[ Methods ]--------------------------------------------------- |
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133 | |
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134 | #ifdef SYSTEMC |
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135 | SC_HAS_PROCESS (Write_unit); |
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136 | #endif |
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137 | public : Write_unit |
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138 | ( |
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139 | #ifdef SYSTEMC |
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140 | sc_module_name name, |
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141 | #else |
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142 | std::string name, |
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143 | #endif |
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144 | #ifdef STATISTICS |
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145 | morpheo::behavioural::Parameters_Statistics * param_statistics, |
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146 | #endif |
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147 | Parameters * param, |
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148 | morpheo::behavioural::Tusage_t usage |
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149 | ); |
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150 | public : ~Write_unit (void); |
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151 | |
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152 | private : void allocation ( |
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153 | #ifdef STATISTICS |
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154 | morpheo::behavioural::Parameters_Statistics * param_statistics |
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155 | #else |
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156 | void |
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157 | #endif |
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158 | ); |
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159 | private : void deallocation (void); |
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160 | |
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161 | #ifdef SYSTEMC |
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162 | #if defined(STATISTICS) or defined(VHDL_TESTBENCH) |
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163 | public : void transition (void); |
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164 | #endif |
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165 | #endif |
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166 | #ifdef STATISTICS |
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167 | public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); |
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168 | #endif |
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169 | |
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170 | #if VHDL |
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171 | public : void vhdl (void); |
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172 | #endif |
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173 | |
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174 | #if defined(STATISTICS) or defined(VHDL_TESTBENCH) |
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175 | private : void end_cycle (void); |
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176 | #endif |
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177 | }; |
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178 | |
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179 | }; // end namespace write_unit |
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180 | }; // end namespace multi_write_unit |
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181 | }; // end namespace execute_loop |
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182 | }; // end namespace multi_execute_loop |
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183 | }; // end namespace core |
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184 | |
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185 | }; // end namespace behavioural |
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186 | }; // end namespace morpheo |
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187 | |
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188 | #endif |
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