1 | /* |
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2 | * $Id: test.cpp 97 2008-12-19 15:34:00Z rosiere $ |
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3 | * |
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4 | * [ Description ] |
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5 | * |
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6 | * Test |
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7 | */ |
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8 | |
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9 | #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/SelfTest/include/test.h" |
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10 | #include "Common/include/BitManipulation.h" |
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11 | #include "Behavioural/include/Allocation.h" |
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12 | #include <set> |
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13 | |
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14 | |
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15 | class entry_t |
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16 | { |
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17 | public : Tcontext_t _context_id ; |
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18 | public : Tcontext_t _front_end_id ; |
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19 | public : Tcontext_t _ooo_engine_id ; |
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20 | public : Tpacket_t _packet_id ; |
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21 | //public : Toperation_t _operation ; |
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22 | //public : Ttype_t _type ; |
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23 | public : Tcontrol_t _write_rd ; |
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24 | public : Tgeneral_address_t _num_reg_rd ; |
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25 | public : Tgeneral_data_t _data_rd ; |
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26 | public : Tcontrol_t _write_re ; |
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27 | public : Tspecial_address_t _num_reg_re ; |
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28 | public : Tspecial_data_t _data_re ; |
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29 | public : Texception_t _exception ; |
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30 | public : Tcontrol_t _no_sequence ; |
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31 | public : Tgeneral_data_t _address ; |
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32 | |
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33 | public : entry_t (Tcontext_t context_id , |
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34 | Tcontext_t front_end_id , |
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35 | Tcontext_t ooo_engine_id , |
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36 | Tpacket_t packet_id , |
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37 | // Toperation_t operation , |
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38 | // Ttype_t type , |
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39 | Tcontrol_t write_rd , |
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40 | Tgeneral_address_t num_reg_rd , |
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41 | Tgeneral_data_t data_rd , |
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42 | Tcontrol_t write_re , |
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43 | Tspecial_address_t num_reg_re , |
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44 | Tspecial_data_t data_re , |
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45 | Texception_t exception , |
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46 | Tcontrol_t no_sequence , |
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47 | Tgeneral_data_t address ) |
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48 | { |
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49 | _context_id = context_id ; |
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50 | _front_end_id = front_end_id ; |
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51 | _ooo_engine_id = ooo_engine_id; |
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52 | _packet_id = packet_id ; |
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53 | // _operation = operation ; |
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54 | // _type = type ; |
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55 | _write_rd = write_rd ; |
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56 | _num_reg_rd = num_reg_rd ; |
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57 | _data_rd = data_rd ; |
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58 | _write_re = write_re ; |
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59 | _num_reg_re = num_reg_re ; |
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60 | _data_re = data_re ; |
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61 | _exception = exception ; |
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62 | _no_sequence = no_sequence ; |
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63 | _address = address ; |
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64 | } |
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65 | }; |
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66 | |
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67 | void test (string name, |
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68 | morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::Parameters * _param) |
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69 | { |
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70 | msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); |
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71 | |
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72 | #ifdef STATISTICS |
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73 | morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); |
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74 | #endif |
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75 | |
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76 | Tusage_t _usage = USE_ALL; |
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77 | |
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78 | // _usage = usage_unset(_usage,USE_SYSTEMC ); |
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79 | // _usage = usage_unset(_usage,USE_VHDL ); |
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80 | // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH ); |
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81 | // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT); |
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82 | // _usage = usage_unset(_usage,USE_POSITION ); |
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83 | _usage = usage_unset(_usage,USE_STATISTICS ); |
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84 | // _usage = usage_unset(_usage,USE_INFORMATION ); |
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85 | |
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86 | Execution_unit_to_Write_unit * _Execution_unit_to_Write_unit = new Execution_unit_to_Write_unit |
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87 | (name.c_str(), |
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88 | #ifdef STATISTICS |
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89 | _parameters_statistics, |
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90 | #endif |
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91 | _param, |
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92 | _usage); |
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93 | |
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94 | #ifdef SYSTEMC |
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95 | /********************************************************************* |
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96 | * Déclarations des signaux |
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97 | *********************************************************************/ |
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98 | string rename; |
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99 | |
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100 | sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); |
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101 | sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); |
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102 | |
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103 | ALLOC2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_VAL ," in_EXECUTE_UNIT_OUT_VAL ",Tcontrol_t ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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104 | ALLOC2_SC_SIGNAL(out_EXECUTE_UNIT_OUT_ACK ,"out_EXECUTE_UNIT_OUT_ACK ",Tcontrol_t ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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105 | ALLOC2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_CONTEXT_ID ," in_EXECUTE_UNIT_OUT_CONTEXT_ID ",Tcontext_t ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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106 | ALLOC2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_FRONT_END_ID ," in_EXECUTE_UNIT_OUT_FRONT_END_ID ",Tcontext_t ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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107 | ALLOC2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_OOO_ENGINE_ID," in_EXECUTE_UNIT_OUT_OOO_ENGINE_ID",Tcontext_t ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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108 | ALLOC2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_PACKET_ID ," in_EXECUTE_UNIT_OUT_PACKET_ID ",Tpacket_t ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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109 | //ALLOC2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_OPERATION ," in_EXECUTE_UNIT_OUT_OPERATION ",Toperation_t ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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110 | //ALLOC2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_TYPE ," in_EXECUTE_UNIT_OUT_TYPE ",Ttype_t ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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111 | ALLOC2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_WRITE_RD ," in_EXECUTE_UNIT_OUT_WRITE_RD ",Tcontrol_t ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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112 | ALLOC2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_NUM_REG_RD ," in_EXECUTE_UNIT_OUT_NUM_REG_RD ",Tgeneral_address_t,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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113 | ALLOC2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_DATA_RD ," in_EXECUTE_UNIT_OUT_DATA_RD ",Tgeneral_data_t ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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114 | ALLOC2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_WRITE_RE ," in_EXECUTE_UNIT_OUT_WRITE_RE ",Tcontrol_t ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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115 | ALLOC2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_NUM_REG_RE ," in_EXECUTE_UNIT_OUT_NUM_REG_RE ",Tspecial_address_t,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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116 | ALLOC2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_DATA_RE ," in_EXECUTE_UNIT_OUT_DATA_RE ",Tspecial_data_t ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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117 | ALLOC2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_EXCEPTION ," in_EXECUTE_UNIT_OUT_EXCEPTION ",Texception_t ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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118 | ALLOC2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_NO_SEQUENCE ," in_EXECUTE_UNIT_OUT_NO_SEQUENCE ",Tcontrol_t ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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119 | ALLOC2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_ADDRESS ," in_EXECUTE_UNIT_OUT_ADDRESS ",Taddress_t ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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120 | |
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121 | ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_VAL ,"out_WRITE_UNIT_IN_VAL ",Tcontrol_t ,_param->_nb_write_unit ); |
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122 | ALLOC1_SC_SIGNAL( in_WRITE_UNIT_IN_ACK ," in_WRITE_UNIT_IN_ACK ",Tcontrol_t ,_param->_nb_write_unit ); |
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123 | ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_CONTEXT_ID ,"out_WRITE_UNIT_IN_CONTEXT_ID ",Tcontext_t ,_param->_nb_write_unit ); |
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124 | ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_FRONT_END_ID ,"out_WRITE_UNIT_IN_FRONT_END_ID ",Tcontext_t ,_param->_nb_write_unit ); |
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125 | ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_OOO_ENGINE_ID ,"out_WRITE_UNIT_IN_OOO_ENGINE_ID ",Tcontext_t ,_param->_nb_write_unit ); |
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126 | ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_PACKET_ID ,"out_WRITE_UNIT_IN_PACKET_ID ",Tpacket_t ,_param->_nb_write_unit ); |
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127 | //ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_OPERATION ,"out_WRITE_UNIT_IN_OPERATION ",Toperation_t ,_param->_nb_write_unit ); |
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128 | //ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_TYPE ,"out_WRITE_UNIT_IN_TYPE ",Ttype_t ,_param->_nb_write_unit ); |
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129 | ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_WRITE_RD ,"out_WRITE_UNIT_IN_WRITE_RD ",Tcontrol_t ,_param->_nb_write_unit ); |
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130 | ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_NUM_REG_RD ,"out_WRITE_UNIT_IN_NUM_REG_RD ",Tgeneral_address_t,_param->_nb_write_unit ); |
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131 | ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_DATA_RD ,"out_WRITE_UNIT_IN_DATA_RD ",Tgeneral_data_t ,_param->_nb_write_unit ); |
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132 | ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_WRITE_RE ,"out_WRITE_UNIT_IN_WRITE_RE ",Tcontrol_t ,_param->_nb_write_unit ); |
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133 | ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_NUM_REG_RE ,"out_WRITE_UNIT_IN_NUM_REG_RE ",Tspecial_address_t,_param->_nb_write_unit ); |
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134 | ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_DATA_RE ,"out_WRITE_UNIT_IN_DATA_RE ",Tspecial_data_t ,_param->_nb_write_unit ); |
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135 | ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_EXCEPTION ,"out_WRITE_UNIT_IN_EXCEPTION ",Texception_t ,_param->_nb_write_unit ); |
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136 | ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_NO_SEQUENCE ,"out_WRITE_UNIT_IN_NO_SEQUENCE ",Tcontrol_t ,_param->_nb_write_unit ); |
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137 | ALLOC1_SC_SIGNAL(out_WRITE_UNIT_IN_ADDRESS ,"out_WRITE_UNIT_IN_ADDRESS ",Taddress_t ,_param->_nb_write_unit ); |
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138 | |
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139 | /******************************************************** |
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140 | * Instanciation |
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141 | ********************************************************/ |
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142 | |
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143 | msg(_("<%s> : Instanciation of _Execution_unit_to_Write_unit.\n"),name.c_str()); |
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144 | |
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145 | (*(_Execution_unit_to_Write_unit->in_CLOCK)) (*(in_CLOCK)); |
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146 | (*(_Execution_unit_to_Write_unit->in_NRESET)) (*(in_NRESET)); |
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147 | |
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148 | INSTANCE2_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_VAL ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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149 | INSTANCE2_SC_SIGNAL(_Execution_unit_to_Write_unit,out_EXECUTE_UNIT_OUT_ACK ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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150 | if (_param->_have_port_context_id) |
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151 | INSTANCE2_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_CONTEXT_ID ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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152 | if (_param->_have_port_front_end_id) |
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153 | INSTANCE2_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_FRONT_END_ID ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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154 | if (_param->_have_port_ooo_engine_id) |
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155 | INSTANCE2_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_OOO_ENGINE_ID,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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156 | if (_param->_have_port_rob_ptr ) |
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157 | INSTANCE2_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_PACKET_ID ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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158 | //INSTANCE2_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_OPERATION ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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159 | //INSTANCE2_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_TYPE ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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160 | INSTANCE2_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_WRITE_RD ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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161 | INSTANCE2_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_NUM_REG_RD ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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162 | INSTANCE2_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_DATA_RD ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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163 | INSTANCE2_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_WRITE_RE ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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164 | INSTANCE2_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_NUM_REG_RE ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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165 | INSTANCE2_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_DATA_RE ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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166 | INSTANCE2_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_EXCEPTION ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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167 | INSTANCE2_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_NO_SEQUENCE ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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168 | INSTANCE2_SC_SIGNAL(_Execution_unit_to_Write_unit, in_EXECUTE_UNIT_OUT_ADDRESS ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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169 | |
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170 | INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_VAL ,_param->_nb_write_unit ); |
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171 | INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit, in_WRITE_UNIT_IN_ACK ,_param->_nb_write_unit ); |
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172 | if (_param->_have_port_context_id) |
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173 | INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_CONTEXT_ID ,_param->_nb_write_unit ); |
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174 | if (_param->_have_port_front_end_id) |
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175 | INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_FRONT_END_ID ,_param->_nb_write_unit ); |
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176 | if (_param->_have_port_ooo_engine_id) |
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177 | INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_OOO_ENGINE_ID ,_param->_nb_write_unit ); |
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178 | if (_param->_have_port_rob_ptr ) |
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179 | INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_PACKET_ID ,_param->_nb_write_unit ); |
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180 | //INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_OPERATION ,_param->_nb_write_unit ); |
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181 | //INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_TYPE ,_param->_nb_write_unit ); |
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182 | INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_WRITE_RD ,_param->_nb_write_unit ); |
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183 | INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_NUM_REG_RD ,_param->_nb_write_unit ); |
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184 | INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_DATA_RD ,_param->_nb_write_unit ); |
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185 | INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_WRITE_RE ,_param->_nb_write_unit ); |
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186 | INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_NUM_REG_RE ,_param->_nb_write_unit ); |
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187 | INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_DATA_RE ,_param->_nb_write_unit ); |
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188 | INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_EXCEPTION ,_param->_nb_write_unit ); |
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189 | INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_NO_SEQUENCE ,_param->_nb_write_unit ); |
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190 | INSTANCE1_SC_SIGNAL(_Execution_unit_to_Write_unit,out_WRITE_UNIT_IN_ADDRESS ,_param->_nb_write_unit ); |
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191 | |
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192 | msg(_("<%s> : Start Simulation ............\n"),name.c_str()); |
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193 | |
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194 | Time * _time = new Time(); |
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195 | |
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196 | /******************************************************** |
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197 | * Simulation - Begin |
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198 | ********************************************************/ |
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199 | |
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200 | // Initialisation |
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201 | |
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202 | const uint32_t seed = 0; |
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203 | // const uint32_t seed = static_cast<uint32_t>(time(NULL)); |
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204 | |
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205 | srand(seed); |
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206 | |
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207 | const int32_t percent_transaction_in = 75; |
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208 | const int32_t percent_transaction_out = 75; |
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209 | |
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210 | set<Tcontext_t> execute_unit_thread [_param->_nb_execute_unit][_param->_max_nb_execute_unit_port]; |
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211 | |
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212 | for (uint32_t i=0; i<_param->_nb_execute_unit; i++) |
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213 | for (uint32_t ii=0; ii<_param->_nb_execute_unit_port[i]; ii++) |
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214 | for (uint32_t j=0; j<_param->_nb_write_unit; j++) |
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215 | if (_param->_table_routing[i][ii][j]) |
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216 | for (uint32_t k=0; k<_param->_nb_thread; k++) |
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217 | if (_param->_table_thread[j][k]) |
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218 | { |
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219 | execute_unit_thread [i][ii].insert(k); |
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220 | } |
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221 | |
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222 | SC_START(0); |
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223 | LABEL("Initialisation"); |
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224 | |
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225 | LABEL("Reset"); |
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226 | in_NRESET->write(0); |
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227 | SC_START(5); |
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228 | in_NRESET->write(1); |
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229 | |
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230 | LABEL("Loop of Test"); |
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231 | |
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232 | for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) |
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233 | { |
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234 | LABEL("Iteration %d",iteration); |
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235 | |
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236 | list<entry_t> request [_param->_nb_execute_unit][_param->_max_nb_execute_unit_port]; |
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237 | |
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238 | uint32_t nb_request_in; |
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239 | for (nb_request_in=0; nb_request_in < _param->_nb_packet; ) |
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240 | for (uint32_t i=0; i<_param->_nb_execute_unit; i++) |
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241 | for (uint32_t j=0; j<_param->_nb_execute_unit_port[i]; j++) |
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242 | { |
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243 | if (nb_request_in >= _param->_nb_packet) |
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244 | break; |
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245 | |
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246 | Tcontext_t context_id ; |
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247 | Tcontext_t front_end_id ; |
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248 | Tcontext_t ooo_engine_id; |
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249 | Tcontext_t num_thread ; |
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250 | |
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251 | // Find compatible thread |
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252 | do |
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253 | { |
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254 | context_id = range<Tcontext_t> (rand(), _param->_size_context_id ); |
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255 | front_end_id = range<Tcontext_t> (rand(), _param->_size_front_end_id ); |
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256 | ooo_engine_id = range<Tcontext_t> (rand(), _param->_size_ooo_engine_id); |
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257 | num_thread = get_num_thread (context_id , _param->_size_context_id , |
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258 | front_end_id , _param->_size_front_end_id , |
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259 | ooo_engine_id, _param->_size_ooo_engine_id); |
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260 | } |
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261 | while (execute_unit_thread[i][j].find(num_thread) == execute_unit_thread[i][j].end()); |
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262 | |
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263 | request[i][j].push_back(entry_t (context_id , |
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264 | front_end_id , |
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265 | ooo_engine_id, |
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266 | nb_request_in, |
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267 | // range<Toperation_t > (rand(), _param->_size_operation ), |
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268 | // range<Ttype_t > (rand(), _param->_size_type ), |
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269 | range<Tcontrol_t > (rand(), 2 ), |
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270 | range<Tgeneral_address_t> (rand(), _param->_size_general_register), |
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271 | range<Tgeneral_data_t > (rand(), _param->_size_general_data ), |
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272 | range<Tcontrol_t > (rand(), 2 ), |
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273 | range<Tspecial_address_t> (rand(), _param->_size_special_register), |
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274 | range<Tspecial_data_t > (rand(), _param->_size_special_data ), |
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275 | range<Texception_t > (rand(), _param->_size_exception ), |
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276 | range<Tcontrol_t > (rand(), 2 ), |
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277 | range<Tgeneral_data_t > (rand(), _param->_size_general_data ) |
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278 | )); |
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279 | |
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280 | nb_request_in++; |
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281 | } |
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282 | |
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283 | uint32_t nb_request_out = 0; |
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284 | |
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285 | while (nb_request_out < nb_request_in) |
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286 | { |
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287 | for (uint32_t i=0; i<_param->_nb_execute_unit; i++) |
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288 | for (uint32_t j=0; j<_param->_nb_execute_unit_port[i]; j++) |
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289 | { |
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290 | bool val = not request[i][j].empty() and ((rand()%100) < percent_transaction_in); |
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291 | |
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292 | in_EXECUTE_UNIT_OUT_VAL [i][j]->write(val); |
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293 | |
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294 | if (val) |
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295 | { |
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296 | in_EXECUTE_UNIT_OUT_CONTEXT_ID [i][j] ->write(request[i][j].front()._context_id ); |
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297 | in_EXECUTE_UNIT_OUT_FRONT_END_ID [i][j] ->write(request[i][j].front()._front_end_id ); |
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298 | in_EXECUTE_UNIT_OUT_OOO_ENGINE_ID [i][j] ->write(request[i][j].front()._ooo_engine_id ); |
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299 | in_EXECUTE_UNIT_OUT_PACKET_ID [i][j] ->write(request[i][j].front()._packet_id ); |
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300 | // in_EXECUTE_UNIT_OUT_OPERATION [i][j] ->write(request[i][j].front()._operation ); |
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301 | // in_EXECUTE_UNIT_OUT_TYPE [i][j] ->write(request[i][j].front()._type ); |
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302 | in_EXECUTE_UNIT_OUT_WRITE_RD [i][j] ->write(request[i][j].front()._write_rd ); |
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303 | in_EXECUTE_UNIT_OUT_NUM_REG_RD [i][j] ->write(request[i][j].front()._num_reg_rd ); |
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304 | in_EXECUTE_UNIT_OUT_DATA_RD [i][j] ->write(request[i][j].front()._data_rd ); |
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305 | in_EXECUTE_UNIT_OUT_WRITE_RE [i][j] ->write(request[i][j].front()._write_re ); |
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306 | in_EXECUTE_UNIT_OUT_NUM_REG_RE [i][j] ->write(request[i][j].front()._num_reg_re ); |
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307 | in_EXECUTE_UNIT_OUT_DATA_RE [i][j] ->write(request[i][j].front()._data_re ); |
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308 | in_EXECUTE_UNIT_OUT_EXCEPTION [i][j] ->write(request[i][j].front()._exception ); |
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309 | in_EXECUTE_UNIT_OUT_NO_SEQUENCE [i][j] ->write(request[i][j].front()._no_sequence ); |
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310 | in_EXECUTE_UNIT_OUT_ADDRESS [i][j] ->write(request[i][j].front()._address ); |
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311 | } |
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312 | } |
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313 | |
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314 | for (uint32_t i=0; i<_param->_nb_write_unit; i++) |
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315 | in_WRITE_UNIT_IN_ACK [i]->write((rand()%100) < percent_transaction_out); |
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316 | |
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317 | SC_START(0); |
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318 | |
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319 | for (uint32_t i=0; i<_param->_nb_execute_unit; i++) |
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320 | for (uint32_t j=0; j<_param->_nb_execute_unit_port[i]; j++) |
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321 | if (in_EXECUTE_UNIT_OUT_VAL [i][j]->read() and out_EXECUTE_UNIT_OUT_ACK [i][j]->read()) |
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322 | { |
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323 | LABEL("EXECUTE_UNIT_OUT [%d][%d] - Transaction accepted",i,j); |
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324 | } |
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325 | |
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326 | for (uint32_t i=0; i<_param->_nb_write_unit; i++) |
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327 | if (out_WRITE_UNIT_IN_VAL [i]->read() and in_WRITE_UNIT_IN_ACK [i]->read()) |
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328 | { |
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329 | LABEL("WRITE_UNIT_IN [%d] - Transaction accepted (%d)",i,nb_request_out); |
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330 | nb_request_out ++; |
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331 | |
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332 | Tpacket_t packet = (_param->_have_port_rob_ptr )?out_WRITE_UNIT_IN_PACKET_ID[i]->read():0; |
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333 | LABEL(" * packet : %d",packet); |
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334 | |
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335 | // find execute_unit |
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336 | uint32_t x = 0; |
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337 | uint32_t y = 0; |
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338 | bool find = false; |
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339 | for (x=0; x<_param->_nb_execute_unit; x++) |
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340 | { |
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341 | for (y=0; y<_param->_nb_execute_unit_port[x]; y++) |
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342 | if (packet == ((_param->_have_port_rob_ptr )?request[x][y].front()._packet_id:0)) |
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343 | { |
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344 | find = true; |
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345 | break; |
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346 | } |
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347 | if (find) |
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348 | break; |
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349 | } |
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350 | |
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351 | LABEL(" * execute_unit source : %d",x); |
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352 | LABEL(" * execute_unit port : %d",y); |
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353 | TEST(bool,x<_param->_nb_execute_unit, true); |
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354 | TEST(bool,y<_param->_nb_execute_unit_port[x],true); |
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355 | |
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356 | if (_param->_have_port_rob_ptr ) |
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357 | TEST(Tpacket_t ,packet , request[x][y].front()._packet_id ); |
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358 | |
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359 | // Authorised link ? execute_unit -> write_unit |
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360 | TEST(bool, _param->_table_routing[x][y][i], true); |
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361 | |
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362 | if (_param->_have_port_context_id) |
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363 | TEST(Tcontext_t ,out_WRITE_UNIT_IN_CONTEXT_ID [i]->read(), request[x][y].front()._context_id ); |
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364 | if (_param->_have_port_front_end_id) |
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365 | TEST(Tcontext_t ,out_WRITE_UNIT_IN_FRONT_END_ID [i]->read(), request[x][y].front()._front_end_id ); |
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366 | if (_param->_have_port_ooo_engine_id) |
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367 | TEST(Tcontext_t ,out_WRITE_UNIT_IN_OOO_ENGINE_ID [i]->read(), request[x][y].front()._ooo_engine_id ); |
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368 | // TEST(Toperation_t ,out_WRITE_UNIT_IN_OPERATION [i]->read(), request[x][y].front()._operation ); |
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369 | // TEST(Ttype_t ,out_WRITE_UNIT_IN_TYPE [i]->read(), request[x][y].front()._type ); |
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370 | TEST(Tcontrol_t ,out_WRITE_UNIT_IN_WRITE_RD [i]->read(), request[x][y].front()._write_rd ); |
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371 | TEST(Tgeneral_address_t,out_WRITE_UNIT_IN_NUM_REG_RD [i]->read(), request[x][y].front()._num_reg_rd ); |
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372 | TEST(Tgeneral_data_t ,out_WRITE_UNIT_IN_DATA_RD [i]->read(), request[x][y].front()._data_rd ); |
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373 | TEST(Tcontrol_t ,out_WRITE_UNIT_IN_WRITE_RE [i]->read(), request[x][y].front()._write_re ); |
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374 | TEST(Tspecial_address_t,out_WRITE_UNIT_IN_NUM_REG_RE [i]->read(), request[x][y].front()._num_reg_re ); |
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375 | TEST(Tspecial_data_t ,out_WRITE_UNIT_IN_DATA_RE [i]->read(), request[x][y].front()._data_re ); |
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376 | TEST(Texception_t ,out_WRITE_UNIT_IN_EXCEPTION [i]->read(), request[x][y].front()._exception ); |
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377 | TEST(Tcontrol_t ,out_WRITE_UNIT_IN_NO_SEQUENCE [i]->read(), request[x][y].front()._no_sequence ); |
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378 | TEST(Tgeneral_data_t ,out_WRITE_UNIT_IN_ADDRESS [i]->read(), request[x][y].front()._address ); |
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379 | |
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380 | request[x][y].pop_front(); |
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381 | } |
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382 | SC_START(1); |
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383 | } |
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384 | |
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385 | } |
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386 | |
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387 | /******************************************************** |
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388 | * Simulation - End |
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389 | ********************************************************/ |
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390 | |
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391 | TEST_OK ("End of Simulation"); |
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392 | delete _time; |
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393 | |
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394 | msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); |
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395 | |
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396 | delete in_CLOCK; |
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397 | delete in_NRESET; |
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398 | |
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399 | DELETE2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_VAL ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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400 | DELETE2_SC_SIGNAL(out_EXECUTE_UNIT_OUT_ACK ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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401 | DELETE2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_CONTEXT_ID ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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402 | DELETE2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_FRONT_END_ID ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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403 | DELETE2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_OOO_ENGINE_ID,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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404 | DELETE2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_PACKET_ID ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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405 | //DELETE2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_OPERATION ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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406 | //DELETE2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_TYPE ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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407 | DELETE2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_WRITE_RD ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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408 | DELETE2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_NUM_REG_RD ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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409 | DELETE2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_DATA_RD ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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410 | DELETE2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_WRITE_RE ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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411 | DELETE2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_NUM_REG_RE ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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412 | DELETE2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_DATA_RE ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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413 | DELETE2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_EXCEPTION ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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414 | DELETE2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_NO_SEQUENCE ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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415 | DELETE2_SC_SIGNAL( in_EXECUTE_UNIT_OUT_ADDRESS ,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1]); |
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416 | |
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417 | DELETE1_SC_SIGNAL(out_WRITE_UNIT_IN_VAL ,_param->_nb_write_unit ); |
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418 | DELETE1_SC_SIGNAL( in_WRITE_UNIT_IN_ACK ,_param->_nb_write_unit ); |
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419 | DELETE1_SC_SIGNAL(out_WRITE_UNIT_IN_CONTEXT_ID ,_param->_nb_write_unit ); |
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420 | DELETE1_SC_SIGNAL(out_WRITE_UNIT_IN_FRONT_END_ID ,_param->_nb_write_unit ); |
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421 | DELETE1_SC_SIGNAL(out_WRITE_UNIT_IN_OOO_ENGINE_ID ,_param->_nb_write_unit ); |
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422 | DELETE1_SC_SIGNAL(out_WRITE_UNIT_IN_PACKET_ID ,_param->_nb_write_unit ); |
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423 | //DELETE1_SC_SIGNAL(out_WRITE_UNIT_IN_OPERATION ,_param->_nb_write_unit ); |
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424 | //DELETE1_SC_SIGNAL(out_WRITE_UNIT_IN_TYPE ,_param->_nb_write_unit ); |
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425 | DELETE1_SC_SIGNAL(out_WRITE_UNIT_IN_WRITE_RD ,_param->_nb_write_unit ); |
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426 | DELETE1_SC_SIGNAL(out_WRITE_UNIT_IN_NUM_REG_RD ,_param->_nb_write_unit ); |
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427 | DELETE1_SC_SIGNAL(out_WRITE_UNIT_IN_DATA_RD ,_param->_nb_write_unit ); |
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428 | DELETE1_SC_SIGNAL(out_WRITE_UNIT_IN_WRITE_RE ,_param->_nb_write_unit ); |
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429 | DELETE1_SC_SIGNAL(out_WRITE_UNIT_IN_NUM_REG_RE ,_param->_nb_write_unit ); |
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430 | DELETE1_SC_SIGNAL(out_WRITE_UNIT_IN_DATA_RE ,_param->_nb_write_unit ); |
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431 | DELETE1_SC_SIGNAL(out_WRITE_UNIT_IN_EXCEPTION ,_param->_nb_write_unit ); |
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432 | DELETE1_SC_SIGNAL(out_WRITE_UNIT_IN_NO_SEQUENCE ,_param->_nb_write_unit ); |
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433 | DELETE1_SC_SIGNAL(out_WRITE_UNIT_IN_ADDRESS ,_param->_nb_write_unit ); |
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434 | #endif |
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435 | |
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436 | delete _Execution_unit_to_Write_unit; |
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437 | #ifdef STATISTICS |
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438 | delete _parameters_statistics; |
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439 | #endif |
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440 | } |
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