[77] | 1 | /* |
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| 2 | * $Id: Execution_unit_to_Write_unit_allocation.cpp 97 2008-12-19 15:34:00Z rosiere $ |
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| 3 | * |
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| 4 | * [ Description ] |
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| 5 | * |
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| 6 | */ |
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| 7 | |
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| 8 | #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Execution_unit_to_Write_unit.h" |
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| 9 | #include "Behavioural/include/Allocation.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace core { |
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| 14 | namespace multi_execute_loop { |
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| 15 | namespace execute_loop { |
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| 16 | namespace network { |
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| 17 | namespace execution_unit_to_write_unit { |
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| 18 | |
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| 19 | |
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| 20 | |
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| 21 | #undef FUNCTION |
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| 22 | #define FUNCTION "Execution_unit_to_Write_unit::allocation" |
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| 23 | void Execution_unit_to_Write_unit::allocation ( |
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| 24 | #ifdef STATISTICS |
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| 25 | morpheo::behavioural::Parameters_Statistics * param_statistics |
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| 26 | #else |
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| 27 | void |
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| 28 | #endif |
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| 29 | ) |
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| 30 | { |
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| 31 | log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,"Begin"); |
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| 32 | |
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| 33 | _component = new Component (_usage); |
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| 34 | |
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| 35 | Entity * entity = _component->set_entity (_name |
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| 36 | ,"Execution_unit_to_Write_unit" |
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| 37 | #ifdef POSITION |
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| 38 | ,COMBINATORY |
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| 39 | #endif |
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| 40 | ); |
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| 41 | |
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| 42 | _interfaces = entity->set_interfaces(); |
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| 43 | |
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| 44 | // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 45 | |
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| 46 | Interface * interface = _interfaces->set_interface("" |
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| 47 | #ifdef POSITION |
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| 48 | ,IN |
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| 49 | ,SOUTH, |
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| 50 | "Generalist interface" |
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| 51 | #endif |
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| 52 | ); |
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| 53 | |
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| 54 | in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); |
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| 55 | in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES); |
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| 56 | |
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| 57 | |
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| 58 | // ~~~~~[ Interface "execute_unit_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 59 | { |
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[88] | 60 | ALLOC2_INTERFACE("execute_unit_out", IN, EAST, "Output of execution_unit", _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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[77] | 61 | |
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[88] | 62 | _ALLOC2_VALACK_IN ( in_EXECUTE_UNIT_OUT_VAL,VAL, _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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| 63 | _ALLOC2_VALACK_OUT(out_EXECUTE_UNIT_OUT_ACK,ACK, _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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| 64 | _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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| 65 | _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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| 66 | _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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| 67 | _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_rob_ptr , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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| 68 | //_ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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[97] | 69 | //_ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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[88] | 70 | _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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| 71 | _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register, _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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| 72 | _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_DATA_RD ,"data_rd" ,Tgeneral_data_t ,_param->_size_general_data , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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| 73 | _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_WRITE_RE ,"write_re" ,Tcontrol_t ,1 , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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| 74 | _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_NUM_REG_RE ,"num_reg_re" ,Tspecial_address_t,_param->_size_special_register, _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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| 75 | _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_DATA_RE ,"data_re" ,Tspecial_data_t ,_param->_size_special_data , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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| 76 | _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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| 77 | _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_NO_SEQUENCE ,"no_sequence" ,Tcontrol_t ,1 , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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[97] | 78 | _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address, _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); |
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[77] | 79 | } |
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[88] | 80 | |
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[77] | 81 | // ~~~~~[ Interface "write_unit_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 82 | { |
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| 83 | ALLOC1_INTERFACE("write_unit_in", OUT, WEST, "Input of write_unit", _param->_nb_write_unit); |
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| 84 | |
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[78] | 85 | ALLOC1_VALACK_OUT(out_WRITE_UNIT_IN_VAL,VAL); |
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| 86 | ALLOC1_VALACK_IN ( in_WRITE_UNIT_IN_ACK,ACK); |
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[77] | 87 | ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); |
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| 88 | ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ); |
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| 89 | ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ); |
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[88] | 90 | ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_rob_ptr ); |
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[77] | 91 | //ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); |
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[97] | 92 | //ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); |
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[77] | 93 | ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); |
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| 94 | ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register); |
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| 95 | ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_DATA_RD ,"data_rd" ,Tgeneral_data_t ,_param->_size_general_data ); |
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| 96 | ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ); |
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| 97 | ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_NUM_REG_RE ,"num_reg_re" ,Tspecial_address_t,_param->_size_special_register); |
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| 98 | ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_DATA_RE ,"data_re" ,Tspecial_data_t ,_param->_size_special_data ); |
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| 99 | ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); |
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| 100 | ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_NO_SEQUENCE ,"no_sequence" ,Tcontrol_t ,1 ); |
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[97] | 101 | ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address); |
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[77] | 102 | } |
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| 103 | // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 104 | |
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[88] | 105 | if (usage_is_set(_usage,USE_SYSTEMC)) |
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| 106 | { |
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| 107 | _destination = new std::list<uint32_t> ** [_param->_nb_execute_unit]; |
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[77] | 108 | for (uint32_t i=0; i<_param->_nb_execute_unit; i++) |
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| 109 | { |
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[88] | 110 | _destination [i] = new std::list<uint32_t> * [_param->_nb_execute_unit_port[i]]; |
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| 111 | for (uint32_t j=0; j<_param->_nb_execute_unit_port[i]; j++) |
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| 112 | { |
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| 113 | _destination [i][j] = new std::list<uint32_t> [_param->_nb_thread]; |
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| 114 | } |
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[77] | 115 | } |
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[88] | 116 | } |
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[77] | 117 | |
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| 118 | #ifdef POSITION |
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[88] | 119 | if (usage_is_set(_usage,USE_POSITION)) |
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| 120 | _component->generate_file(); |
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[77] | 121 | #endif |
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| 122 | |
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| 123 | log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,"End"); |
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| 124 | }; |
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| 125 | |
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| 126 | }; // end namespace execution_unit_to_write_unit |
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| 127 | }; // end namespace network |
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| 128 | }; // end namespace execute_loop |
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| 129 | }; // end namespace multi_execute_loop |
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| 130 | }; // end namespace core |
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| 131 | |
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| 132 | }; // end namespace behavioural |
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| 133 | }; // end namespace morpheo |
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