1 | #ifdef SYSTEMC |
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2 | //#if defined(STATISTICS) or defined(VHDL_TESTBENCH) |
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3 | /* |
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4 | * $Id: Register_unit_Glue_genMealy_spr_write.cpp 88 2008-12-10 18:31:39Z rosiere $ |
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5 | * |
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6 | * [ Description ] |
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7 | * |
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8 | */ |
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9 | |
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10 | #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/include/Register_unit_Glue.h" |
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11 | |
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12 | namespace morpheo { |
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13 | namespace behavioural { |
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14 | namespace core { |
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15 | namespace multi_execute_loop { |
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16 | namespace execute_loop { |
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17 | namespace register_unit { |
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18 | namespace register_unit_glue { |
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19 | |
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20 | |
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21 | #undef FUNCTION |
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22 | #define FUNCTION "Register_unit_Glue::genMealy_spr_write" |
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23 | void Register_unit_Glue::genMealy_spr_write (void) |
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24 | { |
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25 | log_begin(Register_unit_Glue,FUNCTION); |
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26 | log_function(Register_unit_Glue,FUNCTION,_name.c_str()); |
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27 | |
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28 | // if (not PORT_READ(in_NRESET)) |
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29 | // { |
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30 | // for (uint32_t j=0; j<_param->_nb_spr_write; j++) |
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31 | // for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
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32 | // PORT_WRITE(out_SPR_WRITE_ACK [j], 0); |
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33 | // } |
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34 | // else |
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35 | { |
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36 | for (uint32_t j=0; j<_param->_nb_spr_write; j++) |
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37 | { |
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38 | Tcontext_t ooo_engine_id = (_param->_have_port_ooo_engine_id == true)?PORT_READ(in_SPR_WRITE_OOO_ENGINE_ID[j]):0; |
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39 | Tcontrol_t registerfile_ack = PORT_READ(in_SPR_WRITE_REGISTERFILE_ACK [ooo_engine_id][j]); |
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40 | Tcontrol_t status_ack = PORT_READ(in_SPR_WRITE_STATUS_ACK [ooo_engine_id][j]); |
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41 | |
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42 | // multiplexor |
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43 | PORT_WRITE(out_SPR_WRITE_ACK [j],registerfile_ack and status_ack); |
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44 | } |
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45 | } |
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46 | |
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47 | log_end(Register_unit_Glue,FUNCTION); |
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48 | }; |
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49 | |
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50 | }; // end namespace register_unit_glue |
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51 | }; // end namespace register_unit |
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52 | }; // end namespace execute_loop |
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53 | }; // end namespace multi_execute_loop |
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54 | }; // end namespace core |
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55 | |
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56 | }; // end namespace behavioural |
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57 | }; // end namespace morpheo |
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58 | #endif |
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59 | //#endif |
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