[60] | 1 | /* |
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| 2 | * $Id: test.cpp 128 2009-06-26 08:43:23Z rosiere $ |
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| 3 | * |
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| 4 | * [ Description ] |
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| 5 | * |
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| 6 | * Test |
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| 7 | */ |
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| 8 | |
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| 9 | #define NB_ITERATION 1 |
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[64] | 10 | #define CYCLE_MAX (10240*NB_ITERATION) |
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[60] | 11 | |
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[82] | 12 | #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest/include/test.h" |
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| 13 | #include "Common/include/Test.h" |
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[60] | 14 | |
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| 15 | void test (string name, |
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| 16 | morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::Parameters * _param) |
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| 17 | { |
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| 18 | cout << "<" << name << "> : Simulation SystemC" << endl; |
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| 19 | |
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| 20 | #ifdef STATISTICS |
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| 21 | morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); |
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| 22 | #endif |
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| 23 | |
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[128] | 24 | _model.set_model(NAME_Register_unit ,MODEL_SYSTEMC, true); |
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| 25 | _model.set_model(NAME_RegisterFile ,MODEL_SYSTEMC, true); |
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| 26 | _model.set_model(NAME_RegisterFile_Monolithic ,MODEL_SYSTEMC, true); |
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| 27 | _model.set_model(NAME_RegisterFile_Multi_Banked,MODEL_SYSTEMC, true); |
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| 28 | _model.set_model(NAME_Register_unit_Glue ,MODEL_SYSTEMC, true); |
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| 29 | |
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[88] | 30 | Tusage_t _usage = USE_ALL; |
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| 31 | |
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| 32 | // _usage = usage_unset(_usage,USE_SYSTEMC ); |
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| 33 | // _usage = usage_unset(_usage,USE_VHDL ); |
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| 34 | // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH ); |
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| 35 | // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT); |
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| 36 | // _usage = usage_unset(_usage,USE_POSITION ); |
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| 37 | // _usage = usage_unset(_usage,USE_STATISTICS ); |
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| 38 | // _usage = usage_unset(_usage,USE_INFORMATION ); |
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| 39 | |
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[82] | 40 | Register_unit * _Register_unit = new Register_unit |
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| 41 | (name.c_str(), |
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[60] | 42 | #ifdef STATISTICS |
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[82] | 43 | _parameters_statistics, |
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[60] | 44 | #endif |
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[82] | 45 | _param, |
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[88] | 46 | _usage); |
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[60] | 47 | |
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| 48 | #ifdef SYSTEMC |
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| 49 | /********************************************************************* |
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| 50 | * Déclarations des signaux |
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| 51 | *********************************************************************/ |
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| 52 | sc_clock * in_CLOCK; |
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| 53 | sc_signal<Tcontrol_t> * in_NRESET; |
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| 54 | |
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| 55 | // ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 56 | sc_signal<Tcontrol_t > ** in_GPR_READ_VAL ; |
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| 57 | sc_signal<Tcontrol_t > ** out_GPR_READ_ACK ; |
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| 58 | sc_signal<Tcontext_t > ** in_GPR_READ_OOO_ENGINE_ID ; |
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| 59 | sc_signal<Tgeneral_address_t> ** in_GPR_READ_NUM_REG ; |
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| 60 | sc_signal<Tgeneral_data_t > ** out_GPR_READ_DATA ; |
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| 61 | sc_signal<Tcontrol_t > ** out_GPR_READ_DATA_VAL ; |
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| 62 | |
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| 63 | // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 64 | sc_signal<Tcontrol_t > ** in_GPR_WRITE_VAL ; |
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| 65 | sc_signal<Tcontrol_t > ** out_GPR_WRITE_ACK ; |
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| 66 | sc_signal<Tcontext_t > ** in_GPR_WRITE_OOO_ENGINE_ID ; |
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| 67 | sc_signal<Tgeneral_address_t> ** in_GPR_WRITE_NUM_REG ; |
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| 68 | sc_signal<Tgeneral_data_t > ** in_GPR_WRITE_DATA ; |
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| 69 | |
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| 70 | // ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 71 | sc_signal<Tcontrol_t > ** in_SPR_READ_VAL ; |
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| 72 | sc_signal<Tcontrol_t > ** out_SPR_READ_ACK ; |
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| 73 | sc_signal<Tcontext_t > ** in_SPR_READ_OOO_ENGINE_ID ; |
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| 74 | sc_signal<Tspecial_address_t> ** in_SPR_READ_NUM_REG ; |
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| 75 | sc_signal<Tspecial_data_t > ** out_SPR_READ_DATA ; |
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| 76 | sc_signal<Tcontrol_t > ** out_SPR_READ_DATA_VAL ; |
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| 77 | |
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| 78 | // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 79 | sc_signal<Tcontrol_t > ** in_SPR_WRITE_VAL ; |
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| 80 | sc_signal<Tcontrol_t > ** out_SPR_WRITE_ACK ; |
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| 81 | sc_signal<Tcontext_t > ** in_SPR_WRITE_OOO_ENGINE_ID ; |
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| 82 | sc_signal<Tspecial_address_t> ** in_SPR_WRITE_NUM_REG ; |
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| 83 | sc_signal<Tspecial_data_t > ** in_SPR_WRITE_DATA ; |
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| 84 | |
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| 85 | // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 86 | sc_signal<Tcontrol_t > *** in_INSERT_ROB_VAL ; |
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| 87 | sc_signal<Tcontrol_t > *** out_INSERT_ROB_ACK ; |
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| 88 | sc_signal<Tcontrol_t > *** in_INSERT_ROB_RD_USE ; |
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| 89 | sc_signal<Tgeneral_address_t> *** in_INSERT_ROB_RD_NUM_REG ; // use=1 : status[num_reg]<- 0 |
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| 90 | sc_signal<Tcontrol_t > *** in_INSERT_ROB_RE_USE ; |
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| 91 | sc_signal<Tspecial_address_t> *** in_INSERT_ROB_RE_NUM_REG ; |
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| 92 | |
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[88] | 93 | // // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 94 | // sc_signal<Tcontrol_t > *** in_RETIRE_ROB_VAL ; |
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| 95 | // sc_signal<Tcontrol_t > *** out_RETIRE_ROB_ACK ; |
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| 96 | // sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RD_OLD_USE ; |
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| 97 | // sc_signal<Tgeneral_address_t> *** in_RETIRE_ROB_RD_OLD_NUM_REG ; // old_use=1 : status[old_num_reg]<- 0 |
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| 98 | // sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RD_NEW_USE ; |
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| 99 | // sc_signal<Tgeneral_address_t> *** in_RETIRE_ROB_RD_NEW_NUM_REG ; // new_use=1 : status[new_num_reg]<- 1 |
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| 100 | // sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RE_OLD_USE ; |
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| 101 | // sc_signal<Tspecial_address_t> *** in_RETIRE_ROB_RE_OLD_NUM_REG ; |
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| 102 | // sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RE_NEW_USE ; |
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| 103 | // sc_signal<Tspecial_address_t> *** in_RETIRE_ROB_RE_NEW_NUM_REG ; |
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[60] | 104 | |
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[62] | 105 | string rename = "signal"; |
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[60] | 106 | |
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| 107 | in_CLOCK = new sc_clock ("clock", 1.0, 0.5); |
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| 108 | in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); |
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| 109 | |
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| 110 | |
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| 111 | // ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 112 | in_GPR_READ_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_read]; |
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| 113 | out_GPR_READ_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_read]; |
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| 114 | in_GPR_READ_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_gpr_read]; |
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| 115 | in_GPR_READ_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_gpr_read]; |
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| 116 | out_GPR_READ_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_gpr_read]; |
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| 117 | out_GPR_READ_DATA_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_read]; |
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| 118 | |
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| 119 | for (uint32_t i=0; i<_param->_nb_gpr_read; i++) |
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| 120 | { |
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| 121 | in_GPR_READ_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 122 | out_GPR_READ_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 123 | in_GPR_READ_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str()); |
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| 124 | in_GPR_READ_NUM_REG [i]= new sc_signal<Tgeneral_address_t> (rename.c_str()); |
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| 125 | out_GPR_READ_DATA [i]= new sc_signal<Tgeneral_data_t > (rename.c_str()); |
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| 126 | out_GPR_READ_DATA_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 127 | } |
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| 128 | |
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| 129 | // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 130 | in_GPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_write]; |
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| 131 | out_GPR_WRITE_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_write]; |
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| 132 | in_GPR_WRITE_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_gpr_write]; |
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| 133 | in_GPR_WRITE_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_gpr_write]; |
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| 134 | in_GPR_WRITE_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_gpr_write]; |
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| 135 | |
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| 136 | for (uint32_t i=0; i<_param->_nb_gpr_write; i++) |
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| 137 | { |
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| 138 | in_GPR_WRITE_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 139 | out_GPR_WRITE_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 140 | in_GPR_WRITE_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str()); |
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| 141 | in_GPR_WRITE_NUM_REG [i]= new sc_signal<Tgeneral_address_t> (rename.c_str()); |
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| 142 | in_GPR_WRITE_DATA [i]= new sc_signal<Tgeneral_data_t > (rename.c_str()); |
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| 143 | } |
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| 144 | |
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| 145 | // ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 146 | in_SPR_READ_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_read]; |
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| 147 | out_SPR_READ_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_spr_read]; |
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| 148 | in_SPR_READ_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_spr_read]; |
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| 149 | in_SPR_READ_NUM_REG = new sc_signal<Tspecial_address_t> * [_param->_nb_spr_read]; |
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| 150 | out_SPR_READ_DATA = new sc_signal<Tspecial_data_t > * [_param->_nb_spr_read]; |
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| 151 | out_SPR_READ_DATA_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_read]; |
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| 152 | |
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| 153 | for (uint32_t i=0; i<_param->_nb_spr_read; i++) |
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| 154 | { |
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| 155 | in_SPR_READ_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 156 | out_SPR_READ_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 157 | in_SPR_READ_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str()); |
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| 158 | in_SPR_READ_NUM_REG [i]= new sc_signal<Tspecial_address_t> (rename.c_str()); |
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| 159 | out_SPR_READ_DATA [i]= new sc_signal<Tspecial_data_t > (rename.c_str()); |
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| 160 | out_SPR_READ_DATA_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 161 | } |
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| 162 | |
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| 163 | // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 164 | in_SPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_write]; |
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| 165 | out_SPR_WRITE_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_spr_write]; |
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| 166 | in_SPR_WRITE_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_spr_write]; |
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| 167 | in_SPR_WRITE_NUM_REG = new sc_signal<Tspecial_address_t> * [_param->_nb_spr_write]; |
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| 168 | in_SPR_WRITE_DATA = new sc_signal<Tspecial_data_t > * [_param->_nb_spr_write]; |
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| 169 | |
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| 170 | for (uint32_t i=0; i<_param->_nb_spr_write; i++) |
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| 171 | { |
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| 172 | in_SPR_WRITE_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 173 | out_SPR_WRITE_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 174 | in_SPR_WRITE_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str()); |
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| 175 | in_SPR_WRITE_NUM_REG [i]= new sc_signal<Tspecial_address_t> (rename.c_str()); |
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| 176 | in_SPR_WRITE_DATA [i]= new sc_signal<Tspecial_data_t > (rename.c_str()); |
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| 177 | } |
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| 178 | |
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| 179 | // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 180 | in_INSERT_ROB_VAL = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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| 181 | out_INSERT_ROB_ACK = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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| 182 | in_INSERT_ROB_RD_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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| 183 | in_INSERT_ROB_RD_NUM_REG = new sc_signal<Tgeneral_address_t> ** [_param->_nb_ooo_engine]; |
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| 184 | in_INSERT_ROB_RE_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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| 185 | in_INSERT_ROB_RE_NUM_REG = new sc_signal<Tspecial_address_t> ** [_param->_nb_ooo_engine]; |
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| 186 | |
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| 187 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
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| 188 | { |
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| 189 | uint32_t x=_param->_nb_inst_insert_rob [i]; |
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| 190 | |
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| 191 | in_INSERT_ROB_VAL [i] = new sc_signal<Tcontrol_t > * [x]; |
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| 192 | out_INSERT_ROB_ACK [i] = new sc_signal<Tcontrol_t > * [x]; |
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| 193 | in_INSERT_ROB_RD_USE [i] = new sc_signal<Tcontrol_t > * [x]; |
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| 194 | in_INSERT_ROB_RD_NUM_REG [i] = new sc_signal<Tgeneral_address_t> * [x]; |
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| 195 | in_INSERT_ROB_RE_USE [i] = new sc_signal<Tcontrol_t > * [x]; |
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| 196 | in_INSERT_ROB_RE_NUM_REG [i] = new sc_signal<Tspecial_address_t> * [x]; |
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| 197 | |
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| 198 | for (uint32_t j=0; j<x; j++) |
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| 199 | { |
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| 200 | in_INSERT_ROB_VAL [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 201 | out_INSERT_ROB_ACK [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 202 | in_INSERT_ROB_RD_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 203 | in_INSERT_ROB_RD_NUM_REG [i][j] = new sc_signal<Tgeneral_address_t> (rename.c_str()); |
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| 204 | in_INSERT_ROB_RE_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 205 | in_INSERT_ROB_RE_NUM_REG [i][j] = new sc_signal<Tspecial_address_t> (rename.c_str()); |
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| 206 | |
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| 207 | } |
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| 208 | } |
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| 209 | |
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[88] | 210 | // // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 211 | // in_RETIRE_ROB_VAL = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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| 212 | // out_RETIRE_ROB_ACK = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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| 213 | // in_RETIRE_ROB_RD_OLD_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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| 214 | // in_RETIRE_ROB_RD_OLD_NUM_REG = new sc_signal<Tgeneral_address_t> ** [_param->_nb_ooo_engine]; |
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| 215 | // in_RETIRE_ROB_RE_OLD_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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| 216 | // in_RETIRE_ROB_RE_OLD_NUM_REG = new sc_signal<Tspecial_address_t> ** [_param->_nb_ooo_engine]; |
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| 217 | // in_RETIRE_ROB_RD_NEW_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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| 218 | // in_RETIRE_ROB_RD_NEW_NUM_REG = new sc_signal<Tgeneral_address_t> ** [_param->_nb_ooo_engine]; |
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| 219 | // in_RETIRE_ROB_RE_NEW_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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| 220 | // in_RETIRE_ROB_RE_NEW_NUM_REG = new sc_signal<Tspecial_address_t> ** [_param->_nb_ooo_engine]; |
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[60] | 221 | |
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[88] | 222 | // for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
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| 223 | // { |
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| 224 | // uint32_t x=_param->_nb_inst_retire_rob [i]; |
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[60] | 225 | |
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[88] | 226 | // in_RETIRE_ROB_VAL [i] = new sc_signal<Tcontrol_t > * [x]; |
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| 227 | // out_RETIRE_ROB_ACK [i] = new sc_signal<Tcontrol_t > * [x]; |
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| 228 | // in_RETIRE_ROB_RD_OLD_USE [i] = new sc_signal<Tcontrol_t > * [x]; |
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| 229 | // in_RETIRE_ROB_RD_OLD_NUM_REG [i] = new sc_signal<Tgeneral_address_t> * [x]; |
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| 230 | // in_RETIRE_ROB_RE_OLD_USE [i] = new sc_signal<Tcontrol_t > * [x]; |
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| 231 | // in_RETIRE_ROB_RE_OLD_NUM_REG [i] = new sc_signal<Tspecial_address_t> * [x]; |
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| 232 | // in_RETIRE_ROB_RD_NEW_USE [i] = new sc_signal<Tcontrol_t > * [x]; |
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| 233 | // in_RETIRE_ROB_RD_NEW_NUM_REG [i] = new sc_signal<Tgeneral_address_t> * [x]; |
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| 234 | // in_RETIRE_ROB_RE_NEW_USE [i] = new sc_signal<Tcontrol_t > * [x]; |
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| 235 | // in_RETIRE_ROB_RE_NEW_NUM_REG [i] = new sc_signal<Tspecial_address_t> * [x]; |
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[60] | 236 | |
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[88] | 237 | // for (uint32_t j=0; j<x; j++) |
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| 238 | // { |
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| 239 | // in_RETIRE_ROB_VAL [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 240 | // out_RETIRE_ROB_ACK [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 241 | // in_RETIRE_ROB_RD_OLD_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 242 | // in_RETIRE_ROB_RD_OLD_NUM_REG [i][j] = new sc_signal<Tgeneral_address_t> (rename.c_str()); |
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| 243 | // in_RETIRE_ROB_RE_OLD_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 244 | // in_RETIRE_ROB_RE_OLD_NUM_REG [i][j] = new sc_signal<Tspecial_address_t> (rename.c_str()); |
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| 245 | // in_RETIRE_ROB_RD_NEW_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 246 | // in_RETIRE_ROB_RD_NEW_NUM_REG [i][j] = new sc_signal<Tgeneral_address_t> (rename.c_str()); |
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| 247 | // in_RETIRE_ROB_RE_NEW_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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| 248 | // in_RETIRE_ROB_RE_NEW_NUM_REG [i][j] = new sc_signal<Tspecial_address_t> (rename.c_str()); |
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| 249 | // } |
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| 250 | // } |
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[60] | 251 | |
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| 252 | |
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| 253 | /******************************************************** |
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| 254 | * Instanciation |
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| 255 | ********************************************************/ |
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| 256 | |
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| 257 | cout << "<" << name << "> Instanciation of _Register_unit" << endl; |
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| 258 | |
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| 259 | (*(_Register_unit->in_CLOCK)) (*(in_CLOCK)); |
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| 260 | (*(_Register_unit->in_NRESET)) (*(in_NRESET)); |
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| 261 | |
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| 262 | for (uint32_t i=0; i<_param->_nb_gpr_read; i++) |
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| 263 | { |
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| 264 | (*(_Register_unit-> in_GPR_READ_VAL [i]))(*( in_GPR_READ_VAL [i])); |
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| 265 | (*(_Register_unit->out_GPR_READ_ACK [i]))(*(out_GPR_READ_ACK [i])); |
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| 266 | if (_param->_have_port_ooo_engine_id == true) |
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| 267 | (*(_Register_unit-> in_GPR_READ_OOO_ENGINE_ID [i]))(*( in_GPR_READ_OOO_ENGINE_ID [i])); |
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| 268 | (*(_Register_unit-> in_GPR_READ_NUM_REG [i]))(*( in_GPR_READ_NUM_REG [i])); |
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| 269 | (*(_Register_unit->out_GPR_READ_DATA [i]))(*(out_GPR_READ_DATA [i])); |
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| 270 | (*(_Register_unit->out_GPR_READ_DATA_VAL [i]))(*(out_GPR_READ_DATA_VAL [i])); |
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| 271 | } |
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| 272 | for (uint32_t i=0; i<_param->_nb_gpr_write; i++) |
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| 273 | { |
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| 274 | (*(_Register_unit-> in_GPR_WRITE_VAL [i]))(*( in_GPR_WRITE_VAL [i])); |
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| 275 | (*(_Register_unit->out_GPR_WRITE_ACK [i]))(*(out_GPR_WRITE_ACK [i])); |
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| 276 | if (_param->_have_port_ooo_engine_id == true) |
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| 277 | (*(_Register_unit-> in_GPR_WRITE_OOO_ENGINE_ID [i]))(*( in_GPR_WRITE_OOO_ENGINE_ID [i])); |
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| 278 | (*(_Register_unit-> in_GPR_WRITE_NUM_REG [i]))(*( in_GPR_WRITE_NUM_REG [i])); |
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| 279 | (*(_Register_unit-> in_GPR_WRITE_DATA [i]))(*( in_GPR_WRITE_DATA [i])); |
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| 280 | } |
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| 281 | for (uint32_t i=0; i<_param->_nb_spr_read; i++) |
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| 282 | { |
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| 283 | (*(_Register_unit-> in_SPR_READ_VAL [i]))(*( in_SPR_READ_VAL [i])); |
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| 284 | (*(_Register_unit->out_SPR_READ_ACK [i]))(*(out_SPR_READ_ACK [i])); |
---|
| 285 | if (_param->_have_port_ooo_engine_id == true) |
---|
| 286 | (*(_Register_unit-> in_SPR_READ_OOO_ENGINE_ID [i]))(*( in_SPR_READ_OOO_ENGINE_ID [i])); |
---|
| 287 | (*(_Register_unit-> in_SPR_READ_NUM_REG [i]))(*( in_SPR_READ_NUM_REG [i])); |
---|
| 288 | (*(_Register_unit->out_SPR_READ_DATA [i]))(*(out_SPR_READ_DATA [i])); |
---|
| 289 | (*(_Register_unit->out_SPR_READ_DATA_VAL [i]))(*(out_SPR_READ_DATA_VAL [i])); |
---|
| 290 | } |
---|
| 291 | for (uint32_t i=0; i<_param->_nb_spr_write; i++) |
---|
| 292 | { |
---|
| 293 | (*(_Register_unit-> in_SPR_WRITE_VAL [i]))(*( in_SPR_WRITE_VAL [i])); |
---|
| 294 | (*(_Register_unit->out_SPR_WRITE_ACK [i]))(*(out_SPR_WRITE_ACK [i])); |
---|
| 295 | if (_param->_have_port_ooo_engine_id == true) |
---|
| 296 | (*(_Register_unit-> in_SPR_WRITE_OOO_ENGINE_ID [i]))(*( in_SPR_WRITE_OOO_ENGINE_ID [i])); |
---|
| 297 | (*(_Register_unit-> in_SPR_WRITE_NUM_REG [i]))(*( in_SPR_WRITE_NUM_REG [i])); |
---|
| 298 | (*(_Register_unit-> in_SPR_WRITE_DATA [i]))(*( in_SPR_WRITE_DATA [i])); |
---|
| 299 | } |
---|
| 300 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 301 | for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) |
---|
| 302 | { |
---|
| 303 | (*(_Register_unit-> in_INSERT_ROB_VAL [i][j]))(*( in_INSERT_ROB_VAL [i][j])); |
---|
| 304 | (*(_Register_unit->out_INSERT_ROB_ACK [i][j]))(*(out_INSERT_ROB_ACK [i][j])); |
---|
| 305 | (*(_Register_unit-> in_INSERT_ROB_RD_USE [i][j]))(*( in_INSERT_ROB_RD_USE [i][j])); |
---|
| 306 | (*(_Register_unit-> in_INSERT_ROB_RD_NUM_REG [i][j]))(*( in_INSERT_ROB_RD_NUM_REG [i][j])); |
---|
| 307 | (*(_Register_unit-> in_INSERT_ROB_RE_USE [i][j]))(*( in_INSERT_ROB_RE_USE [i][j])); |
---|
| 308 | (*(_Register_unit-> in_INSERT_ROB_RE_NUM_REG [i][j]))(*( in_INSERT_ROB_RE_NUM_REG [i][j])); |
---|
| 309 | } |
---|
[88] | 310 | // for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 311 | // for (uint32_t j=0; j<_param->_nb_inst_retire_rob [i]; j++) |
---|
| 312 | // { |
---|
| 313 | // (*(_Register_unit-> in_RETIRE_ROB_VAL [i][j]))(*( in_RETIRE_ROB_VAL [i][j])); |
---|
| 314 | // (*(_Register_unit->out_RETIRE_ROB_ACK [i][j]))(*(out_RETIRE_ROB_ACK [i][j])); |
---|
| 315 | // (*(_Register_unit-> in_RETIRE_ROB_RD_OLD_USE [i][j]))(*( in_RETIRE_ROB_RD_OLD_USE [i][j])); |
---|
| 316 | // (*(_Register_unit-> in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]))(*( in_RETIRE_ROB_RD_OLD_NUM_REG [i][j])); |
---|
| 317 | // (*(_Register_unit-> in_RETIRE_ROB_RE_OLD_USE [i][j]))(*( in_RETIRE_ROB_RE_OLD_USE [i][j])); |
---|
| 318 | // (*(_Register_unit-> in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]))(*( in_RETIRE_ROB_RE_OLD_NUM_REG [i][j])); |
---|
| 319 | // (*(_Register_unit-> in_RETIRE_ROB_RD_NEW_USE [i][j]))(*( in_RETIRE_ROB_RD_NEW_USE [i][j])); |
---|
| 320 | // (*(_Register_unit-> in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]))(*( in_RETIRE_ROB_RD_NEW_NUM_REG [i][j])); |
---|
| 321 | // (*(_Register_unit-> in_RETIRE_ROB_RE_NEW_USE [i][j]))(*( in_RETIRE_ROB_RE_NEW_USE [i][j])); |
---|
| 322 | // (*(_Register_unit-> in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]))(*( in_RETIRE_ROB_RE_NEW_NUM_REG [i][j])); |
---|
| 323 | // } |
---|
[60] | 324 | |
---|
| 325 | cout << "<" << name << "> Start Simulation ............" << endl; |
---|
| 326 | Time * _time = new Time(); |
---|
| 327 | |
---|
| 328 | /******************************************************** |
---|
| 329 | * Simulation - Begin |
---|
| 330 | ********************************************************/ |
---|
| 331 | |
---|
| 332 | // Initialisation |
---|
[64] | 333 | uint32_t max_nb_general_register = 0; |
---|
[60] | 334 | |
---|
[64] | 335 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 336 | if (_param->_nb_general_register [i] > max_nb_general_register) |
---|
| 337 | max_nb_general_register = _param->_nb_general_register [i]; |
---|
| 338 | |
---|
| 339 | uint32_t max_nb_special_register = 0; |
---|
| 340 | |
---|
| 341 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 342 | if (_param->_nb_special_register [i] > max_nb_special_register) |
---|
| 343 | max_nb_special_register = _param->_nb_special_register [i]; |
---|
| 344 | |
---|
| 345 | const int32_t percent_transaction_read = 70; |
---|
| 346 | const int32_t percent_transaction_write = 70; |
---|
| 347 | const int32_t percent_transaction_insert = 70; |
---|
| 348 | const int32_t percent_transaction_insert_use = 70; |
---|
[88] | 349 | // const int32_t percent_transaction_retire = 70; |
---|
| 350 | // const int32_t percent_transaction_retire_use = 70; |
---|
[64] | 351 | const uint32_t nb_request = max_nb_general_register; |
---|
| 352 | |
---|
[60] | 353 | const uint32_t seed = 0; |
---|
| 354 | //const uint32_t seed = static_cast<uint32_t>(time(NULL)); |
---|
| 355 | |
---|
| 356 | srand(seed); |
---|
| 357 | |
---|
[64] | 358 | Tgeneral_data_t gpr [_param->_nb_ooo_engine][max_nb_general_register]; |
---|
| 359 | Tcontrol_t gpr_status [_param->_nb_ooo_engine][max_nb_general_register]; |
---|
| 360 | Tspecial_data_t spr [_param->_nb_ooo_engine][max_nb_special_register]; |
---|
| 361 | Tcontrol_t spr_status [_param->_nb_ooo_engine][max_nb_special_register]; |
---|
| 362 | |
---|
[60] | 363 | SC_START(0); |
---|
| 364 | |
---|
| 365 | LABEL("Initialisation"); |
---|
| 366 | |
---|
[65] | 367 | in_NRESET->write(0); |
---|
| 368 | SC_START(5); |
---|
| 369 | in_NRESET->write(1); |
---|
| 370 | |
---|
[64] | 371 | for (uint32_t i=0; i<_param->_nb_gpr_read ; i++) |
---|
| 372 | in_GPR_READ_VAL [i]->write(0); |
---|
| 373 | for (uint32_t i=0; i<_param->_nb_gpr_write; i++) |
---|
| 374 | in_GPR_WRITE_VAL [i]->write(0); |
---|
| 375 | for (uint32_t i=0; i<_param->_nb_spr_read ; i++) |
---|
| 376 | in_SPR_READ_VAL [i]->write(0); |
---|
| 377 | for (uint32_t i=0; i<_param->_nb_spr_write; i++) |
---|
| 378 | in_SPR_WRITE_VAL [i]->write(0); |
---|
| 379 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 380 | { |
---|
| 381 | for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) |
---|
| 382 | in_INSERT_ROB_VAL [i][j]->write(0); |
---|
[88] | 383 | // for (uint32_t j=0; j<_param->_nb_inst_retire_rob [i]; j++) |
---|
| 384 | // in_RETIRE_ROB_VAL [i][j]->write(0); |
---|
[64] | 385 | } |
---|
| 386 | |
---|
| 387 | Tgeneral_address_t gpr_address [_param->_nb_gpr_write]; |
---|
| 388 | Tgeneral_address_t gpr_address_next; |
---|
| 389 | uint32_t nb_port_gpr_active; // number of port active |
---|
| 390 | |
---|
| 391 | Tspecial_address_t spr_address [_param->_nb_spr_write]; |
---|
| 392 | Tspecial_address_t spr_address_next; |
---|
| 393 | uint32_t nb_port_spr_active; // number of port active |
---|
| 394 | |
---|
[60] | 395 | LABEL("Loop of Test"); |
---|
| 396 | |
---|
| 397 | for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) |
---|
| 398 | { |
---|
[82] | 399 | LABEL("Iteration %d",iteration); |
---|
[60] | 400 | |
---|
[64] | 401 | LABEL("(GPR) Write default value"); |
---|
| 402 | |
---|
| 403 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 404 | for(uint32_t j=0; j<max_nb_general_register; j++) |
---|
| 405 | { |
---|
| 406 | gpr [i][j] = rand()%_param->_size_general_data; |
---|
| 407 | gpr_status [i][j] = 1; |
---|
| 408 | } |
---|
| 409 | |
---|
| 410 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 411 | { |
---|
| 412 | gpr_address_next = _param->_nb_gpr_write; |
---|
| 413 | nb_port_gpr_active = _param->_nb_gpr_write; |
---|
| 414 | |
---|
| 415 | for (uint32_t j=0; j<_param->_nb_gpr_write; j++) |
---|
| 416 | { |
---|
| 417 | gpr_address[j] = j; |
---|
| 418 | if (j >= _param->_nb_general_register [i]) |
---|
| 419 | nb_port_gpr_active --; |
---|
| 420 | } |
---|
| 421 | |
---|
| 422 | while (nb_port_gpr_active > 0) |
---|
| 423 | { |
---|
| 424 | for (uint32_t j=0; j<_param->_nb_gpr_write; j++) |
---|
| 425 | { |
---|
| 426 | in_GPR_WRITE_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and |
---|
| 427 | ((rand() % 100) < percent_transaction_write)); |
---|
| 428 | in_GPR_WRITE_OOO_ENGINE_ID [j]->write(i); |
---|
| 429 | in_GPR_WRITE_NUM_REG [j]->write(gpr_address[j]); |
---|
| 430 | in_GPR_WRITE_DATA [j]->write(gpr [i][gpr_address[j]]); |
---|
| 431 | } |
---|
| 432 | |
---|
| 433 | SC_START(1); |
---|
| 434 | |
---|
| 435 | // Test if write |
---|
| 436 | for (uint32_t j=0; j<_param->_nb_gpr_write; j++) |
---|
| 437 | if (in_GPR_WRITE_VAL [j]->read() and out_GPR_WRITE_ACK [j]->read()) |
---|
| 438 | { |
---|
| 439 | gpr_address[j] = gpr_address_next; |
---|
| 440 | |
---|
| 441 | if (gpr_address_next >= _param->_nb_general_register [i]) |
---|
| 442 | nb_port_gpr_active --; |
---|
| 443 | |
---|
| 444 | gpr_address_next ++; |
---|
| 445 | } |
---|
| 446 | } |
---|
| 447 | } |
---|
| 448 | |
---|
| 449 | for (uint32_t i=0; i<_param->_nb_gpr_write; i++) |
---|
| 450 | in_GPR_WRITE_VAL [i]->write(0); |
---|
| 451 | |
---|
| 452 | LABEL("(GPR) Read - and test data writted"); |
---|
| 453 | |
---|
| 454 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 455 | { |
---|
| 456 | gpr_address_next = _param->_nb_gpr_read; |
---|
| 457 | nb_port_gpr_active = _param->_nb_gpr_read; |
---|
| 458 | |
---|
| 459 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
| 460 | { |
---|
| 461 | gpr_address[j] = j; |
---|
| 462 | if (j >= _param->_nb_general_register [i]) |
---|
| 463 | nb_port_gpr_active --; |
---|
| 464 | } |
---|
| 465 | |
---|
| 466 | while (nb_port_gpr_active > 0) |
---|
| 467 | { |
---|
| 468 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
| 469 | { |
---|
| 470 | in_GPR_READ_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and |
---|
| 471 | ((rand() % 100) < percent_transaction_read)); |
---|
| 472 | in_GPR_READ_OOO_ENGINE_ID [j]->write(i); |
---|
| 473 | in_GPR_READ_NUM_REG [j]->write(gpr_address[j]); |
---|
| 474 | } |
---|
| 475 | |
---|
| 476 | SC_START(1); |
---|
| 477 | |
---|
| 478 | // Test if read |
---|
| 479 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
| 480 | if (in_GPR_READ_VAL [j]->read() and out_GPR_READ_ACK [j]->read()) |
---|
| 481 | { |
---|
| 482 | TEST(Tgeneral_data_t, out_GPR_READ_DATA [j]->read(), gpr [i][gpr_address[j]]); |
---|
| 483 | TEST(Tcontrol_t , out_GPR_READ_DATA_VAL[j]->read(), gpr_status [i][gpr_address[j]]); |
---|
| 484 | |
---|
| 485 | gpr_address[j] = gpr_address_next; |
---|
| 486 | |
---|
| 487 | if (gpr_address_next >= _param->_nb_general_register [i]) |
---|
| 488 | nb_port_gpr_active --; |
---|
| 489 | |
---|
| 490 | gpr_address_next ++; |
---|
| 491 | } |
---|
| 492 | } |
---|
| 493 | } |
---|
| 494 | |
---|
| 495 | for (uint32_t i=0; i<_param->_nb_gpr_read; i++) |
---|
| 496 | in_GPR_READ_VAL [i]->write(0); |
---|
| 497 | |
---|
| 498 | LABEL("(SPR) Write default value"); |
---|
| 499 | |
---|
| 500 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 501 | for(uint32_t j=0; j<max_nb_special_register; j++) |
---|
| 502 | { |
---|
| 503 | spr [i][j] = rand()%_param->_size_special_data; |
---|
| 504 | spr_status [i][j] = 1; |
---|
| 505 | } |
---|
| 506 | |
---|
| 507 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 508 | { |
---|
| 509 | spr_address_next = _param->_nb_spr_write; |
---|
| 510 | nb_port_spr_active = _param->_nb_spr_write; |
---|
| 511 | |
---|
| 512 | for (uint32_t j=0; j<_param->_nb_spr_write; j++) |
---|
| 513 | { |
---|
| 514 | spr_address[j] = j; |
---|
| 515 | if (j >= _param->_nb_special_register [i]) |
---|
| 516 | nb_port_spr_active --; |
---|
| 517 | } |
---|
| 518 | |
---|
| 519 | while (nb_port_spr_active > 0) |
---|
| 520 | { |
---|
| 521 | for (uint32_t j=0; j<_param->_nb_spr_write; j++) |
---|
| 522 | { |
---|
| 523 | in_SPR_WRITE_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and |
---|
| 524 | ((rand() % 100) < percent_transaction_write)); |
---|
| 525 | in_SPR_WRITE_OOO_ENGINE_ID [j]->write(i); |
---|
| 526 | in_SPR_WRITE_NUM_REG [j]->write(spr_address[j]); |
---|
| 527 | in_SPR_WRITE_DATA [j]->write(spr [i][spr_address[j]]); |
---|
| 528 | } |
---|
| 529 | |
---|
| 530 | SC_START(1); |
---|
| 531 | |
---|
| 532 | // Test if write |
---|
| 533 | for (uint32_t j=0; j<_param->_nb_spr_write; j++) |
---|
| 534 | if (in_SPR_WRITE_VAL [j]->read() and out_SPR_WRITE_ACK [j]->read()) |
---|
| 535 | { |
---|
| 536 | spr_address[j] = spr_address_next; |
---|
| 537 | |
---|
| 538 | if (spr_address_next >= _param->_nb_special_register [i]) |
---|
| 539 | nb_port_spr_active --; |
---|
| 540 | |
---|
| 541 | spr_address_next ++; |
---|
| 542 | } |
---|
| 543 | } |
---|
| 544 | } |
---|
| 545 | |
---|
| 546 | for (uint32_t i=0; i<_param->_nb_spr_write; i++) |
---|
| 547 | in_SPR_WRITE_VAL [i]->write(0); |
---|
| 548 | |
---|
| 549 | LABEL("(SPR) Read - and test data writted"); |
---|
| 550 | |
---|
| 551 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 552 | { |
---|
| 553 | spr_address_next = _param->_nb_spr_read; |
---|
| 554 | nb_port_spr_active = _param->_nb_spr_read; |
---|
| 555 | |
---|
| 556 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
| 557 | { |
---|
| 558 | spr_address[j] = j; |
---|
| 559 | if (j >= _param->_nb_special_register [i]) |
---|
| 560 | nb_port_spr_active --; |
---|
| 561 | } |
---|
| 562 | |
---|
| 563 | while (nb_port_spr_active > 0) |
---|
| 564 | { |
---|
| 565 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
| 566 | { |
---|
| 567 | in_SPR_READ_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and |
---|
| 568 | ((rand() % 100) < percent_transaction_read)); |
---|
| 569 | in_SPR_READ_OOO_ENGINE_ID [j]->write(i); |
---|
| 570 | in_SPR_READ_NUM_REG [j]->write(spr_address[j]); |
---|
| 571 | } |
---|
| 572 | |
---|
| 573 | SC_START(1); |
---|
| 574 | |
---|
| 575 | // Test if read |
---|
| 576 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
| 577 | if (in_SPR_READ_VAL [j]->read() and out_SPR_READ_ACK [j]->read()) |
---|
| 578 | { |
---|
| 579 | TEST(Tspecial_data_t, out_SPR_READ_DATA [j]->read(), spr [i][spr_address[j]]); |
---|
| 580 | TEST(Tcontrol_t , out_SPR_READ_DATA_VAL[j]->read(), spr_status [i][spr_address[j]]); |
---|
| 581 | |
---|
| 582 | spr_address[j] = spr_address_next; |
---|
| 583 | |
---|
| 584 | if (spr_address_next >= _param->_nb_special_register [i]) |
---|
| 585 | nb_port_spr_active --; |
---|
| 586 | |
---|
| 587 | spr_address_next ++; |
---|
| 588 | } |
---|
| 589 | } |
---|
| 590 | } |
---|
| 591 | |
---|
| 592 | for (uint32_t i=0; i<_param->_nb_spr_read; i++) |
---|
| 593 | in_SPR_READ_VAL [i]->write(0); |
---|
| 594 | |
---|
| 595 | LABEL("insert rob"); |
---|
| 596 | |
---|
| 597 | uint32_t cpt = 0; |
---|
| 598 | |
---|
| 599 | while (cpt < nb_request) |
---|
| 600 | { |
---|
| 601 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 602 | { |
---|
| 603 | uint32_t x=_param->_nb_inst_insert_rob [i]; |
---|
| 604 | for (uint32_t j=0; j<x; j++) |
---|
| 605 | { |
---|
| 606 | in_INSERT_ROB_VAL [i][j]->write((rand() % 100) < percent_transaction_insert); |
---|
| 607 | in_INSERT_ROB_RD_USE [i][j]->write((rand() % 100) < percent_transaction_insert_use); |
---|
| 608 | in_INSERT_ROB_RD_NUM_REG [i][j]->write(rand() % _param->_nb_general_register [i]); |
---|
| 609 | in_INSERT_ROB_RE_USE [i][j]->write((rand() % 100) < percent_transaction_insert_use); |
---|
| 610 | in_INSERT_ROB_RE_NUM_REG [i][j]->write(rand() % _param->_nb_special_register [i]); |
---|
| 611 | } |
---|
| 612 | } |
---|
| 613 | |
---|
| 614 | SC_START(1); |
---|
| 615 | |
---|
| 616 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 617 | { |
---|
| 618 | uint32_t x=_param->_nb_inst_insert_rob [i]; |
---|
| 619 | for (uint32_t j=0; j<x; j++) |
---|
| 620 | { |
---|
| 621 | if (in_INSERT_ROB_VAL [i][j]->read() and out_INSERT_ROB_ACK [i][j]->read()) |
---|
| 622 | { |
---|
| 623 | cpt ++; |
---|
| 624 | |
---|
| 625 | if (in_INSERT_ROB_RD_USE [i][j]->read()) |
---|
| 626 | gpr_status [i][in_INSERT_ROB_RD_NUM_REG [i][j]->read()] = 0; |
---|
| 627 | |
---|
| 628 | if (in_INSERT_ROB_RE_USE [i][j]->read()) |
---|
| 629 | spr_status [i][in_INSERT_ROB_RE_NUM_REG [i][j]->read()] = 0; |
---|
| 630 | } |
---|
| 631 | } |
---|
| 632 | } |
---|
| 633 | } |
---|
| 634 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 635 | for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) |
---|
| 636 | in_INSERT_ROB_VAL [i][j]->write(0); |
---|
| 637 | |
---|
| 638 | LABEL("(GPR) Read - and test data writted"); |
---|
| 639 | |
---|
| 640 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 641 | { |
---|
| 642 | gpr_address_next = _param->_nb_gpr_read; |
---|
| 643 | nb_port_gpr_active = _param->_nb_gpr_read; |
---|
| 644 | |
---|
| 645 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
| 646 | { |
---|
| 647 | gpr_address[j] = j; |
---|
| 648 | if (j >= _param->_nb_general_register [i]) |
---|
| 649 | nb_port_gpr_active --; |
---|
| 650 | } |
---|
| 651 | |
---|
| 652 | while (nb_port_gpr_active > 0) |
---|
| 653 | { |
---|
| 654 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
| 655 | { |
---|
| 656 | in_GPR_READ_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and |
---|
| 657 | ((rand() % 100) < percent_transaction_read)); |
---|
| 658 | in_GPR_READ_OOO_ENGINE_ID [j]->write(i); |
---|
| 659 | in_GPR_READ_NUM_REG [j]->write(gpr_address[j]); |
---|
| 660 | } |
---|
| 661 | |
---|
| 662 | SC_START(1); |
---|
| 663 | |
---|
| 664 | // Test if read |
---|
| 665 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
| 666 | if (in_GPR_READ_VAL [j]->read() and out_GPR_READ_ACK [j]->read()) |
---|
| 667 | { |
---|
| 668 | TEST(Tgeneral_data_t, out_GPR_READ_DATA [j]->read(), gpr [i][gpr_address[j]]); |
---|
| 669 | TEST(Tcontrol_t , out_GPR_READ_DATA_VAL[j]->read(), gpr_status [i][gpr_address[j]]); |
---|
| 670 | |
---|
| 671 | gpr_address[j] = gpr_address_next; |
---|
| 672 | |
---|
| 673 | if (gpr_address_next >= _param->_nb_general_register [i]) |
---|
| 674 | nb_port_gpr_active --; |
---|
| 675 | |
---|
| 676 | gpr_address_next ++; |
---|
| 677 | } |
---|
| 678 | } |
---|
| 679 | } |
---|
| 680 | |
---|
| 681 | for (uint32_t i=0; i<_param->_nb_gpr_read; i++) |
---|
| 682 | in_GPR_READ_VAL [i]->write(0); |
---|
| 683 | |
---|
| 684 | LABEL("(SPR) Read - and test data writted"); |
---|
| 685 | |
---|
| 686 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 687 | { |
---|
| 688 | spr_address_next = _param->_nb_spr_read; |
---|
| 689 | nb_port_spr_active = _param->_nb_spr_read; |
---|
| 690 | |
---|
| 691 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
| 692 | { |
---|
| 693 | spr_address[j] = j; |
---|
| 694 | if (j >= _param->_nb_special_register [i]) |
---|
| 695 | nb_port_spr_active --; |
---|
| 696 | } |
---|
| 697 | |
---|
| 698 | while (nb_port_spr_active > 0) |
---|
| 699 | { |
---|
| 700 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
| 701 | { |
---|
| 702 | in_SPR_READ_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and |
---|
| 703 | ((rand() % 100) < percent_transaction_read)); |
---|
| 704 | in_SPR_READ_OOO_ENGINE_ID [j]->write(i); |
---|
| 705 | in_SPR_READ_NUM_REG [j]->write(spr_address[j]); |
---|
| 706 | } |
---|
| 707 | |
---|
| 708 | SC_START(1); |
---|
| 709 | |
---|
| 710 | // Test if read |
---|
| 711 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
| 712 | if (in_SPR_READ_VAL [j]->read() and out_SPR_READ_ACK [j]->read()) |
---|
| 713 | { |
---|
| 714 | TEST(Tspecial_data_t, out_SPR_READ_DATA [j]->read(), spr [i][spr_address[j]]); |
---|
| 715 | TEST(Tcontrol_t , out_SPR_READ_DATA_VAL[j]->read(), spr_status [i][spr_address[j]]); |
---|
| 716 | |
---|
| 717 | spr_address[j] = spr_address_next; |
---|
| 718 | |
---|
| 719 | if (spr_address_next >= _param->_nb_special_register [i]) |
---|
| 720 | nb_port_spr_active --; |
---|
| 721 | |
---|
| 722 | spr_address_next ++; |
---|
| 723 | } |
---|
| 724 | } |
---|
| 725 | } |
---|
| 726 | |
---|
[88] | 727 | // LABEL("retire rob"); |
---|
[64] | 728 | |
---|
[88] | 729 | // cpt = 0; |
---|
[64] | 730 | |
---|
[88] | 731 | // while (cpt < nb_request) |
---|
| 732 | // { |
---|
| 733 | // for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 734 | // { |
---|
| 735 | // uint32_t x=_param->_nb_inst_retire_rob [i]; |
---|
| 736 | // for (uint32_t j=0; j<x; j++) |
---|
| 737 | // { |
---|
| 738 | // in_RETIRE_ROB_VAL [i][j]->write((rand() % 100) < percent_transaction_retire); |
---|
| 739 | // in_RETIRE_ROB_RD_OLD_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use); |
---|
| 740 | // in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]->write(rand() % _param->_nb_general_register [i]); |
---|
| 741 | // in_RETIRE_ROB_RD_NEW_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use); |
---|
| 742 | // in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]->write(rand() % _param->_nb_general_register [i]); |
---|
| 743 | // in_RETIRE_ROB_RE_OLD_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use); |
---|
| 744 | // in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]->write(rand() % _param->_nb_special_register [i]); |
---|
| 745 | // in_RETIRE_ROB_RE_NEW_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use); |
---|
| 746 | // in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]->write(rand() % _param->_nb_special_register [i]); |
---|
| 747 | // } |
---|
| 748 | // } |
---|
[64] | 749 | |
---|
[88] | 750 | // SC_START(1); |
---|
[64] | 751 | |
---|
[88] | 752 | // for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 753 | // { |
---|
| 754 | // uint32_t x=_param->_nb_inst_retire_rob [i]; |
---|
| 755 | // for (uint32_t j=0; j<x; j++) |
---|
| 756 | // { |
---|
| 757 | // if (in_RETIRE_ROB_VAL [i][j]->read() and out_RETIRE_ROB_ACK [i][j]->read()) |
---|
| 758 | // { |
---|
| 759 | // cpt ++; |
---|
[64] | 760 | |
---|
[88] | 761 | // if (in_RETIRE_ROB_RD_OLD_USE [i][j]->read()) |
---|
| 762 | // gpr_status [i][in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]->read()] = 0; |
---|
| 763 | // if (in_RETIRE_ROB_RD_NEW_USE [i][j]->read()) |
---|
| 764 | // gpr_status [i][in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]->read()] = 1; |
---|
| 765 | // if (in_RETIRE_ROB_RE_OLD_USE [i][j]->read()) |
---|
| 766 | // spr_status [i][in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]->read()] = 0; |
---|
| 767 | // if (in_RETIRE_ROB_RE_NEW_USE [i][j]->read()) |
---|
| 768 | // spr_status [i][in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]->read()] = 1; |
---|
| 769 | // } |
---|
| 770 | // } |
---|
| 771 | // } |
---|
| 772 | // } |
---|
| 773 | // for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 774 | // for (uint32_t j=0; j<_param->_nb_inst_retire_rob [i]; j++) |
---|
| 775 | // in_RETIRE_ROB_VAL [i][j]->write(0); |
---|
[64] | 776 | |
---|
| 777 | LABEL("(GPR) Read - and test data writted"); |
---|
| 778 | |
---|
| 779 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 780 | { |
---|
| 781 | gpr_address_next = _param->_nb_gpr_read; |
---|
| 782 | nb_port_gpr_active = _param->_nb_gpr_read; |
---|
| 783 | |
---|
| 784 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
| 785 | { |
---|
| 786 | gpr_address[j] = j; |
---|
| 787 | if (j >= _param->_nb_general_register [i]) |
---|
| 788 | nb_port_gpr_active --; |
---|
| 789 | } |
---|
| 790 | |
---|
| 791 | while (nb_port_gpr_active > 0) |
---|
| 792 | { |
---|
| 793 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
| 794 | { |
---|
| 795 | in_GPR_READ_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and |
---|
| 796 | ((rand() % 100) < percent_transaction_read)); |
---|
| 797 | in_GPR_READ_OOO_ENGINE_ID [j]->write(i); |
---|
| 798 | in_GPR_READ_NUM_REG [j]->write(gpr_address[j]); |
---|
| 799 | } |
---|
| 800 | |
---|
| 801 | SC_START(1); |
---|
| 802 | |
---|
| 803 | // Test if read |
---|
| 804 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
| 805 | if (in_GPR_READ_VAL [j]->read() and out_GPR_READ_ACK [j]->read()) |
---|
| 806 | { |
---|
| 807 | TEST(Tgeneral_data_t, out_GPR_READ_DATA [j]->read(), gpr [i][gpr_address[j]]); |
---|
| 808 | TEST(Tcontrol_t , out_GPR_READ_DATA_VAL[j]->read(), gpr_status [i][gpr_address[j]]); |
---|
| 809 | |
---|
| 810 | gpr_address[j] = gpr_address_next; |
---|
| 811 | |
---|
| 812 | if (gpr_address_next >= _param->_nb_general_register [i]) |
---|
| 813 | nb_port_gpr_active --; |
---|
| 814 | |
---|
| 815 | gpr_address_next ++; |
---|
| 816 | } |
---|
| 817 | } |
---|
| 818 | } |
---|
| 819 | |
---|
| 820 | for (uint32_t i=0; i<_param->_nb_gpr_read; i++) |
---|
| 821 | in_GPR_READ_VAL [i]->write(0); |
---|
| 822 | |
---|
| 823 | LABEL("(SPR) Read - and test data writted"); |
---|
| 824 | |
---|
| 825 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
| 826 | { |
---|
| 827 | spr_address_next = _param->_nb_spr_read; |
---|
| 828 | nb_port_spr_active = _param->_nb_spr_read; |
---|
| 829 | |
---|
| 830 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
| 831 | { |
---|
| 832 | spr_address[j] = j; |
---|
| 833 | if (j >= _param->_nb_special_register [i]) |
---|
| 834 | nb_port_spr_active --; |
---|
| 835 | } |
---|
| 836 | |
---|
| 837 | while (nb_port_spr_active > 0) |
---|
| 838 | { |
---|
| 839 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
| 840 | { |
---|
| 841 | in_SPR_READ_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and |
---|
| 842 | ((rand() % 100) < percent_transaction_read)); |
---|
| 843 | in_SPR_READ_OOO_ENGINE_ID [j]->write(i); |
---|
| 844 | in_SPR_READ_NUM_REG [j]->write(spr_address[j]); |
---|
| 845 | } |
---|
| 846 | |
---|
| 847 | SC_START(1); |
---|
| 848 | |
---|
| 849 | // Test if read |
---|
| 850 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
| 851 | if (in_SPR_READ_VAL [j]->read() and out_SPR_READ_ACK [j]->read()) |
---|
| 852 | { |
---|
| 853 | TEST(Tspecial_data_t, out_SPR_READ_DATA [j]->read(), spr [i][spr_address[j]]); |
---|
| 854 | TEST(Tcontrol_t , out_SPR_READ_DATA_VAL[j]->read(), spr_status [i][spr_address[j]]); |
---|
| 855 | |
---|
| 856 | spr_address[j] = spr_address_next; |
---|
| 857 | |
---|
| 858 | if (spr_address_next >= _param->_nb_special_register [i]) |
---|
| 859 | nb_port_spr_active --; |
---|
| 860 | |
---|
| 861 | spr_address_next ++; |
---|
| 862 | } |
---|
| 863 | } |
---|
| 864 | } |
---|
| 865 | |
---|
[60] | 866 | } |
---|
| 867 | |
---|
| 868 | /******************************************************** |
---|
| 869 | * Simulation - End |
---|
| 870 | ********************************************************/ |
---|
| 871 | |
---|
| 872 | TEST_OK ("End of Simulation"); |
---|
| 873 | delete _time; |
---|
| 874 | cout << "<" << name << "> ............ Stop Simulation" << endl; |
---|
| 875 | |
---|
| 876 | delete in_CLOCK; |
---|
| 877 | delete in_NRESET; |
---|
| 878 | |
---|
| 879 | delete [] in_GPR_READ_VAL ; |
---|
| 880 | delete [] out_GPR_READ_ACK ; |
---|
| 881 | delete [] in_GPR_READ_OOO_ENGINE_ID ; |
---|
| 882 | delete [] in_GPR_READ_NUM_REG ; |
---|
| 883 | delete [] out_GPR_READ_DATA ; |
---|
| 884 | delete [] out_GPR_READ_DATA_VAL ; |
---|
| 885 | delete [] in_GPR_WRITE_VAL ; |
---|
| 886 | delete [] out_GPR_WRITE_ACK ; |
---|
| 887 | delete [] in_GPR_WRITE_OOO_ENGINE_ID ; |
---|
| 888 | delete [] in_GPR_WRITE_NUM_REG ; |
---|
| 889 | delete [] in_GPR_WRITE_DATA ; |
---|
| 890 | delete [] in_SPR_READ_VAL ; |
---|
| 891 | delete [] out_SPR_READ_ACK ; |
---|
| 892 | delete [] in_SPR_READ_OOO_ENGINE_ID ; |
---|
| 893 | delete [] in_SPR_READ_NUM_REG ; |
---|
| 894 | delete [] out_SPR_READ_DATA ; |
---|
| 895 | delete [] out_SPR_READ_DATA_VAL ; |
---|
| 896 | delete [] in_SPR_WRITE_VAL ; |
---|
| 897 | delete [] out_SPR_WRITE_ACK ; |
---|
| 898 | delete [] in_SPR_WRITE_OOO_ENGINE_ID ; |
---|
| 899 | delete [] in_SPR_WRITE_NUM_REG ; |
---|
| 900 | delete [] in_SPR_WRITE_DATA ; |
---|
| 901 | delete [] in_INSERT_ROB_VAL ; |
---|
| 902 | delete [] out_INSERT_ROB_ACK ; |
---|
| 903 | delete [] in_INSERT_ROB_RD_USE ; |
---|
| 904 | delete [] in_INSERT_ROB_RD_NUM_REG ; |
---|
| 905 | delete [] in_INSERT_ROB_RE_USE ; |
---|
| 906 | delete [] in_INSERT_ROB_RE_NUM_REG ; |
---|
[88] | 907 | // delete [] in_RETIRE_ROB_VAL ; |
---|
| 908 | // delete [] out_RETIRE_ROB_ACK ; |
---|
| 909 | // delete [] in_RETIRE_ROB_RD_OLD_USE ; |
---|
| 910 | // delete [] in_RETIRE_ROB_RD_OLD_NUM_REG ; |
---|
| 911 | // delete [] in_RETIRE_ROB_RD_NEW_USE ; |
---|
| 912 | // delete [] in_RETIRE_ROB_RD_NEW_NUM_REG ; |
---|
| 913 | // delete [] in_RETIRE_ROB_RE_OLD_USE ; |
---|
| 914 | // delete [] in_RETIRE_ROB_RE_OLD_NUM_REG ; |
---|
| 915 | // delete [] in_RETIRE_ROB_RE_NEW_USE ; |
---|
| 916 | // delete [] in_RETIRE_ROB_RE_NEW_NUM_REG ; |
---|
[60] | 917 | #endif |
---|
| 918 | |
---|
| 919 | delete _Register_unit; |
---|
| 920 | #ifdef STATISTICS |
---|
| 921 | delete _parameters_statistics; |
---|
| 922 | #endif |
---|
| 923 | } |
---|