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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest/src/test.cpp @ 82

Last change on this file since 82 was 82, checked in by rosiere, 16 years ago
support locale (now must "just" translate) update all component with new test format update all component with usage New component : decod queue and prediction_unit
Property svn:keywords set to `Id`
File size: 37.5 KB

Line
1	/*
2	* $Id: test.cpp 82 2008-05-01 16:48:45Z rosiere $
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#define NB_ITERATION 1
10	#define CYCLE_MAX (10240*NB_ITERATION)
11
12	#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest/include/test.h"
13	#include "Common/include/Test.h"
14
15	void test (string name,
16	morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::Parameters * _param)
17	{
18	cout << "<" << name << "> : Simulation SystemC" << endl;
19
20	#ifdef STATISTICS
21	morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
22	#endif
23
24	Register_unit * _Register_unit = new Register_unit
25	(name.c_str(),
26	#ifdef STATISTICS
27	_parameters_statistics,
28	#endif
29	_param,
30	USE_ALL);
31
32	#ifdef SYSTEMC
33	/*********************************************************************
34	* Déclarations des signaux
35	*********************************************************************/
36	sc_clock * in_CLOCK;
37	sc_signal<Tcontrol_t> * in_NRESET;
38
39	// ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
40	sc_signal<Tcontrol_t > ** in_GPR_READ_VAL ;
41	sc_signal<Tcontrol_t > ** out_GPR_READ_ACK ;
42	sc_signal<Tcontext_t > ** in_GPR_READ_OOO_ENGINE_ID ;
43	sc_signal<Tgeneral_address_t> ** in_GPR_READ_NUM_REG ;
44	sc_signal<Tgeneral_data_t > ** out_GPR_READ_DATA ;
45	sc_signal<Tcontrol_t > ** out_GPR_READ_DATA_VAL ;
46
47	// ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
48	sc_signal<Tcontrol_t > ** in_GPR_WRITE_VAL ;
49	sc_signal<Tcontrol_t > ** out_GPR_WRITE_ACK ;
50	sc_signal<Tcontext_t > ** in_GPR_WRITE_OOO_ENGINE_ID ;
51	sc_signal<Tgeneral_address_t> ** in_GPR_WRITE_NUM_REG ;
52	sc_signal<Tgeneral_data_t > ** in_GPR_WRITE_DATA ;
53
54	// ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
55	sc_signal<Tcontrol_t > ** in_SPR_READ_VAL ;
56	sc_signal<Tcontrol_t > ** out_SPR_READ_ACK ;
57	sc_signal<Tcontext_t > ** in_SPR_READ_OOO_ENGINE_ID ;
58	sc_signal<Tspecial_address_t> ** in_SPR_READ_NUM_REG ;
59	sc_signal<Tspecial_data_t > ** out_SPR_READ_DATA ;
60	sc_signal<Tcontrol_t > ** out_SPR_READ_DATA_VAL ;
61
62	// ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
63	sc_signal<Tcontrol_t > ** in_SPR_WRITE_VAL ;
64	sc_signal<Tcontrol_t > ** out_SPR_WRITE_ACK ;
65	sc_signal<Tcontext_t > ** in_SPR_WRITE_OOO_ENGINE_ID ;
66	sc_signal<Tspecial_address_t> ** in_SPR_WRITE_NUM_REG ;
67	sc_signal<Tspecial_data_t > ** in_SPR_WRITE_DATA ;
68
69	// ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
70	sc_signal<Tcontrol_t > *** in_INSERT_ROB_VAL ;
71	sc_signal<Tcontrol_t > *** out_INSERT_ROB_ACK ;
72	sc_signal<Tcontrol_t > *** in_INSERT_ROB_RD_USE ;
73	sc_signal<Tgeneral_address_t> *** in_INSERT_ROB_RD_NUM_REG ; // use=1 : status[num_reg]<- 0
74	sc_signal<Tcontrol_t > *** in_INSERT_ROB_RE_USE ;
75	sc_signal<Tspecial_address_t> *** in_INSERT_ROB_RE_NUM_REG ;
76
77	// ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
78	sc_signal<Tcontrol_t > *** in_RETIRE_ROB_VAL ;
79	sc_signal<Tcontrol_t > *** out_RETIRE_ROB_ACK ;
80	sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RD_OLD_USE ;
81	sc_signal<Tgeneral_address_t> *** in_RETIRE_ROB_RD_OLD_NUM_REG ; // old_use=1 : status[old_num_reg]<- 0
82	sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RD_NEW_USE ;
83	sc_signal<Tgeneral_address_t> *** in_RETIRE_ROB_RD_NEW_NUM_REG ; // new_use=1 : status[new_num_reg]<- 1
84	sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RE_OLD_USE ;
85	sc_signal<Tspecial_address_t> *** in_RETIRE_ROB_RE_OLD_NUM_REG ;
86	sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RE_NEW_USE ;
87	sc_signal<Tspecial_address_t> *** in_RETIRE_ROB_RE_NEW_NUM_REG ;
88
89	string rename = "signal";
90
91	in_CLOCK = new sc_clock ("clock", 1.0, 0.5);
92	in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
93
94
95	// ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
96	in_GPR_READ_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_read];
97	out_GPR_READ_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_read];
98	in_GPR_READ_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_gpr_read];
99	in_GPR_READ_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_gpr_read];
100	out_GPR_READ_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_gpr_read];
101	out_GPR_READ_DATA_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_read];
102
103	for (uint32_t i=0; i<_param->_nb_gpr_read; i++)
104	{
105	in_GPR_READ_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
106	out_GPR_READ_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str());
107	in_GPR_READ_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str());
108	in_GPR_READ_NUM_REG [i]= new sc_signal<Tgeneral_address_t> (rename.c_str());
109	out_GPR_READ_DATA [i]= new sc_signal<Tgeneral_data_t > (rename.c_str());
110	out_GPR_READ_DATA_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
111	}
112
113	// ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
114	in_GPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_write];
115	out_GPR_WRITE_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_write];
116	in_GPR_WRITE_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_gpr_write];
117	in_GPR_WRITE_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_gpr_write];
118	in_GPR_WRITE_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_gpr_write];
119
120	for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
121	{
122	in_GPR_WRITE_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
123	out_GPR_WRITE_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str());
124	in_GPR_WRITE_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str());
125	in_GPR_WRITE_NUM_REG [i]= new sc_signal<Tgeneral_address_t> (rename.c_str());
126	in_GPR_WRITE_DATA [i]= new sc_signal<Tgeneral_data_t > (rename.c_str());
127	}
128
129	// ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
130	in_SPR_READ_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_read];
131	out_SPR_READ_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_spr_read];
132	in_SPR_READ_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_spr_read];
133	in_SPR_READ_NUM_REG = new sc_signal<Tspecial_address_t> * [_param->_nb_spr_read];
134	out_SPR_READ_DATA = new sc_signal<Tspecial_data_t > * [_param->_nb_spr_read];
135	out_SPR_READ_DATA_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_read];
136
137	for (uint32_t i=0; i<_param->_nb_spr_read; i++)
138	{
139	in_SPR_READ_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
140	out_SPR_READ_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str());
141	in_SPR_READ_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str());
142	in_SPR_READ_NUM_REG [i]= new sc_signal<Tspecial_address_t> (rename.c_str());
143	out_SPR_READ_DATA [i]= new sc_signal<Tspecial_data_t > (rename.c_str());
144	out_SPR_READ_DATA_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
145	}
146
147	// ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
148	in_SPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_write];
149	out_SPR_WRITE_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_spr_write];
150	in_SPR_WRITE_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_spr_write];
151	in_SPR_WRITE_NUM_REG = new sc_signal<Tspecial_address_t> * [_param->_nb_spr_write];
152	in_SPR_WRITE_DATA = new sc_signal<Tspecial_data_t > * [_param->_nb_spr_write];
153
154	for (uint32_t i=0; i<_param->_nb_spr_write; i++)
155	{
156	in_SPR_WRITE_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
157	out_SPR_WRITE_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str());
158	in_SPR_WRITE_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str());
159	in_SPR_WRITE_NUM_REG [i]= new sc_signal<Tspecial_address_t> (rename.c_str());
160	in_SPR_WRITE_DATA [i]= new sc_signal<Tspecial_data_t > (rename.c_str());
161	}
162
163	// ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
164	in_INSERT_ROB_VAL = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
165	out_INSERT_ROB_ACK = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
166	in_INSERT_ROB_RD_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
167	in_INSERT_ROB_RD_NUM_REG = new sc_signal<Tgeneral_address_t> ** [_param->_nb_ooo_engine];
168	in_INSERT_ROB_RE_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
169	in_INSERT_ROB_RE_NUM_REG = new sc_signal<Tspecial_address_t> ** [_param->_nb_ooo_engine];
170
171	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
172	{
173	uint32_t x=_param->_nb_inst_insert_rob [i];
174
175	in_INSERT_ROB_VAL [i] = new sc_signal<Tcontrol_t > * [x];
176	out_INSERT_ROB_ACK [i] = new sc_signal<Tcontrol_t > * [x];
177	in_INSERT_ROB_RD_USE [i] = new sc_signal<Tcontrol_t > * [x];
178	in_INSERT_ROB_RD_NUM_REG [i] = new sc_signal<Tgeneral_address_t> * [x];
179	in_INSERT_ROB_RE_USE [i] = new sc_signal<Tcontrol_t > * [x];
180	in_INSERT_ROB_RE_NUM_REG [i] = new sc_signal<Tspecial_address_t> * [x];
181
182	for (uint32_t j=0; j<x; j++)
183	{
184	in_INSERT_ROB_VAL [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
185	out_INSERT_ROB_ACK [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
186	in_INSERT_ROB_RD_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
187	in_INSERT_ROB_RD_NUM_REG [i][j] = new sc_signal<Tgeneral_address_t> (rename.c_str());
188	in_INSERT_ROB_RE_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
189	in_INSERT_ROB_RE_NUM_REG [i][j] = new sc_signal<Tspecial_address_t> (rename.c_str());
190
191	}
192	}
193
194	// ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
195	in_RETIRE_ROB_VAL = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
196	out_RETIRE_ROB_ACK = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
197	in_RETIRE_ROB_RD_OLD_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
198	in_RETIRE_ROB_RD_OLD_NUM_REG = new sc_signal<Tgeneral_address_t> ** [_param->_nb_ooo_engine];
199	in_RETIRE_ROB_RE_OLD_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
200	in_RETIRE_ROB_RE_OLD_NUM_REG = new sc_signal<Tspecial_address_t> ** [_param->_nb_ooo_engine];
201	in_RETIRE_ROB_RD_NEW_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
202	in_RETIRE_ROB_RD_NEW_NUM_REG = new sc_signal<Tgeneral_address_t> ** [_param->_nb_ooo_engine];
203	in_RETIRE_ROB_RE_NEW_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
204	in_RETIRE_ROB_RE_NEW_NUM_REG = new sc_signal<Tspecial_address_t> ** [_param->_nb_ooo_engine];
205
206	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
207	{
208	uint32_t x=_param->_nb_inst_retire_rob [i];
209
210	in_RETIRE_ROB_VAL [i] = new sc_signal<Tcontrol_t > * [x];
211	out_RETIRE_ROB_ACK [i] = new sc_signal<Tcontrol_t > * [x];
212	in_RETIRE_ROB_RD_OLD_USE [i] = new sc_signal<Tcontrol_t > * [x];
213	in_RETIRE_ROB_RD_OLD_NUM_REG [i] = new sc_signal<Tgeneral_address_t> * [x];
214	in_RETIRE_ROB_RE_OLD_USE [i] = new sc_signal<Tcontrol_t > * [x];
215	in_RETIRE_ROB_RE_OLD_NUM_REG [i] = new sc_signal<Tspecial_address_t> * [x];
216	in_RETIRE_ROB_RD_NEW_USE [i] = new sc_signal<Tcontrol_t > * [x];
217	in_RETIRE_ROB_RD_NEW_NUM_REG [i] = new sc_signal<Tgeneral_address_t> * [x];
218	in_RETIRE_ROB_RE_NEW_USE [i] = new sc_signal<Tcontrol_t > * [x];
219	in_RETIRE_ROB_RE_NEW_NUM_REG [i] = new sc_signal<Tspecial_address_t> * [x];
220
221	for (uint32_t j=0; j<x; j++)
222	{
223	in_RETIRE_ROB_VAL [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
224	out_RETIRE_ROB_ACK [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
225	in_RETIRE_ROB_RD_OLD_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
226	in_RETIRE_ROB_RD_OLD_NUM_REG [i][j] = new sc_signal<Tgeneral_address_t> (rename.c_str());
227	in_RETIRE_ROB_RE_OLD_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
228	in_RETIRE_ROB_RE_OLD_NUM_REG [i][j] = new sc_signal<Tspecial_address_t> (rename.c_str());
229	in_RETIRE_ROB_RD_NEW_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
230	in_RETIRE_ROB_RD_NEW_NUM_REG [i][j] = new sc_signal<Tgeneral_address_t> (rename.c_str());
231	in_RETIRE_ROB_RE_NEW_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
232	in_RETIRE_ROB_RE_NEW_NUM_REG [i][j] = new sc_signal<Tspecial_address_t> (rename.c_str());
233	}
234	}
235
236
237	/********************************************************
238	* Instanciation
239	********************************************************/
240
241	cout << "<" << name << "> Instanciation of _Register_unit" << endl;
242
243	((_Register_unit->in_CLOCK)) ((in_CLOCK));
244	((_Register_unit->in_NRESET)) ((in_NRESET));
245
246	for (uint32_t i=0; i<_param->_nb_gpr_read; i++)
247	{
248	((_Register_unit-> in_GPR_READ_VAL [i]))(( in_GPR_READ_VAL [i]));
249	((_Register_unit->out_GPR_READ_ACK [i]))((out_GPR_READ_ACK [i]));
250	if (_param->_have_port_ooo_engine_id == true)
251	((_Register_unit-> in_GPR_READ_OOO_ENGINE_ID [i]))(( in_GPR_READ_OOO_ENGINE_ID [i]));
252	((_Register_unit-> in_GPR_READ_NUM_REG [i]))(( in_GPR_READ_NUM_REG [i]));
253	((_Register_unit->out_GPR_READ_DATA [i]))((out_GPR_READ_DATA [i]));
254	((_Register_unit->out_GPR_READ_DATA_VAL [i]))((out_GPR_READ_DATA_VAL [i]));
255	}
256	for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
257	{
258	((_Register_unit-> in_GPR_WRITE_VAL [i]))(( in_GPR_WRITE_VAL [i]));
259	((_Register_unit->out_GPR_WRITE_ACK [i]))((out_GPR_WRITE_ACK [i]));
260	if (_param->_have_port_ooo_engine_id == true)
261	((_Register_unit-> in_GPR_WRITE_OOO_ENGINE_ID [i]))(( in_GPR_WRITE_OOO_ENGINE_ID [i]));
262	((_Register_unit-> in_GPR_WRITE_NUM_REG [i]))(( in_GPR_WRITE_NUM_REG [i]));
263	((_Register_unit-> in_GPR_WRITE_DATA [i]))(( in_GPR_WRITE_DATA [i]));
264	}
265	for (uint32_t i=0; i<_param->_nb_spr_read; i++)
266	{
267	((_Register_unit-> in_SPR_READ_VAL [i]))(( in_SPR_READ_VAL [i]));
268	((_Register_unit->out_SPR_READ_ACK [i]))((out_SPR_READ_ACK [i]));
269	if (_param->_have_port_ooo_engine_id == true)
270	((_Register_unit-> in_SPR_READ_OOO_ENGINE_ID [i]))(( in_SPR_READ_OOO_ENGINE_ID [i]));
271	((_Register_unit-> in_SPR_READ_NUM_REG [i]))(( in_SPR_READ_NUM_REG [i]));
272	((_Register_unit->out_SPR_READ_DATA [i]))((out_SPR_READ_DATA [i]));
273	((_Register_unit->out_SPR_READ_DATA_VAL [i]))((out_SPR_READ_DATA_VAL [i]));
274	}
275	for (uint32_t i=0; i<_param->_nb_spr_write; i++)
276	{
277	((_Register_unit-> in_SPR_WRITE_VAL [i]))(( in_SPR_WRITE_VAL [i]));
278	((_Register_unit->out_SPR_WRITE_ACK [i]))((out_SPR_WRITE_ACK [i]));
279	if (_param->_have_port_ooo_engine_id == true)
280	((_Register_unit-> in_SPR_WRITE_OOO_ENGINE_ID [i]))(( in_SPR_WRITE_OOO_ENGINE_ID [i]));
281	((_Register_unit-> in_SPR_WRITE_NUM_REG [i]))(( in_SPR_WRITE_NUM_REG [i]));
282	((_Register_unit-> in_SPR_WRITE_DATA [i]))(( in_SPR_WRITE_DATA [i]));
283	}
284	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
285	for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++)
286	{
287	((_Register_unit-> in_INSERT_ROB_VAL [i][j]))(( in_INSERT_ROB_VAL [i][j]));
288	((_Register_unit->out_INSERT_ROB_ACK [i][j]))((out_INSERT_ROB_ACK [i][j]));
289	((_Register_unit-> in_INSERT_ROB_RD_USE [i][j]))(( in_INSERT_ROB_RD_USE [i][j]));
290	((_Register_unit-> in_INSERT_ROB_RD_NUM_REG [i][j]))(( in_INSERT_ROB_RD_NUM_REG [i][j]));
291	((_Register_unit-> in_INSERT_ROB_RE_USE [i][j]))(( in_INSERT_ROB_RE_USE [i][j]));
292	((_Register_unit-> in_INSERT_ROB_RE_NUM_REG [i][j]))(( in_INSERT_ROB_RE_NUM_REG [i][j]));
293	}
294	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
295	for (uint32_t j=0; j<_param->_nb_inst_retire_rob [i]; j++)
296	{
297	((_Register_unit-> in_RETIRE_ROB_VAL [i][j]))(( in_RETIRE_ROB_VAL [i][j]));
298	((_Register_unit->out_RETIRE_ROB_ACK [i][j]))((out_RETIRE_ROB_ACK [i][j]));
299	((_Register_unit-> in_RETIRE_ROB_RD_OLD_USE [i][j]))(( in_RETIRE_ROB_RD_OLD_USE [i][j]));
300	((_Register_unit-> in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]))(( in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]));
301	((_Register_unit-> in_RETIRE_ROB_RE_OLD_USE [i][j]))(( in_RETIRE_ROB_RE_OLD_USE [i][j]));
302	((_Register_unit-> in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]))(( in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]));
303	((_Register_unit-> in_RETIRE_ROB_RD_NEW_USE [i][j]))(( in_RETIRE_ROB_RD_NEW_USE [i][j]));
304	((_Register_unit-> in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]))(( in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]));
305	((_Register_unit-> in_RETIRE_ROB_RE_NEW_USE [i][j]))(( in_RETIRE_ROB_RE_NEW_USE [i][j]));
306	((_Register_unit-> in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]))(( in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]));
307	}
308
309	cout << "<" << name << "> Start Simulation ............" << endl;
310	Time * _time = new Time();
311
312	/********************************************************
313	* Simulation - Begin
314	********************************************************/
315
316	// Initialisation
317	uint32_t max_nb_general_register = 0;
318
319	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
320	if (_param->_nb_general_register [i] > max_nb_general_register)
321	max_nb_general_register = _param->_nb_general_register [i];
322
323	uint32_t max_nb_special_register = 0;
324
325	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
326	if (_param->_nb_special_register [i] > max_nb_special_register)
327	max_nb_special_register = _param->_nb_special_register [i];
328
329	const int32_t percent_transaction_read = 70;
330	const int32_t percent_transaction_write = 70;
331	const int32_t percent_transaction_insert = 70;
332	const int32_t percent_transaction_insert_use = 70;
333	const int32_t percent_transaction_retire = 70;
334	const int32_t percent_transaction_retire_use = 70;
335	const uint32_t nb_request = max_nb_general_register;
336
337	const uint32_t seed = 0;
338	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
339
340	srand(seed);
341
342	Tgeneral_data_t gpr [_param->_nb_ooo_engine][max_nb_general_register];
343	Tcontrol_t gpr_status [_param->_nb_ooo_engine][max_nb_general_register];
344	Tspecial_data_t spr [_param->_nb_ooo_engine][max_nb_special_register];
345	Tcontrol_t spr_status [_param->_nb_ooo_engine][max_nb_special_register];
346
347	SC_START(0);
348
349	LABEL("Initialisation");
350
351	in_NRESET->write(0);
352	SC_START(5);
353	in_NRESET->write(1);
354
355	for (uint32_t i=0; i<_param->_nb_gpr_read ; i++)
356	in_GPR_READ_VAL [i]->write(0);
357	for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
358	in_GPR_WRITE_VAL [i]->write(0);
359	for (uint32_t i=0; i<_param->_nb_spr_read ; i++)
360	in_SPR_READ_VAL [i]->write(0);
361	for (uint32_t i=0; i<_param->_nb_spr_write; i++)
362	in_SPR_WRITE_VAL [i]->write(0);
363	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
364	{
365	for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++)
366	in_INSERT_ROB_VAL [i][j]->write(0);
367	for (uint32_t j=0; j<_param->_nb_inst_retire_rob [i]; j++)
368	in_RETIRE_ROB_VAL [i][j]->write(0);
369	}
370
371	Tgeneral_address_t gpr_address [_param->_nb_gpr_write];
372	Tgeneral_address_t gpr_address_next;
373	uint32_t nb_port_gpr_active; // number of port active
374
375	Tspecial_address_t spr_address [_param->_nb_spr_write];
376	Tspecial_address_t spr_address_next;
377	uint32_t nb_port_spr_active; // number of port active
378
379	LABEL("Loop of Test");
380
381	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
382	{
383	LABEL("Iteration %d",iteration);
384
385	LABEL("(GPR) Write default value");
386
387	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
388	for(uint32_t j=0; j<max_nb_general_register; j++)
389	{
390	gpr [i][j] = rand()%_param->_size_general_data;
391	gpr_status [i][j] = 1;
392	}
393
394	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
395	{
396	gpr_address_next = _param->_nb_gpr_write;
397	nb_port_gpr_active = _param->_nb_gpr_write;
398
399	for (uint32_t j=0; j<_param->_nb_gpr_write; j++)
400	{
401	gpr_address[j] = j;
402	if (j >= _param->_nb_general_register [i])
403	nb_port_gpr_active --;
404	}
405
406	while (nb_port_gpr_active > 0)
407	{
408	for (uint32_t j=0; j<_param->_nb_gpr_write; j++)
409	{
410	in_GPR_WRITE_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and
411	((rand() % 100) < percent_transaction_write));
412	in_GPR_WRITE_OOO_ENGINE_ID [j]->write(i);
413	in_GPR_WRITE_NUM_REG [j]->write(gpr_address[j]);
414	in_GPR_WRITE_DATA [j]->write(gpr [i][gpr_address[j]]);
415	}
416
417	SC_START(1);
418
419	// Test if write
420	for (uint32_t j=0; j<_param->_nb_gpr_write; j++)
421	if (in_GPR_WRITE_VAL [j]->read() and out_GPR_WRITE_ACK [j]->read())
422	{
423	gpr_address[j] = gpr_address_next;
424
425	if (gpr_address_next >= _param->_nb_general_register [i])
426	nb_port_gpr_active --;
427
428	gpr_address_next ++;
429	}
430	}
431	}
432
433	for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
434	in_GPR_WRITE_VAL [i]->write(0);
435
436	LABEL("(GPR) Read - and test data writted");
437
438	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
439	{
440	gpr_address_next = _param->_nb_gpr_read;
441	nb_port_gpr_active = _param->_nb_gpr_read;
442
443	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
444	{
445	gpr_address[j] = j;
446	if (j >= _param->_nb_general_register [i])
447	nb_port_gpr_active --;
448	}
449
450	while (nb_port_gpr_active > 0)
451	{
452	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
453	{
454	in_GPR_READ_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and
455	((rand() % 100) < percent_transaction_read));
456	in_GPR_READ_OOO_ENGINE_ID [j]->write(i);
457	in_GPR_READ_NUM_REG [j]->write(gpr_address[j]);
458	}
459
460	SC_START(1);
461
462	// Test if read
463	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
464	if (in_GPR_READ_VAL [j]->read() and out_GPR_READ_ACK [j]->read())
465	{
466	TEST(Tgeneral_data_t, out_GPR_READ_DATA [j]->read(), gpr [i][gpr_address[j]]);
467	TEST(Tcontrol_t , out_GPR_READ_DATA_VAL[j]->read(), gpr_status [i][gpr_address[j]]);
468
469	gpr_address[j] = gpr_address_next;
470
471	if (gpr_address_next >= _param->_nb_general_register [i])
472	nb_port_gpr_active --;
473
474	gpr_address_next ++;
475	}
476	}
477	}
478
479	for (uint32_t i=0; i<_param->_nb_gpr_read; i++)
480	in_GPR_READ_VAL [i]->write(0);
481
482	LABEL("(SPR) Write default value");
483
484	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
485	for(uint32_t j=0; j<max_nb_special_register; j++)
486	{
487	spr [i][j] = rand()%_param->_size_special_data;
488	spr_status [i][j] = 1;
489	}
490
491	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
492	{
493	spr_address_next = _param->_nb_spr_write;
494	nb_port_spr_active = _param->_nb_spr_write;
495
496	for (uint32_t j=0; j<_param->_nb_spr_write; j++)
497	{
498	spr_address[j] = j;
499	if (j >= _param->_nb_special_register [i])
500	nb_port_spr_active --;
501	}
502
503	while (nb_port_spr_active > 0)
504	{
505	for (uint32_t j=0; j<_param->_nb_spr_write; j++)
506	{
507	in_SPR_WRITE_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and
508	((rand() % 100) < percent_transaction_write));
509	in_SPR_WRITE_OOO_ENGINE_ID [j]->write(i);
510	in_SPR_WRITE_NUM_REG [j]->write(spr_address[j]);
511	in_SPR_WRITE_DATA [j]->write(spr [i][spr_address[j]]);
512	}
513
514	SC_START(1);
515
516	// Test if write
517	for (uint32_t j=0; j<_param->_nb_spr_write; j++)
518	if (in_SPR_WRITE_VAL [j]->read() and out_SPR_WRITE_ACK [j]->read())
519	{
520	spr_address[j] = spr_address_next;
521
522	if (spr_address_next >= _param->_nb_special_register [i])
523	nb_port_spr_active --;
524
525	spr_address_next ++;
526	}
527	}
528	}
529
530	for (uint32_t i=0; i<_param->_nb_spr_write; i++)
531	in_SPR_WRITE_VAL [i]->write(0);
532
533	LABEL("(SPR) Read - and test data writted");
534
535	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
536	{
537	spr_address_next = _param->_nb_spr_read;
538	nb_port_spr_active = _param->_nb_spr_read;
539
540	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
541	{
542	spr_address[j] = j;
543	if (j >= _param->_nb_special_register [i])
544	nb_port_spr_active --;
545	}
546
547	while (nb_port_spr_active > 0)
548	{
549	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
550	{
551	in_SPR_READ_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and
552	((rand() % 100) < percent_transaction_read));
553	in_SPR_READ_OOO_ENGINE_ID [j]->write(i);
554	in_SPR_READ_NUM_REG [j]->write(spr_address[j]);
555	}
556
557	SC_START(1);
558
559	// Test if read
560	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
561	if (in_SPR_READ_VAL [j]->read() and out_SPR_READ_ACK [j]->read())
562	{
563	TEST(Tspecial_data_t, out_SPR_READ_DATA [j]->read(), spr [i][spr_address[j]]);
564	TEST(Tcontrol_t , out_SPR_READ_DATA_VAL[j]->read(), spr_status [i][spr_address[j]]);
565
566	spr_address[j] = spr_address_next;
567
568	if (spr_address_next >= _param->_nb_special_register [i])
569	nb_port_spr_active --;
570
571	spr_address_next ++;
572	}
573	}
574	}
575
576	for (uint32_t i=0; i<_param->_nb_spr_read; i++)
577	in_SPR_READ_VAL [i]->write(0);
578
579	LABEL("insert rob");
580
581	uint32_t cpt = 0;
582
583	while (cpt < nb_request)
584	{
585	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
586	{
587	uint32_t x=_param->_nb_inst_insert_rob [i];
588	for (uint32_t j=0; j<x; j++)
589	{
590	in_INSERT_ROB_VAL [i][j]->write((rand() % 100) < percent_transaction_insert);
591	in_INSERT_ROB_RD_USE [i][j]->write((rand() % 100) < percent_transaction_insert_use);
592	in_INSERT_ROB_RD_NUM_REG [i][j]->write(rand() % _param->_nb_general_register [i]);
593	in_INSERT_ROB_RE_USE [i][j]->write((rand() % 100) < percent_transaction_insert_use);
594	in_INSERT_ROB_RE_NUM_REG [i][j]->write(rand() % _param->_nb_special_register [i]);
595	}
596	}
597
598	SC_START(1);
599
600	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
601	{
602	uint32_t x=_param->_nb_inst_insert_rob [i];
603	for (uint32_t j=0; j<x; j++)
604	{
605	if (in_INSERT_ROB_VAL [i][j]->read() and out_INSERT_ROB_ACK [i][j]->read())
606	{
607	cpt ++;
608
609	if (in_INSERT_ROB_RD_USE [i][j]->read())
610	gpr_status [i][in_INSERT_ROB_RD_NUM_REG [i][j]->read()] = 0;
611
612	if (in_INSERT_ROB_RE_USE [i][j]->read())
613	spr_status [i][in_INSERT_ROB_RE_NUM_REG [i][j]->read()] = 0;
614	}
615	}
616	}
617	}
618	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
619	for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++)
620	in_INSERT_ROB_VAL [i][j]->write(0);
621
622	LABEL("(GPR) Read - and test data writted");
623
624	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
625	{
626	gpr_address_next = _param->_nb_gpr_read;
627	nb_port_gpr_active = _param->_nb_gpr_read;
628
629	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
630	{
631	gpr_address[j] = j;
632	if (j >= _param->_nb_general_register [i])
633	nb_port_gpr_active --;
634	}
635
636	while (nb_port_gpr_active > 0)
637	{
638	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
639	{
640	in_GPR_READ_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and
641	((rand() % 100) < percent_transaction_read));
642	in_GPR_READ_OOO_ENGINE_ID [j]->write(i);
643	in_GPR_READ_NUM_REG [j]->write(gpr_address[j]);
644	}
645
646	SC_START(1);
647
648	// Test if read
649	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
650	if (in_GPR_READ_VAL [j]->read() and out_GPR_READ_ACK [j]->read())
651	{
652	TEST(Tgeneral_data_t, out_GPR_READ_DATA [j]->read(), gpr [i][gpr_address[j]]);
653	TEST(Tcontrol_t , out_GPR_READ_DATA_VAL[j]->read(), gpr_status [i][gpr_address[j]]);
654
655	gpr_address[j] = gpr_address_next;
656
657	if (gpr_address_next >= _param->_nb_general_register [i])
658	nb_port_gpr_active --;
659
660	gpr_address_next ++;
661	}
662	}
663	}
664
665	for (uint32_t i=0; i<_param->_nb_gpr_read; i++)
666	in_GPR_READ_VAL [i]->write(0);
667
668	LABEL("(SPR) Read - and test data writted");
669
670	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
671	{
672	spr_address_next = _param->_nb_spr_read;
673	nb_port_spr_active = _param->_nb_spr_read;
674
675	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
676	{
677	spr_address[j] = j;
678	if (j >= _param->_nb_special_register [i])
679	nb_port_spr_active --;
680	}
681
682	while (nb_port_spr_active > 0)
683	{
684	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
685	{
686	in_SPR_READ_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and
687	((rand() % 100) < percent_transaction_read));
688	in_SPR_READ_OOO_ENGINE_ID [j]->write(i);
689	in_SPR_READ_NUM_REG [j]->write(spr_address[j]);
690	}
691
692	SC_START(1);
693
694	// Test if read
695	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
696	if (in_SPR_READ_VAL [j]->read() and out_SPR_READ_ACK [j]->read())
697	{
698	TEST(Tspecial_data_t, out_SPR_READ_DATA [j]->read(), spr [i][spr_address[j]]);
699	TEST(Tcontrol_t , out_SPR_READ_DATA_VAL[j]->read(), spr_status [i][spr_address[j]]);
700
701	spr_address[j] = spr_address_next;
702
703	if (spr_address_next >= _param->_nb_special_register [i])
704	nb_port_spr_active --;
705
706	spr_address_next ++;
707	}
708	}
709	}
710
711	LABEL("retire rob");
712
713	cpt = 0;
714
715	while (cpt < nb_request)
716	{
717	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
718	{
719	uint32_t x=_param->_nb_inst_retire_rob [i];
720	for (uint32_t j=0; j<x; j++)
721	{
722	in_RETIRE_ROB_VAL [i][j]->write((rand() % 100) < percent_transaction_retire);
723	in_RETIRE_ROB_RD_OLD_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use);
724	in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]->write(rand() % _param->_nb_general_register [i]);
725	in_RETIRE_ROB_RD_NEW_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use);
726	in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]->write(rand() % _param->_nb_general_register [i]);
727	in_RETIRE_ROB_RE_OLD_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use);
728	in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]->write(rand() % _param->_nb_special_register [i]);
729	in_RETIRE_ROB_RE_NEW_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use);
730	in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]->write(rand() % _param->_nb_special_register [i]);
731	}
732	}
733
734	SC_START(1);
735
736	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
737	{
738	uint32_t x=_param->_nb_inst_retire_rob [i];
739	for (uint32_t j=0; j<x; j++)
740	{
741	if (in_RETIRE_ROB_VAL [i][j]->read() and out_RETIRE_ROB_ACK [i][j]->read())
742	{
743	cpt ++;
744
745	if (in_RETIRE_ROB_RD_OLD_USE [i][j]->read())
746	gpr_status [i][in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]->read()] = 0;
747	if (in_RETIRE_ROB_RD_NEW_USE [i][j]->read())
748	gpr_status [i][in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]->read()] = 1;
749	if (in_RETIRE_ROB_RE_OLD_USE [i][j]->read())
750	spr_status [i][in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]->read()] = 0;
751	if (in_RETIRE_ROB_RE_NEW_USE [i][j]->read())
752	spr_status [i][in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]->read()] = 1;
753	}
754	}
755	}
756	}
757	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
758	for (uint32_t j=0; j<_param->_nb_inst_retire_rob [i]; j++)
759	in_RETIRE_ROB_VAL [i][j]->write(0);
760
761	LABEL("(GPR) Read - and test data writted");
762
763	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
764	{
765	gpr_address_next = _param->_nb_gpr_read;
766	nb_port_gpr_active = _param->_nb_gpr_read;
767
768	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
769	{
770	gpr_address[j] = j;
771	if (j >= _param->_nb_general_register [i])
772	nb_port_gpr_active --;
773	}
774
775	while (nb_port_gpr_active > 0)
776	{
777	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
778	{
779	in_GPR_READ_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and
780	((rand() % 100) < percent_transaction_read));
781	in_GPR_READ_OOO_ENGINE_ID [j]->write(i);
782	in_GPR_READ_NUM_REG [j]->write(gpr_address[j]);
783	}
784
785	SC_START(1);
786
787	// Test if read
788	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
789	if (in_GPR_READ_VAL [j]->read() and out_GPR_READ_ACK [j]->read())
790	{
791	TEST(Tgeneral_data_t, out_GPR_READ_DATA [j]->read(), gpr [i][gpr_address[j]]);
792	TEST(Tcontrol_t , out_GPR_READ_DATA_VAL[j]->read(), gpr_status [i][gpr_address[j]]);
793
794	gpr_address[j] = gpr_address_next;
795
796	if (gpr_address_next >= _param->_nb_general_register [i])
797	nb_port_gpr_active --;
798
799	gpr_address_next ++;
800	}
801	}
802	}
803
804	for (uint32_t i=0; i<_param->_nb_gpr_read; i++)
805	in_GPR_READ_VAL [i]->write(0);
806
807	LABEL("(SPR) Read - and test data writted");
808
809	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
810	{
811	spr_address_next = _param->_nb_spr_read;
812	nb_port_spr_active = _param->_nb_spr_read;
813
814	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
815	{
816	spr_address[j] = j;
817	if (j >= _param->_nb_special_register [i])
818	nb_port_spr_active --;
819	}
820
821	while (nb_port_spr_active > 0)
822	{
823	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
824	{
825	in_SPR_READ_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and
826	((rand() % 100) < percent_transaction_read));
827	in_SPR_READ_OOO_ENGINE_ID [j]->write(i);
828	in_SPR_READ_NUM_REG [j]->write(spr_address[j]);
829	}
830
831	SC_START(1);
832
833	// Test if read
834	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
835	if (in_SPR_READ_VAL [j]->read() and out_SPR_READ_ACK [j]->read())
836	{
837	TEST(Tspecial_data_t, out_SPR_READ_DATA [j]->read(), spr [i][spr_address[j]]);
838	TEST(Tcontrol_t , out_SPR_READ_DATA_VAL[j]->read(), spr_status [i][spr_address[j]]);
839
840	spr_address[j] = spr_address_next;
841
842	if (spr_address_next >= _param->_nb_special_register [i])
843	nb_port_spr_active --;
844
845	spr_address_next ++;
846	}
847	}
848	}
849
850	}
851
852	/********************************************************
853	* Simulation - End
854	********************************************************/
855
856	TEST_OK ("End of Simulation");
857	delete _time;
858	cout << "<" << name << "> ............ Stop Simulation" << endl;
859
860	delete in_CLOCK;
861	delete in_NRESET;
862
863	delete [] in_GPR_READ_VAL ;
864	delete [] out_GPR_READ_ACK ;
865	delete [] in_GPR_READ_OOO_ENGINE_ID ;
866	delete [] in_GPR_READ_NUM_REG ;
867	delete [] out_GPR_READ_DATA ;
868	delete [] out_GPR_READ_DATA_VAL ;
869	delete [] in_GPR_WRITE_VAL ;
870	delete [] out_GPR_WRITE_ACK ;
871	delete [] in_GPR_WRITE_OOO_ENGINE_ID ;
872	delete [] in_GPR_WRITE_NUM_REG ;
873	delete [] in_GPR_WRITE_DATA ;
874	delete [] in_SPR_READ_VAL ;
875	delete [] out_SPR_READ_ACK ;
876	delete [] in_SPR_READ_OOO_ENGINE_ID ;
877	delete [] in_SPR_READ_NUM_REG ;
878	delete [] out_SPR_READ_DATA ;
879	delete [] out_SPR_READ_DATA_VAL ;
880	delete [] in_SPR_WRITE_VAL ;
881	delete [] out_SPR_WRITE_ACK ;
882	delete [] in_SPR_WRITE_OOO_ENGINE_ID ;
883	delete [] in_SPR_WRITE_NUM_REG ;
884	delete [] in_SPR_WRITE_DATA ;
885	delete [] in_INSERT_ROB_VAL ;
886	delete [] out_INSERT_ROB_ACK ;
887	delete [] in_INSERT_ROB_RD_USE ;
888	delete [] in_INSERT_ROB_RD_NUM_REG ;
889	delete [] in_INSERT_ROB_RE_USE ;
890	delete [] in_INSERT_ROB_RE_NUM_REG ;
891	delete [] in_RETIRE_ROB_VAL ;
892	delete [] out_RETIRE_ROB_ACK ;
893	delete [] in_RETIRE_ROB_RD_OLD_USE ;
894	delete [] in_RETIRE_ROB_RD_OLD_NUM_REG ;
895	delete [] in_RETIRE_ROB_RD_NEW_USE ;
896	delete [] in_RETIRE_ROB_RD_NEW_NUM_REG ;
897	delete [] in_RETIRE_ROB_RE_OLD_USE ;
898	delete [] in_RETIRE_ROB_RE_OLD_NUM_REG ;
899	delete [] in_RETIRE_ROB_RE_NEW_USE ;
900	delete [] in_RETIRE_ROB_RE_NEW_NUM_REG ;
901	#endif
902
903	delete _Register_unit;
904	#ifdef STATISTICS
905	delete _parameters_statistics;
906	#endif
907	}

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