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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest/src/test.cpp @ 65

Last change on this file since 65 was 65, checked in by rosiere, 17 years ago
register_unit : systemc et VHDL ok
File size: 39.2 KB

Line
1	/*
2	* $Id$
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest/include/test.h"
10	#include "Common/include/Test.h"
11
12	#define NB_ITERATION 1
13	#define CYCLE_MAX (10240*NB_ITERATION)
14
15	#define LABEL(str) \
16	{ \
17	cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} " << str << endl; \
18	} while(0)
19
20	static uint32_t cycle = 0;
21
22	#define SC_START(cycle_offset) \
23	do \
24	{ \
25	/cout << "SC_START (begin)" << endl;/ \
26	\
27	uint32_t cycle_current = static_cast<uint32_t>(sc_simulation_time()); \
28	if (cycle_current != cycle) \
29	{ \
30	cycle = cycle_current; \
31	cout << "##########[ cycle "<< cycle << " ]" << endl; \
32	} \
33	\
34	if (cycle_current > CYCLE_MAX) \
35	{ \
36	TEST_KO("Maximal cycles Reached"); \
37	} \
38	sc_start(cycle_offset); \
39	/cout << "SC_START (end )" << endl;/ \
40	} while(0)
41
42	void test (string name,
43	morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::Parameters * _param)
44	{
45	cout << "<" << name << "> : Simulation SystemC" << endl;
46
47	#ifdef STATISTICS
48	morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
49	#endif
50
51	Register_unit * _Register_unit = new Register_unit (name.c_str(),
52	#ifdef STATISTICS
53	_parameters_statistics,
54	#endif
55	_param);
56
57	#ifdef SYSTEMC
58	/*********************************************************************
59	* Déclarations des signaux
60	*********************************************************************/
61	sc_clock * in_CLOCK;
62	sc_signal<Tcontrol_t> * in_NRESET;
63
64	// ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
65	sc_signal<Tcontrol_t > ** in_GPR_READ_VAL ;
66	sc_signal<Tcontrol_t > ** out_GPR_READ_ACK ;
67	sc_signal<Tcontext_t > ** in_GPR_READ_OOO_ENGINE_ID ;
68	sc_signal<Tgeneral_address_t> ** in_GPR_READ_NUM_REG ;
69	sc_signal<Tgeneral_data_t > ** out_GPR_READ_DATA ;
70	sc_signal<Tcontrol_t > ** out_GPR_READ_DATA_VAL ;
71
72	// ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
73	sc_signal<Tcontrol_t > ** in_GPR_WRITE_VAL ;
74	sc_signal<Tcontrol_t > ** out_GPR_WRITE_ACK ;
75	sc_signal<Tcontext_t > ** in_GPR_WRITE_OOO_ENGINE_ID ;
76	sc_signal<Tgeneral_address_t> ** in_GPR_WRITE_NUM_REG ;
77	sc_signal<Tgeneral_data_t > ** in_GPR_WRITE_DATA ;
78
79	// ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
80	sc_signal<Tcontrol_t > ** in_SPR_READ_VAL ;
81	sc_signal<Tcontrol_t > ** out_SPR_READ_ACK ;
82	sc_signal<Tcontext_t > ** in_SPR_READ_OOO_ENGINE_ID ;
83	sc_signal<Tspecial_address_t> ** in_SPR_READ_NUM_REG ;
84	sc_signal<Tspecial_data_t > ** out_SPR_READ_DATA ;
85	sc_signal<Tcontrol_t > ** out_SPR_READ_DATA_VAL ;
86
87	// ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
88	sc_signal<Tcontrol_t > ** in_SPR_WRITE_VAL ;
89	sc_signal<Tcontrol_t > ** out_SPR_WRITE_ACK ;
90	sc_signal<Tcontext_t > ** in_SPR_WRITE_OOO_ENGINE_ID ;
91	sc_signal<Tspecial_address_t> ** in_SPR_WRITE_NUM_REG ;
92	sc_signal<Tspecial_data_t > ** in_SPR_WRITE_DATA ;
93
94	// ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
95	sc_signal<Tcontrol_t > *** in_INSERT_ROB_VAL ;
96	sc_signal<Tcontrol_t > *** out_INSERT_ROB_ACK ;
97	sc_signal<Tcontrol_t > *** in_INSERT_ROB_RD_USE ;
98	sc_signal<Tgeneral_address_t> *** in_INSERT_ROB_RD_NUM_REG ; // use=1 : status[num_reg]<- 0
99	sc_signal<Tcontrol_t > *** in_INSERT_ROB_RE_USE ;
100	sc_signal<Tspecial_address_t> *** in_INSERT_ROB_RE_NUM_REG ;
101
102	// ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
103	sc_signal<Tcontrol_t > *** in_RETIRE_ROB_VAL ;
104	sc_signal<Tcontrol_t > *** out_RETIRE_ROB_ACK ;
105	sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RD_OLD_USE ;
106	sc_signal<Tgeneral_address_t> *** in_RETIRE_ROB_RD_OLD_NUM_REG ; // old_use=1 : status[old_num_reg]<- 0
107	sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RD_NEW_USE ;
108	sc_signal<Tgeneral_address_t> *** in_RETIRE_ROB_RD_NEW_NUM_REG ; // new_use=1 : status[new_num_reg]<- 1
109	sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RE_OLD_USE ;
110	sc_signal<Tspecial_address_t> *** in_RETIRE_ROB_RE_OLD_NUM_REG ;
111	sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RE_NEW_USE ;
112	sc_signal<Tspecial_address_t> *** in_RETIRE_ROB_RE_NEW_NUM_REG ;
113
114	string rename = "signal";
115
116	in_CLOCK = new sc_clock ("clock", 1.0, 0.5);
117	in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
118
119
120	// ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
121	in_GPR_READ_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_read];
122	out_GPR_READ_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_read];
123	in_GPR_READ_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_gpr_read];
124	in_GPR_READ_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_gpr_read];
125	out_GPR_READ_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_gpr_read];
126	out_GPR_READ_DATA_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_read];
127
128	for (uint32_t i=0; i<_param->_nb_gpr_read; i++)
129	{
130	in_GPR_READ_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
131	out_GPR_READ_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str());
132	in_GPR_READ_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str());
133	in_GPR_READ_NUM_REG [i]= new sc_signal<Tgeneral_address_t> (rename.c_str());
134	out_GPR_READ_DATA [i]= new sc_signal<Tgeneral_data_t > (rename.c_str());
135	out_GPR_READ_DATA_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
136	}
137
138	// ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
139	in_GPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_write];
140	out_GPR_WRITE_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_write];
141	in_GPR_WRITE_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_gpr_write];
142	in_GPR_WRITE_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_gpr_write];
143	in_GPR_WRITE_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_gpr_write];
144
145	for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
146	{
147	in_GPR_WRITE_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
148	out_GPR_WRITE_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str());
149	in_GPR_WRITE_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str());
150	in_GPR_WRITE_NUM_REG [i]= new sc_signal<Tgeneral_address_t> (rename.c_str());
151	in_GPR_WRITE_DATA [i]= new sc_signal<Tgeneral_data_t > (rename.c_str());
152	}
153
154	// ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
155	in_SPR_READ_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_read];
156	out_SPR_READ_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_spr_read];
157	in_SPR_READ_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_spr_read];
158	in_SPR_READ_NUM_REG = new sc_signal<Tspecial_address_t> * [_param->_nb_spr_read];
159	out_SPR_READ_DATA = new sc_signal<Tspecial_data_t > * [_param->_nb_spr_read];
160	out_SPR_READ_DATA_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_read];
161
162	for (uint32_t i=0; i<_param->_nb_spr_read; i++)
163	{
164	in_SPR_READ_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
165	out_SPR_READ_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str());
166	in_SPR_READ_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str());
167	in_SPR_READ_NUM_REG [i]= new sc_signal<Tspecial_address_t> (rename.c_str());
168	out_SPR_READ_DATA [i]= new sc_signal<Tspecial_data_t > (rename.c_str());
169	out_SPR_READ_DATA_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
170	}
171
172	// ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
173	in_SPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_write];
174	out_SPR_WRITE_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_spr_write];
175	in_SPR_WRITE_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_spr_write];
176	in_SPR_WRITE_NUM_REG = new sc_signal<Tspecial_address_t> * [_param->_nb_spr_write];
177	in_SPR_WRITE_DATA = new sc_signal<Tspecial_data_t > * [_param->_nb_spr_write];
178
179	for (uint32_t i=0; i<_param->_nb_spr_write; i++)
180	{
181	in_SPR_WRITE_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
182	out_SPR_WRITE_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str());
183	in_SPR_WRITE_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str());
184	in_SPR_WRITE_NUM_REG [i]= new sc_signal<Tspecial_address_t> (rename.c_str());
185	in_SPR_WRITE_DATA [i]= new sc_signal<Tspecial_data_t > (rename.c_str());
186	}
187
188	// ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
189	in_INSERT_ROB_VAL = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
190	out_INSERT_ROB_ACK = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
191	in_INSERT_ROB_RD_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
192	in_INSERT_ROB_RD_NUM_REG = new sc_signal<Tgeneral_address_t> ** [_param->_nb_ooo_engine];
193	in_INSERT_ROB_RE_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
194	in_INSERT_ROB_RE_NUM_REG = new sc_signal<Tspecial_address_t> ** [_param->_nb_ooo_engine];
195
196	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
197	{
198	uint32_t x=_param->_nb_inst_insert_rob [i];
199
200	in_INSERT_ROB_VAL [i] = new sc_signal<Tcontrol_t > * [x];
201	out_INSERT_ROB_ACK [i] = new sc_signal<Tcontrol_t > * [x];
202	in_INSERT_ROB_RD_USE [i] = new sc_signal<Tcontrol_t > * [x];
203	in_INSERT_ROB_RD_NUM_REG [i] = new sc_signal<Tgeneral_address_t> * [x];
204	in_INSERT_ROB_RE_USE [i] = new sc_signal<Tcontrol_t > * [x];
205	in_INSERT_ROB_RE_NUM_REG [i] = new sc_signal<Tspecial_address_t> * [x];
206
207	for (uint32_t j=0; j<x; j++)
208	{
209	in_INSERT_ROB_VAL [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
210	out_INSERT_ROB_ACK [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
211	in_INSERT_ROB_RD_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
212	in_INSERT_ROB_RD_NUM_REG [i][j] = new sc_signal<Tgeneral_address_t> (rename.c_str());
213	in_INSERT_ROB_RE_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
214	in_INSERT_ROB_RE_NUM_REG [i][j] = new sc_signal<Tspecial_address_t> (rename.c_str());
215
216	}
217	}
218
219	// ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
220	in_RETIRE_ROB_VAL = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
221	out_RETIRE_ROB_ACK = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
222	in_RETIRE_ROB_RD_OLD_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
223	in_RETIRE_ROB_RD_OLD_NUM_REG = new sc_signal<Tgeneral_address_t> ** [_param->_nb_ooo_engine];
224	in_RETIRE_ROB_RE_OLD_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
225	in_RETIRE_ROB_RE_OLD_NUM_REG = new sc_signal<Tspecial_address_t> ** [_param->_nb_ooo_engine];
226	in_RETIRE_ROB_RD_NEW_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
227	in_RETIRE_ROB_RD_NEW_NUM_REG = new sc_signal<Tgeneral_address_t> ** [_param->_nb_ooo_engine];
228	in_RETIRE_ROB_RE_NEW_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
229	in_RETIRE_ROB_RE_NEW_NUM_REG = new sc_signal<Tspecial_address_t> ** [_param->_nb_ooo_engine];
230
231	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
232	{
233	uint32_t x=_param->_nb_inst_retire_rob [i];
234
235	in_RETIRE_ROB_VAL [i] = new sc_signal<Tcontrol_t > * [x];
236	out_RETIRE_ROB_ACK [i] = new sc_signal<Tcontrol_t > * [x];
237	in_RETIRE_ROB_RD_OLD_USE [i] = new sc_signal<Tcontrol_t > * [x];
238	in_RETIRE_ROB_RD_OLD_NUM_REG [i] = new sc_signal<Tgeneral_address_t> * [x];
239	in_RETIRE_ROB_RE_OLD_USE [i] = new sc_signal<Tcontrol_t > * [x];
240	in_RETIRE_ROB_RE_OLD_NUM_REG [i] = new sc_signal<Tspecial_address_t> * [x];
241	in_RETIRE_ROB_RD_NEW_USE [i] = new sc_signal<Tcontrol_t > * [x];
242	in_RETIRE_ROB_RD_NEW_NUM_REG [i] = new sc_signal<Tgeneral_address_t> * [x];
243	in_RETIRE_ROB_RE_NEW_USE [i] = new sc_signal<Tcontrol_t > * [x];
244	in_RETIRE_ROB_RE_NEW_NUM_REG [i] = new sc_signal<Tspecial_address_t> * [x];
245
246	for (uint32_t j=0; j<x; j++)
247	{
248	in_RETIRE_ROB_VAL [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
249	out_RETIRE_ROB_ACK [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
250	in_RETIRE_ROB_RD_OLD_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
251	in_RETIRE_ROB_RD_OLD_NUM_REG [i][j] = new sc_signal<Tgeneral_address_t> (rename.c_str());
252	in_RETIRE_ROB_RE_OLD_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
253	in_RETIRE_ROB_RE_OLD_NUM_REG [i][j] = new sc_signal<Tspecial_address_t> (rename.c_str());
254	in_RETIRE_ROB_RD_NEW_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
255	in_RETIRE_ROB_RD_NEW_NUM_REG [i][j] = new sc_signal<Tgeneral_address_t> (rename.c_str());
256	in_RETIRE_ROB_RE_NEW_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
257	in_RETIRE_ROB_RE_NEW_NUM_REG [i][j] = new sc_signal<Tspecial_address_t> (rename.c_str());
258	}
259	}
260
261
262	/********************************************************
263	* Instanciation
264	********************************************************/
265
266	cout << "<" << name << "> Instanciation of _Register_unit" << endl;
267
268	((_Register_unit->in_CLOCK)) ((in_CLOCK));
269	((_Register_unit->in_NRESET)) ((in_NRESET));
270
271	for (uint32_t i=0; i<_param->_nb_gpr_read; i++)
272	{
273	((_Register_unit-> in_GPR_READ_VAL [i]))(( in_GPR_READ_VAL [i]));
274	((_Register_unit->out_GPR_READ_ACK [i]))((out_GPR_READ_ACK [i]));
275	if (_param->_have_port_ooo_engine_id == true)
276	((_Register_unit-> in_GPR_READ_OOO_ENGINE_ID [i]))(( in_GPR_READ_OOO_ENGINE_ID [i]));
277	((_Register_unit-> in_GPR_READ_NUM_REG [i]))(( in_GPR_READ_NUM_REG [i]));
278	((_Register_unit->out_GPR_READ_DATA [i]))((out_GPR_READ_DATA [i]));
279	((_Register_unit->out_GPR_READ_DATA_VAL [i]))((out_GPR_READ_DATA_VAL [i]));
280	}
281	for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
282	{
283	((_Register_unit-> in_GPR_WRITE_VAL [i]))(( in_GPR_WRITE_VAL [i]));
284	((_Register_unit->out_GPR_WRITE_ACK [i]))((out_GPR_WRITE_ACK [i]));
285	if (_param->_have_port_ooo_engine_id == true)
286	((_Register_unit-> in_GPR_WRITE_OOO_ENGINE_ID [i]))(( in_GPR_WRITE_OOO_ENGINE_ID [i]));
287	((_Register_unit-> in_GPR_WRITE_NUM_REG [i]))(( in_GPR_WRITE_NUM_REG [i]));
288	((_Register_unit-> in_GPR_WRITE_DATA [i]))(( in_GPR_WRITE_DATA [i]));
289	}
290	for (uint32_t i=0; i<_param->_nb_spr_read; i++)
291	{
292	((_Register_unit-> in_SPR_READ_VAL [i]))(( in_SPR_READ_VAL [i]));
293	((_Register_unit->out_SPR_READ_ACK [i]))((out_SPR_READ_ACK [i]));
294	if (_param->_have_port_ooo_engine_id == true)
295	((_Register_unit-> in_SPR_READ_OOO_ENGINE_ID [i]))(( in_SPR_READ_OOO_ENGINE_ID [i]));
296	((_Register_unit-> in_SPR_READ_NUM_REG [i]))(( in_SPR_READ_NUM_REG [i]));
297	((_Register_unit->out_SPR_READ_DATA [i]))((out_SPR_READ_DATA [i]));
298	((_Register_unit->out_SPR_READ_DATA_VAL [i]))((out_SPR_READ_DATA_VAL [i]));
299	}
300	for (uint32_t i=0; i<_param->_nb_spr_write; i++)
301	{
302	((_Register_unit-> in_SPR_WRITE_VAL [i]))(( in_SPR_WRITE_VAL [i]));
303	((_Register_unit->out_SPR_WRITE_ACK [i]))((out_SPR_WRITE_ACK [i]));
304	if (_param->_have_port_ooo_engine_id == true)
305	((_Register_unit-> in_SPR_WRITE_OOO_ENGINE_ID [i]))(( in_SPR_WRITE_OOO_ENGINE_ID [i]));
306	((_Register_unit-> in_SPR_WRITE_NUM_REG [i]))(( in_SPR_WRITE_NUM_REG [i]));
307	((_Register_unit-> in_SPR_WRITE_DATA [i]))(( in_SPR_WRITE_DATA [i]));
308	}
309	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
310	for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++)
311	{
312	((_Register_unit-> in_INSERT_ROB_VAL [i][j]))(( in_INSERT_ROB_VAL [i][j]));
313	((_Register_unit->out_INSERT_ROB_ACK [i][j]))((out_INSERT_ROB_ACK [i][j]));
314	((_Register_unit-> in_INSERT_ROB_RD_USE [i][j]))(( in_INSERT_ROB_RD_USE [i][j]));
315	((_Register_unit-> in_INSERT_ROB_RD_NUM_REG [i][j]))(( in_INSERT_ROB_RD_NUM_REG [i][j]));
316	((_Register_unit-> in_INSERT_ROB_RE_USE [i][j]))(( in_INSERT_ROB_RE_USE [i][j]));
317	((_Register_unit-> in_INSERT_ROB_RE_NUM_REG [i][j]))(( in_INSERT_ROB_RE_NUM_REG [i][j]));
318	}
319	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
320	for (uint32_t j=0; j<_param->_nb_inst_retire_rob [i]; j++)
321	{
322	((_Register_unit-> in_RETIRE_ROB_VAL [i][j]))(( in_RETIRE_ROB_VAL [i][j]));
323	((_Register_unit->out_RETIRE_ROB_ACK [i][j]))((out_RETIRE_ROB_ACK [i][j]));
324	((_Register_unit-> in_RETIRE_ROB_RD_OLD_USE [i][j]))(( in_RETIRE_ROB_RD_OLD_USE [i][j]));
325	((_Register_unit-> in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]))(( in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]));
326	((_Register_unit-> in_RETIRE_ROB_RE_OLD_USE [i][j]))(( in_RETIRE_ROB_RE_OLD_USE [i][j]));
327	((_Register_unit-> in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]))(( in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]));
328	((_Register_unit-> in_RETIRE_ROB_RD_NEW_USE [i][j]))(( in_RETIRE_ROB_RD_NEW_USE [i][j]));
329	((_Register_unit-> in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]))(( in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]));
330	((_Register_unit-> in_RETIRE_ROB_RE_NEW_USE [i][j]))(( in_RETIRE_ROB_RE_NEW_USE [i][j]));
331	((_Register_unit-> in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]))(( in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]));
332	}
333
334	cout << "<" << name << "> Start Simulation ............" << endl;
335	Time * _time = new Time();
336
337	/********************************************************
338	* Simulation - Begin
339	********************************************************/
340
341	// Initialisation
342	uint32_t max_nb_general_register = 0;
343
344	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
345	if (_param->_nb_general_register [i] > max_nb_general_register)
346	max_nb_general_register = _param->_nb_general_register [i];
347
348	uint32_t max_nb_special_register = 0;
349
350	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
351	if (_param->_nb_special_register [i] > max_nb_special_register)
352	max_nb_special_register = _param->_nb_special_register [i];
353
354	const int32_t percent_transaction_read = 70;
355	const int32_t percent_transaction_write = 70;
356	const int32_t percent_transaction_insert = 70;
357	const int32_t percent_transaction_insert_use = 70;
358	const int32_t percent_transaction_retire = 70;
359	const int32_t percent_transaction_retire_use = 70;
360	const uint32_t nb_request = max_nb_general_register;
361
362	const uint32_t seed = 0;
363	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
364
365	srand(seed);
366
367	Tgeneral_data_t gpr [_param->_nb_ooo_engine][max_nb_general_register];
368	Tcontrol_t gpr_status [_param->_nb_ooo_engine][max_nb_general_register];
369	Tspecial_data_t spr [_param->_nb_ooo_engine][max_nb_special_register];
370	Tcontrol_t spr_status [_param->_nb_ooo_engine][max_nb_special_register];
371
372	SC_START(0);
373
374	LABEL("Initialisation");
375
376	in_NRESET->write(0);
377	SC_START(5);
378	in_NRESET->write(1);
379
380	for (uint32_t i=0; i<_param->_nb_gpr_read ; i++)
381	in_GPR_READ_VAL [i]->write(0);
382	for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
383	in_GPR_WRITE_VAL [i]->write(0);
384	for (uint32_t i=0; i<_param->_nb_spr_read ; i++)
385	in_SPR_READ_VAL [i]->write(0);
386	for (uint32_t i=0; i<_param->_nb_spr_write; i++)
387	in_SPR_WRITE_VAL [i]->write(0);
388	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
389	{
390	for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++)
391	in_INSERT_ROB_VAL [i][j]->write(0);
392	for (uint32_t j=0; j<_param->_nb_inst_retire_rob [i]; j++)
393	in_RETIRE_ROB_VAL [i][j]->write(0);
394	}
395
396	Tgeneral_address_t gpr_address [_param->_nb_gpr_write];
397	Tgeneral_address_t gpr_address_next;
398	uint32_t nb_port_gpr_active; // number of port active
399
400	Tspecial_address_t spr_address [_param->_nb_spr_write];
401	Tspecial_address_t spr_address_next;
402	uint32_t nb_port_spr_active; // number of port active
403
404	LABEL("Loop of Test");
405
406	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
407	{
408	LABEL("Iteration "+toString(iteration));
409
410	LABEL("(GPR) Write default value");
411
412	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
413	for(uint32_t j=0; j<max_nb_general_register; j++)
414	{
415	gpr [i][j] = rand()%_param->_size_general_data;
416	gpr_status [i][j] = 1;
417	}
418
419	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
420	{
421	gpr_address_next = _param->_nb_gpr_write;
422	nb_port_gpr_active = _param->_nb_gpr_write;
423
424	for (uint32_t j=0; j<_param->_nb_gpr_write; j++)
425	{
426	gpr_address[j] = j;
427	if (j >= _param->_nb_general_register [i])
428	nb_port_gpr_active --;
429	}
430
431	while (nb_port_gpr_active > 0)
432	{
433	for (uint32_t j=0; j<_param->_nb_gpr_write; j++)
434	{
435	in_GPR_WRITE_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and
436	((rand() % 100) < percent_transaction_write));
437	in_GPR_WRITE_OOO_ENGINE_ID [j]->write(i);
438	in_GPR_WRITE_NUM_REG [j]->write(gpr_address[j]);
439	in_GPR_WRITE_DATA [j]->write(gpr [i][gpr_address[j]]);
440	}
441
442	SC_START(1);
443
444	// Test if write
445	for (uint32_t j=0; j<_param->_nb_gpr_write; j++)
446	if (in_GPR_WRITE_VAL [j]->read() and out_GPR_WRITE_ACK [j]->read())
447	{
448	gpr_address[j] = gpr_address_next;
449
450	if (gpr_address_next >= _param->_nb_general_register [i])
451	nb_port_gpr_active --;
452
453	gpr_address_next ++;
454	}
455	}
456	}
457
458	for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
459	in_GPR_WRITE_VAL [i]->write(0);
460
461	LABEL("(GPR) Read - and test data writted");
462
463	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
464	{
465	gpr_address_next = _param->_nb_gpr_read;
466	nb_port_gpr_active = _param->_nb_gpr_read;
467
468	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
469	{
470	gpr_address[j] = j;
471	if (j >= _param->_nb_general_register [i])
472	nb_port_gpr_active --;
473	}
474
475	while (nb_port_gpr_active > 0)
476	{
477	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
478	{
479	in_GPR_READ_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and
480	((rand() % 100) < percent_transaction_read));
481	in_GPR_READ_OOO_ENGINE_ID [j]->write(i);
482	in_GPR_READ_NUM_REG [j]->write(gpr_address[j]);
483	}
484
485	SC_START(1);
486
487	// Test if read
488	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
489	if (in_GPR_READ_VAL [j]->read() and out_GPR_READ_ACK [j]->read())
490	{
491	TEST(Tgeneral_data_t, out_GPR_READ_DATA [j]->read(), gpr [i][gpr_address[j]]);
492	TEST(Tcontrol_t , out_GPR_READ_DATA_VAL[j]->read(), gpr_status [i][gpr_address[j]]);
493
494	gpr_address[j] = gpr_address_next;
495
496	if (gpr_address_next >= _param->_nb_general_register [i])
497	nb_port_gpr_active --;
498
499	gpr_address_next ++;
500	}
501	}
502	}
503
504	for (uint32_t i=0; i<_param->_nb_gpr_read; i++)
505	in_GPR_READ_VAL [i]->write(0);
506
507	LABEL("(SPR) Write default value");
508
509	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
510	for(uint32_t j=0; j<max_nb_special_register; j++)
511	{
512	spr [i][j] = rand()%_param->_size_special_data;
513	spr_status [i][j] = 1;
514	}
515
516	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
517	{
518	spr_address_next = _param->_nb_spr_write;
519	nb_port_spr_active = _param->_nb_spr_write;
520
521	for (uint32_t j=0; j<_param->_nb_spr_write; j++)
522	{
523	spr_address[j] = j;
524	if (j >= _param->_nb_special_register [i])
525	nb_port_spr_active --;
526	}
527
528	while (nb_port_spr_active > 0)
529	{
530	for (uint32_t j=0; j<_param->_nb_spr_write; j++)
531	{
532	in_SPR_WRITE_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and
533	((rand() % 100) < percent_transaction_write));
534	in_SPR_WRITE_OOO_ENGINE_ID [j]->write(i);
535	in_SPR_WRITE_NUM_REG [j]->write(spr_address[j]);
536	in_SPR_WRITE_DATA [j]->write(spr [i][spr_address[j]]);
537	}
538
539	SC_START(1);
540
541	// Test if write
542	for (uint32_t j=0; j<_param->_nb_spr_write; j++)
543	if (in_SPR_WRITE_VAL [j]->read() and out_SPR_WRITE_ACK [j]->read())
544	{
545	spr_address[j] = spr_address_next;
546
547	if (spr_address_next >= _param->_nb_special_register [i])
548	nb_port_spr_active --;
549
550	spr_address_next ++;
551	}
552	}
553	}
554
555	for (uint32_t i=0; i<_param->_nb_spr_write; i++)
556	in_SPR_WRITE_VAL [i]->write(0);
557
558	LABEL("(SPR) Read - and test data writted");
559
560	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
561	{
562	spr_address_next = _param->_nb_spr_read;
563	nb_port_spr_active = _param->_nb_spr_read;
564
565	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
566	{
567	spr_address[j] = j;
568	if (j >= _param->_nb_special_register [i])
569	nb_port_spr_active --;
570	}
571
572	while (nb_port_spr_active > 0)
573	{
574	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
575	{
576	in_SPR_READ_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and
577	((rand() % 100) < percent_transaction_read));
578	in_SPR_READ_OOO_ENGINE_ID [j]->write(i);
579	in_SPR_READ_NUM_REG [j]->write(spr_address[j]);
580	}
581
582	SC_START(1);
583
584	// Test if read
585	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
586	if (in_SPR_READ_VAL [j]->read() and out_SPR_READ_ACK [j]->read())
587	{
588	TEST(Tspecial_data_t, out_SPR_READ_DATA [j]->read(), spr [i][spr_address[j]]);
589	TEST(Tcontrol_t , out_SPR_READ_DATA_VAL[j]->read(), spr_status [i][spr_address[j]]);
590
591	spr_address[j] = spr_address_next;
592
593	if (spr_address_next >= _param->_nb_special_register [i])
594	nb_port_spr_active --;
595
596	spr_address_next ++;
597	}
598	}
599	}
600
601	for (uint32_t i=0; i<_param->_nb_spr_read; i++)
602	in_SPR_READ_VAL [i]->write(0);
603
604	LABEL("insert rob");
605
606	uint32_t cpt = 0;
607
608	while (cpt < nb_request)
609	{
610	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
611	{
612	uint32_t x=_param->_nb_inst_insert_rob [i];
613	for (uint32_t j=0; j<x; j++)
614	{
615	in_INSERT_ROB_VAL [i][j]->write((rand() % 100) < percent_transaction_insert);
616	in_INSERT_ROB_RD_USE [i][j]->write((rand() % 100) < percent_transaction_insert_use);
617	in_INSERT_ROB_RD_NUM_REG [i][j]->write(rand() % _param->_nb_general_register [i]);
618	in_INSERT_ROB_RE_USE [i][j]->write((rand() % 100) < percent_transaction_insert_use);
619	in_INSERT_ROB_RE_NUM_REG [i][j]->write(rand() % _param->_nb_special_register [i]);
620	}
621	}
622
623	SC_START(1);
624
625	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
626	{
627	uint32_t x=_param->_nb_inst_insert_rob [i];
628	for (uint32_t j=0; j<x; j++)
629	{
630	if (in_INSERT_ROB_VAL [i][j]->read() and out_INSERT_ROB_ACK [i][j]->read())
631	{
632	cpt ++;
633
634	if (in_INSERT_ROB_RD_USE [i][j]->read())
635	gpr_status [i][in_INSERT_ROB_RD_NUM_REG [i][j]->read()] = 0;
636
637	if (in_INSERT_ROB_RE_USE [i][j]->read())
638	spr_status [i][in_INSERT_ROB_RE_NUM_REG [i][j]->read()] = 0;
639	}
640	}
641	}
642	}
643	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
644	for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++)
645	in_INSERT_ROB_VAL [i][j]->write(0);
646
647	LABEL("(GPR) Read - and test data writted");
648
649	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
650	{
651	gpr_address_next = _param->_nb_gpr_read;
652	nb_port_gpr_active = _param->_nb_gpr_read;
653
654	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
655	{
656	gpr_address[j] = j;
657	if (j >= _param->_nb_general_register [i])
658	nb_port_gpr_active --;
659	}
660
661	while (nb_port_gpr_active > 0)
662	{
663	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
664	{
665	in_GPR_READ_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and
666	((rand() % 100) < percent_transaction_read));
667	in_GPR_READ_OOO_ENGINE_ID [j]->write(i);
668	in_GPR_READ_NUM_REG [j]->write(gpr_address[j]);
669	}
670
671	SC_START(1);
672
673	// Test if read
674	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
675	if (in_GPR_READ_VAL [j]->read() and out_GPR_READ_ACK [j]->read())
676	{
677	TEST(Tgeneral_data_t, out_GPR_READ_DATA [j]->read(), gpr [i][gpr_address[j]]);
678	TEST(Tcontrol_t , out_GPR_READ_DATA_VAL[j]->read(), gpr_status [i][gpr_address[j]]);
679
680	gpr_address[j] = gpr_address_next;
681
682	if (gpr_address_next >= _param->_nb_general_register [i])
683	nb_port_gpr_active --;
684
685	gpr_address_next ++;
686	}
687	}
688	}
689
690	for (uint32_t i=0; i<_param->_nb_gpr_read; i++)
691	in_GPR_READ_VAL [i]->write(0);
692
693	LABEL("(SPR) Read - and test data writted");
694
695	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
696	{
697	spr_address_next = _param->_nb_spr_read;
698	nb_port_spr_active = _param->_nb_spr_read;
699
700	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
701	{
702	spr_address[j] = j;
703	if (j >= _param->_nb_special_register [i])
704	nb_port_spr_active --;
705	}
706
707	while (nb_port_spr_active > 0)
708	{
709	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
710	{
711	in_SPR_READ_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and
712	((rand() % 100) < percent_transaction_read));
713	in_SPR_READ_OOO_ENGINE_ID [j]->write(i);
714	in_SPR_READ_NUM_REG [j]->write(spr_address[j]);
715	}
716
717	SC_START(1);
718
719	// Test if read
720	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
721	if (in_SPR_READ_VAL [j]->read() and out_SPR_READ_ACK [j]->read())
722	{
723	TEST(Tspecial_data_t, out_SPR_READ_DATA [j]->read(), spr [i][spr_address[j]]);
724	TEST(Tcontrol_t , out_SPR_READ_DATA_VAL[j]->read(), spr_status [i][spr_address[j]]);
725
726	spr_address[j] = spr_address_next;
727
728	if (spr_address_next >= _param->_nb_special_register [i])
729	nb_port_spr_active --;
730
731	spr_address_next ++;
732	}
733	}
734	}
735
736	LABEL("retire rob");
737
738	cpt = 0;
739
740	while (cpt < nb_request)
741	{
742	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
743	{
744	uint32_t x=_param->_nb_inst_retire_rob [i];
745	for (uint32_t j=0; j<x; j++)
746	{
747	in_RETIRE_ROB_VAL [i][j]->write((rand() % 100) < percent_transaction_retire);
748	in_RETIRE_ROB_RD_OLD_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use);
749	in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]->write(rand() % _param->_nb_general_register [i]);
750	in_RETIRE_ROB_RD_NEW_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use);
751	in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]->write(rand() % _param->_nb_general_register [i]);
752	in_RETIRE_ROB_RE_OLD_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use);
753	in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]->write(rand() % _param->_nb_special_register [i]);
754	in_RETIRE_ROB_RE_NEW_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use);
755	in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]->write(rand() % _param->_nb_special_register [i]);
756	}
757	}
758
759	SC_START(1);
760
761	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
762	{
763	uint32_t x=_param->_nb_inst_retire_rob [i];
764	for (uint32_t j=0; j<x; j++)
765	{
766	if (in_RETIRE_ROB_VAL [i][j]->read() and out_RETIRE_ROB_ACK [i][j]->read())
767	{
768	cpt ++;
769
770	if (in_RETIRE_ROB_RD_OLD_USE [i][j]->read())
771	gpr_status [i][in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]->read()] = 0;
772	if (in_RETIRE_ROB_RD_NEW_USE [i][j]->read())
773	gpr_status [i][in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]->read()] = 1;
774	if (in_RETIRE_ROB_RE_OLD_USE [i][j]->read())
775	spr_status [i][in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]->read()] = 0;
776	if (in_RETIRE_ROB_RE_NEW_USE [i][j]->read())
777	spr_status [i][in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]->read()] = 1;
778	}
779	}
780	}
781	}
782	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
783	for (uint32_t j=0; j<_param->_nb_inst_retire_rob [i]; j++)
784	in_RETIRE_ROB_VAL [i][j]->write(0);
785
786	LABEL("(GPR) Read - and test data writted");
787
788	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
789	{
790	gpr_address_next = _param->_nb_gpr_read;
791	nb_port_gpr_active = _param->_nb_gpr_read;
792
793	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
794	{
795	gpr_address[j] = j;
796	if (j >= _param->_nb_general_register [i])
797	nb_port_gpr_active --;
798	}
799
800	while (nb_port_gpr_active > 0)
801	{
802	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
803	{
804	in_GPR_READ_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and
805	((rand() % 100) < percent_transaction_read));
806	in_GPR_READ_OOO_ENGINE_ID [j]->write(i);
807	in_GPR_READ_NUM_REG [j]->write(gpr_address[j]);
808	}
809
810	SC_START(1);
811
812	// Test if read
813	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
814	if (in_GPR_READ_VAL [j]->read() and out_GPR_READ_ACK [j]->read())
815	{
816	TEST(Tgeneral_data_t, out_GPR_READ_DATA [j]->read(), gpr [i][gpr_address[j]]);
817	TEST(Tcontrol_t , out_GPR_READ_DATA_VAL[j]->read(), gpr_status [i][gpr_address[j]]);
818
819	gpr_address[j] = gpr_address_next;
820
821	if (gpr_address_next >= _param->_nb_general_register [i])
822	nb_port_gpr_active --;
823
824	gpr_address_next ++;
825	}
826	}
827	}
828
829	for (uint32_t i=0; i<_param->_nb_gpr_read; i++)
830	in_GPR_READ_VAL [i]->write(0);
831
832	LABEL("(SPR) Read - and test data writted");
833
834	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
835	{
836	spr_address_next = _param->_nb_spr_read;
837	nb_port_spr_active = _param->_nb_spr_read;
838
839	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
840	{
841	spr_address[j] = j;
842	if (j >= _param->_nb_special_register [i])
843	nb_port_spr_active --;
844	}
845
846	while (nb_port_spr_active > 0)
847	{
848	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
849	{
850	in_SPR_READ_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and
851	((rand() % 100) < percent_transaction_read));
852	in_SPR_READ_OOO_ENGINE_ID [j]->write(i);
853	in_SPR_READ_NUM_REG [j]->write(spr_address[j]);
854	}
855
856	SC_START(1);
857
858	// Test if read
859	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
860	if (in_SPR_READ_VAL [j]->read() and out_SPR_READ_ACK [j]->read())
861	{
862	TEST(Tspecial_data_t, out_SPR_READ_DATA [j]->read(), spr [i][spr_address[j]]);
863	TEST(Tcontrol_t , out_SPR_READ_DATA_VAL[j]->read(), spr_status [i][spr_address[j]]);
864
865	spr_address[j] = spr_address_next;
866
867	if (spr_address_next >= _param->_nb_special_register [i])
868	nb_port_spr_active --;
869
870	spr_address_next ++;
871	}
872	}
873	}
874
875	}
876
877	/********************************************************
878	* Simulation - End
879	********************************************************/
880
881	TEST_OK ("End of Simulation");
882	delete _time;
883	cout << "<" << name << "> ............ Stop Simulation" << endl;
884
885	delete in_CLOCK;
886	delete in_NRESET;
887
888	delete [] in_GPR_READ_VAL ;
889	delete [] out_GPR_READ_ACK ;
890	delete [] in_GPR_READ_OOO_ENGINE_ID ;
891	delete [] in_GPR_READ_NUM_REG ;
892	delete [] out_GPR_READ_DATA ;
893	delete [] out_GPR_READ_DATA_VAL ;
894	delete [] in_GPR_WRITE_VAL ;
895	delete [] out_GPR_WRITE_ACK ;
896	delete [] in_GPR_WRITE_OOO_ENGINE_ID ;
897	delete [] in_GPR_WRITE_NUM_REG ;
898	delete [] in_GPR_WRITE_DATA ;
899	delete [] in_SPR_READ_VAL ;
900	delete [] out_SPR_READ_ACK ;
901	delete [] in_SPR_READ_OOO_ENGINE_ID ;
902	delete [] in_SPR_READ_NUM_REG ;
903	delete [] out_SPR_READ_DATA ;
904	delete [] out_SPR_READ_DATA_VAL ;
905	delete [] in_SPR_WRITE_VAL ;
906	delete [] out_SPR_WRITE_ACK ;
907	delete [] in_SPR_WRITE_OOO_ENGINE_ID ;
908	delete [] in_SPR_WRITE_NUM_REG ;
909	delete [] in_SPR_WRITE_DATA ;
910	delete [] in_INSERT_ROB_VAL ;
911	delete [] out_INSERT_ROB_ACK ;
912	delete [] in_INSERT_ROB_RD_USE ;
913	delete [] in_INSERT_ROB_RD_NUM_REG ;
914	delete [] in_INSERT_ROB_RE_USE ;
915	delete [] in_INSERT_ROB_RE_NUM_REG ;
916	delete [] in_RETIRE_ROB_VAL ;
917	delete [] out_RETIRE_ROB_ACK ;
918	delete [] in_RETIRE_ROB_RD_OLD_USE ;
919	delete [] in_RETIRE_ROB_RD_OLD_NUM_REG ;
920	delete [] in_RETIRE_ROB_RD_NEW_USE ;
921	delete [] in_RETIRE_ROB_RD_NEW_NUM_REG ;
922	delete [] in_RETIRE_ROB_RE_OLD_USE ;
923	delete [] in_RETIRE_ROB_RE_OLD_NUM_REG ;
924	delete [] in_RETIRE_ROB_RE_NEW_USE ;
925	delete [] in_RETIRE_ROB_RE_NEW_NUM_REG ;
926	#endif
927
928	delete _Register_unit;
929	#ifdef STATISTICS
930	delete _parameters_statistics;
931	#endif
932	}

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