1 | /* |
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2 | * $Id$ |
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3 | * |
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4 | * [ Description ] |
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5 | * |
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6 | * Test |
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7 | */ |
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8 | |
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9 | #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest/include/test.h" |
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10 | #include "Common/include/Test.h" |
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11 | |
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12 | #define NB_ITERATION 1 |
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13 | #define CYCLE_MAX (10240*NB_ITERATION) |
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14 | |
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15 | #define LABEL(str) \ |
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16 | { \ |
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17 | cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} " << str << endl; \ |
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18 | } while(0) |
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19 | |
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20 | static uint32_t cycle = 0; |
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21 | |
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22 | #define SC_START(cycle_offset) \ |
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23 | do \ |
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24 | { \ |
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25 | /*cout << "SC_START (begin)" << endl;*/ \ |
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26 | \ |
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27 | uint32_t cycle_current = static_cast<uint32_t>(sc_simulation_time()); \ |
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28 | if (cycle_current != cycle) \ |
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29 | { \ |
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30 | cycle = cycle_current; \ |
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31 | cout << "##########[ cycle "<< cycle << " ]" << endl; \ |
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32 | } \ |
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33 | \ |
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34 | if (cycle_current > CYCLE_MAX) \ |
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35 | { \ |
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36 | TEST_KO("Maximal cycles Reached"); \ |
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37 | } \ |
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38 | sc_start(cycle_offset); \ |
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39 | /*cout << "SC_START (end )" << endl;*/ \ |
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40 | } while(0) |
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41 | |
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42 | void test (string name, |
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43 | morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::Parameters * _param) |
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44 | { |
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45 | cout << "<" << name << "> : Simulation SystemC" << endl; |
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46 | |
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47 | #ifdef STATISTICS |
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48 | morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); |
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49 | #endif |
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50 | |
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51 | Register_unit * _Register_unit = new Register_unit (name.c_str(), |
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52 | #ifdef STATISTICS |
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53 | _parameters_statistics, |
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54 | #endif |
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55 | _param); |
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56 | |
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57 | #ifdef SYSTEMC |
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58 | /********************************************************************* |
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59 | * Déclarations des signaux |
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60 | *********************************************************************/ |
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61 | sc_clock * in_CLOCK; |
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62 | sc_signal<Tcontrol_t> * in_NRESET; |
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63 | |
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64 | // ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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65 | sc_signal<Tcontrol_t > ** in_GPR_READ_VAL ; |
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66 | sc_signal<Tcontrol_t > ** out_GPR_READ_ACK ; |
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67 | sc_signal<Tcontext_t > ** in_GPR_READ_OOO_ENGINE_ID ; |
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68 | sc_signal<Tgeneral_address_t> ** in_GPR_READ_NUM_REG ; |
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69 | sc_signal<Tgeneral_data_t > ** out_GPR_READ_DATA ; |
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70 | sc_signal<Tcontrol_t > ** out_GPR_READ_DATA_VAL ; |
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71 | |
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72 | // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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73 | sc_signal<Tcontrol_t > ** in_GPR_WRITE_VAL ; |
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74 | sc_signal<Tcontrol_t > ** out_GPR_WRITE_ACK ; |
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75 | sc_signal<Tcontext_t > ** in_GPR_WRITE_OOO_ENGINE_ID ; |
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76 | sc_signal<Tgeneral_address_t> ** in_GPR_WRITE_NUM_REG ; |
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77 | sc_signal<Tgeneral_data_t > ** in_GPR_WRITE_DATA ; |
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78 | |
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79 | // ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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80 | sc_signal<Tcontrol_t > ** in_SPR_READ_VAL ; |
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81 | sc_signal<Tcontrol_t > ** out_SPR_READ_ACK ; |
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82 | sc_signal<Tcontext_t > ** in_SPR_READ_OOO_ENGINE_ID ; |
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83 | sc_signal<Tspecial_address_t> ** in_SPR_READ_NUM_REG ; |
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84 | sc_signal<Tspecial_data_t > ** out_SPR_READ_DATA ; |
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85 | sc_signal<Tcontrol_t > ** out_SPR_READ_DATA_VAL ; |
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86 | |
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87 | // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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88 | sc_signal<Tcontrol_t > ** in_SPR_WRITE_VAL ; |
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89 | sc_signal<Tcontrol_t > ** out_SPR_WRITE_ACK ; |
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90 | sc_signal<Tcontext_t > ** in_SPR_WRITE_OOO_ENGINE_ID ; |
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91 | sc_signal<Tspecial_address_t> ** in_SPR_WRITE_NUM_REG ; |
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92 | sc_signal<Tspecial_data_t > ** in_SPR_WRITE_DATA ; |
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93 | |
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94 | // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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95 | sc_signal<Tcontrol_t > *** in_INSERT_ROB_VAL ; |
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96 | sc_signal<Tcontrol_t > *** out_INSERT_ROB_ACK ; |
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97 | sc_signal<Tcontrol_t > *** in_INSERT_ROB_RD_USE ; |
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98 | sc_signal<Tgeneral_address_t> *** in_INSERT_ROB_RD_NUM_REG ; // use=1 : status[num_reg]<- 0 |
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99 | sc_signal<Tcontrol_t > *** in_INSERT_ROB_RE_USE ; |
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100 | sc_signal<Tspecial_address_t> *** in_INSERT_ROB_RE_NUM_REG ; |
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101 | |
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102 | // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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103 | sc_signal<Tcontrol_t > *** in_RETIRE_ROB_VAL ; |
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104 | sc_signal<Tcontrol_t > *** out_RETIRE_ROB_ACK ; |
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105 | sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RD_OLD_USE ; |
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106 | sc_signal<Tgeneral_address_t> *** in_RETIRE_ROB_RD_OLD_NUM_REG ; // old_use=1 : status[old_num_reg]<- 0 |
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107 | sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RD_NEW_USE ; |
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108 | sc_signal<Tgeneral_address_t> *** in_RETIRE_ROB_RD_NEW_NUM_REG ; // new_use=1 : status[new_num_reg]<- 1 |
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109 | sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RE_OLD_USE ; |
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110 | sc_signal<Tspecial_address_t> *** in_RETIRE_ROB_RE_OLD_NUM_REG ; |
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111 | sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RE_NEW_USE ; |
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112 | sc_signal<Tspecial_address_t> *** in_RETIRE_ROB_RE_NEW_NUM_REG ; |
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113 | |
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114 | string rename = "signal"; |
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115 | |
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116 | in_CLOCK = new sc_clock ("clock", 1.0, 0.5); |
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117 | in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); |
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118 | |
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119 | |
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120 | // ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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121 | in_GPR_READ_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_read]; |
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122 | out_GPR_READ_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_read]; |
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123 | in_GPR_READ_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_gpr_read]; |
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124 | in_GPR_READ_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_gpr_read]; |
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125 | out_GPR_READ_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_gpr_read]; |
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126 | out_GPR_READ_DATA_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_read]; |
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127 | |
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128 | for (uint32_t i=0; i<_param->_nb_gpr_read; i++) |
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129 | { |
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130 | in_GPR_READ_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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131 | out_GPR_READ_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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132 | in_GPR_READ_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str()); |
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133 | in_GPR_READ_NUM_REG [i]= new sc_signal<Tgeneral_address_t> (rename.c_str()); |
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134 | out_GPR_READ_DATA [i]= new sc_signal<Tgeneral_data_t > (rename.c_str()); |
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135 | out_GPR_READ_DATA_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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136 | } |
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137 | |
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138 | // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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139 | in_GPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_write]; |
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140 | out_GPR_WRITE_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_write]; |
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141 | in_GPR_WRITE_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_gpr_write]; |
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142 | in_GPR_WRITE_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_gpr_write]; |
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143 | in_GPR_WRITE_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_gpr_write]; |
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144 | |
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145 | for (uint32_t i=0; i<_param->_nb_gpr_write; i++) |
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146 | { |
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147 | in_GPR_WRITE_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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148 | out_GPR_WRITE_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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149 | in_GPR_WRITE_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str()); |
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150 | in_GPR_WRITE_NUM_REG [i]= new sc_signal<Tgeneral_address_t> (rename.c_str()); |
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151 | in_GPR_WRITE_DATA [i]= new sc_signal<Tgeneral_data_t > (rename.c_str()); |
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152 | } |
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153 | |
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154 | // ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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155 | in_SPR_READ_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_read]; |
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156 | out_SPR_READ_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_spr_read]; |
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157 | in_SPR_READ_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_spr_read]; |
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158 | in_SPR_READ_NUM_REG = new sc_signal<Tspecial_address_t> * [_param->_nb_spr_read]; |
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159 | out_SPR_READ_DATA = new sc_signal<Tspecial_data_t > * [_param->_nb_spr_read]; |
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160 | out_SPR_READ_DATA_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_read]; |
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161 | |
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162 | for (uint32_t i=0; i<_param->_nb_spr_read; i++) |
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163 | { |
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164 | in_SPR_READ_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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165 | out_SPR_READ_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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166 | in_SPR_READ_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str()); |
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167 | in_SPR_READ_NUM_REG [i]= new sc_signal<Tspecial_address_t> (rename.c_str()); |
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168 | out_SPR_READ_DATA [i]= new sc_signal<Tspecial_data_t > (rename.c_str()); |
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169 | out_SPR_READ_DATA_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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170 | } |
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171 | |
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172 | // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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173 | in_SPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_write]; |
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174 | out_SPR_WRITE_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_spr_write]; |
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175 | in_SPR_WRITE_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_spr_write]; |
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176 | in_SPR_WRITE_NUM_REG = new sc_signal<Tspecial_address_t> * [_param->_nb_spr_write]; |
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177 | in_SPR_WRITE_DATA = new sc_signal<Tspecial_data_t > * [_param->_nb_spr_write]; |
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178 | |
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179 | for (uint32_t i=0; i<_param->_nb_spr_write; i++) |
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180 | { |
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181 | in_SPR_WRITE_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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182 | out_SPR_WRITE_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str()); |
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183 | in_SPR_WRITE_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str()); |
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184 | in_SPR_WRITE_NUM_REG [i]= new sc_signal<Tspecial_address_t> (rename.c_str()); |
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185 | in_SPR_WRITE_DATA [i]= new sc_signal<Tspecial_data_t > (rename.c_str()); |
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186 | } |
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187 | |
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188 | // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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189 | in_INSERT_ROB_VAL = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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190 | out_INSERT_ROB_ACK = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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191 | in_INSERT_ROB_RD_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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192 | in_INSERT_ROB_RD_NUM_REG = new sc_signal<Tgeneral_address_t> ** [_param->_nb_ooo_engine]; |
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193 | in_INSERT_ROB_RE_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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194 | in_INSERT_ROB_RE_NUM_REG = new sc_signal<Tspecial_address_t> ** [_param->_nb_ooo_engine]; |
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195 | |
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196 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
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197 | { |
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198 | uint32_t x=_param->_nb_inst_insert_rob [i]; |
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199 | |
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200 | in_INSERT_ROB_VAL [i] = new sc_signal<Tcontrol_t > * [x]; |
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201 | out_INSERT_ROB_ACK [i] = new sc_signal<Tcontrol_t > * [x]; |
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202 | in_INSERT_ROB_RD_USE [i] = new sc_signal<Tcontrol_t > * [x]; |
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203 | in_INSERT_ROB_RD_NUM_REG [i] = new sc_signal<Tgeneral_address_t> * [x]; |
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204 | in_INSERT_ROB_RE_USE [i] = new sc_signal<Tcontrol_t > * [x]; |
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205 | in_INSERT_ROB_RE_NUM_REG [i] = new sc_signal<Tspecial_address_t> * [x]; |
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206 | |
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207 | for (uint32_t j=0; j<x; j++) |
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208 | { |
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209 | in_INSERT_ROB_VAL [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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210 | out_INSERT_ROB_ACK [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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211 | in_INSERT_ROB_RD_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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212 | in_INSERT_ROB_RD_NUM_REG [i][j] = new sc_signal<Tgeneral_address_t> (rename.c_str()); |
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213 | in_INSERT_ROB_RE_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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214 | in_INSERT_ROB_RE_NUM_REG [i][j] = new sc_signal<Tspecial_address_t> (rename.c_str()); |
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215 | |
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216 | } |
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217 | } |
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218 | |
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219 | // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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220 | in_RETIRE_ROB_VAL = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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221 | out_RETIRE_ROB_ACK = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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222 | in_RETIRE_ROB_RD_OLD_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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223 | in_RETIRE_ROB_RD_OLD_NUM_REG = new sc_signal<Tgeneral_address_t> ** [_param->_nb_ooo_engine]; |
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224 | in_RETIRE_ROB_RE_OLD_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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225 | in_RETIRE_ROB_RE_OLD_NUM_REG = new sc_signal<Tspecial_address_t> ** [_param->_nb_ooo_engine]; |
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226 | in_RETIRE_ROB_RD_NEW_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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227 | in_RETIRE_ROB_RD_NEW_NUM_REG = new sc_signal<Tgeneral_address_t> ** [_param->_nb_ooo_engine]; |
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228 | in_RETIRE_ROB_RE_NEW_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine]; |
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229 | in_RETIRE_ROB_RE_NEW_NUM_REG = new sc_signal<Tspecial_address_t> ** [_param->_nb_ooo_engine]; |
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230 | |
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231 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
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232 | { |
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233 | uint32_t x=_param->_nb_inst_retire_rob [i]; |
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234 | |
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235 | in_RETIRE_ROB_VAL [i] = new sc_signal<Tcontrol_t > * [x]; |
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236 | out_RETIRE_ROB_ACK [i] = new sc_signal<Tcontrol_t > * [x]; |
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237 | in_RETIRE_ROB_RD_OLD_USE [i] = new sc_signal<Tcontrol_t > * [x]; |
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238 | in_RETIRE_ROB_RD_OLD_NUM_REG [i] = new sc_signal<Tgeneral_address_t> * [x]; |
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239 | in_RETIRE_ROB_RE_OLD_USE [i] = new sc_signal<Tcontrol_t > * [x]; |
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240 | in_RETIRE_ROB_RE_OLD_NUM_REG [i] = new sc_signal<Tspecial_address_t> * [x]; |
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241 | in_RETIRE_ROB_RD_NEW_USE [i] = new sc_signal<Tcontrol_t > * [x]; |
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242 | in_RETIRE_ROB_RD_NEW_NUM_REG [i] = new sc_signal<Tgeneral_address_t> * [x]; |
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243 | in_RETIRE_ROB_RE_NEW_USE [i] = new sc_signal<Tcontrol_t > * [x]; |
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244 | in_RETIRE_ROB_RE_NEW_NUM_REG [i] = new sc_signal<Tspecial_address_t> * [x]; |
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245 | |
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246 | for (uint32_t j=0; j<x; j++) |
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247 | { |
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248 | in_RETIRE_ROB_VAL [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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249 | out_RETIRE_ROB_ACK [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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250 | in_RETIRE_ROB_RD_OLD_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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251 | in_RETIRE_ROB_RD_OLD_NUM_REG [i][j] = new sc_signal<Tgeneral_address_t> (rename.c_str()); |
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252 | in_RETIRE_ROB_RE_OLD_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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253 | in_RETIRE_ROB_RE_OLD_NUM_REG [i][j] = new sc_signal<Tspecial_address_t> (rename.c_str()); |
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254 | in_RETIRE_ROB_RD_NEW_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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255 | in_RETIRE_ROB_RD_NEW_NUM_REG [i][j] = new sc_signal<Tgeneral_address_t> (rename.c_str()); |
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256 | in_RETIRE_ROB_RE_NEW_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str()); |
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257 | in_RETIRE_ROB_RE_NEW_NUM_REG [i][j] = new sc_signal<Tspecial_address_t> (rename.c_str()); |
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258 | } |
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259 | } |
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260 | |
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261 | |
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262 | /******************************************************** |
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263 | * Instanciation |
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264 | ********************************************************/ |
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265 | |
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266 | cout << "<" << name << "> Instanciation of _Register_unit" << endl; |
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267 | |
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268 | (*(_Register_unit->in_CLOCK)) (*(in_CLOCK)); |
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269 | (*(_Register_unit->in_NRESET)) (*(in_NRESET)); |
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270 | |
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271 | for (uint32_t i=0; i<_param->_nb_gpr_read; i++) |
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272 | { |
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273 | (*(_Register_unit-> in_GPR_READ_VAL [i]))(*( in_GPR_READ_VAL [i])); |
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274 | (*(_Register_unit->out_GPR_READ_ACK [i]))(*(out_GPR_READ_ACK [i])); |
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275 | if (_param->_have_port_ooo_engine_id == true) |
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276 | (*(_Register_unit-> in_GPR_READ_OOO_ENGINE_ID [i]))(*( in_GPR_READ_OOO_ENGINE_ID [i])); |
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277 | (*(_Register_unit-> in_GPR_READ_NUM_REG [i]))(*( in_GPR_READ_NUM_REG [i])); |
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278 | (*(_Register_unit->out_GPR_READ_DATA [i]))(*(out_GPR_READ_DATA [i])); |
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279 | (*(_Register_unit->out_GPR_READ_DATA_VAL [i]))(*(out_GPR_READ_DATA_VAL [i])); |
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280 | } |
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281 | for (uint32_t i=0; i<_param->_nb_gpr_write; i++) |
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282 | { |
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283 | (*(_Register_unit-> in_GPR_WRITE_VAL [i]))(*( in_GPR_WRITE_VAL [i])); |
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284 | (*(_Register_unit->out_GPR_WRITE_ACK [i]))(*(out_GPR_WRITE_ACK [i])); |
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285 | if (_param->_have_port_ooo_engine_id == true) |
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286 | (*(_Register_unit-> in_GPR_WRITE_OOO_ENGINE_ID [i]))(*( in_GPR_WRITE_OOO_ENGINE_ID [i])); |
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287 | (*(_Register_unit-> in_GPR_WRITE_NUM_REG [i]))(*( in_GPR_WRITE_NUM_REG [i])); |
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288 | (*(_Register_unit-> in_GPR_WRITE_DATA [i]))(*( in_GPR_WRITE_DATA [i])); |
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289 | } |
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290 | for (uint32_t i=0; i<_param->_nb_spr_read; i++) |
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291 | { |
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292 | (*(_Register_unit-> in_SPR_READ_VAL [i]))(*( in_SPR_READ_VAL [i])); |
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293 | (*(_Register_unit->out_SPR_READ_ACK [i]))(*(out_SPR_READ_ACK [i])); |
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294 | if (_param->_have_port_ooo_engine_id == true) |
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295 | (*(_Register_unit-> in_SPR_READ_OOO_ENGINE_ID [i]))(*( in_SPR_READ_OOO_ENGINE_ID [i])); |
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296 | (*(_Register_unit-> in_SPR_READ_NUM_REG [i]))(*( in_SPR_READ_NUM_REG [i])); |
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297 | (*(_Register_unit->out_SPR_READ_DATA [i]))(*(out_SPR_READ_DATA [i])); |
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298 | (*(_Register_unit->out_SPR_READ_DATA_VAL [i]))(*(out_SPR_READ_DATA_VAL [i])); |
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299 | } |
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300 | for (uint32_t i=0; i<_param->_nb_spr_write; i++) |
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301 | { |
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302 | (*(_Register_unit-> in_SPR_WRITE_VAL [i]))(*( in_SPR_WRITE_VAL [i])); |
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303 | (*(_Register_unit->out_SPR_WRITE_ACK [i]))(*(out_SPR_WRITE_ACK [i])); |
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304 | if (_param->_have_port_ooo_engine_id == true) |
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305 | (*(_Register_unit-> in_SPR_WRITE_OOO_ENGINE_ID [i]))(*( in_SPR_WRITE_OOO_ENGINE_ID [i])); |
---|
306 | (*(_Register_unit-> in_SPR_WRITE_NUM_REG [i]))(*( in_SPR_WRITE_NUM_REG [i])); |
---|
307 | (*(_Register_unit-> in_SPR_WRITE_DATA [i]))(*( in_SPR_WRITE_DATA [i])); |
---|
308 | } |
---|
309 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
310 | for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) |
---|
311 | { |
---|
312 | (*(_Register_unit-> in_INSERT_ROB_VAL [i][j]))(*( in_INSERT_ROB_VAL [i][j])); |
---|
313 | (*(_Register_unit->out_INSERT_ROB_ACK [i][j]))(*(out_INSERT_ROB_ACK [i][j])); |
---|
314 | (*(_Register_unit-> in_INSERT_ROB_RD_USE [i][j]))(*( in_INSERT_ROB_RD_USE [i][j])); |
---|
315 | (*(_Register_unit-> in_INSERT_ROB_RD_NUM_REG [i][j]))(*( in_INSERT_ROB_RD_NUM_REG [i][j])); |
---|
316 | (*(_Register_unit-> in_INSERT_ROB_RE_USE [i][j]))(*( in_INSERT_ROB_RE_USE [i][j])); |
---|
317 | (*(_Register_unit-> in_INSERT_ROB_RE_NUM_REG [i][j]))(*( in_INSERT_ROB_RE_NUM_REG [i][j])); |
---|
318 | } |
---|
319 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
320 | for (uint32_t j=0; j<_param->_nb_inst_retire_rob [i]; j++) |
---|
321 | { |
---|
322 | (*(_Register_unit-> in_RETIRE_ROB_VAL [i][j]))(*( in_RETIRE_ROB_VAL [i][j])); |
---|
323 | (*(_Register_unit->out_RETIRE_ROB_ACK [i][j]))(*(out_RETIRE_ROB_ACK [i][j])); |
---|
324 | (*(_Register_unit-> in_RETIRE_ROB_RD_OLD_USE [i][j]))(*( in_RETIRE_ROB_RD_OLD_USE [i][j])); |
---|
325 | (*(_Register_unit-> in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]))(*( in_RETIRE_ROB_RD_OLD_NUM_REG [i][j])); |
---|
326 | (*(_Register_unit-> in_RETIRE_ROB_RE_OLD_USE [i][j]))(*( in_RETIRE_ROB_RE_OLD_USE [i][j])); |
---|
327 | (*(_Register_unit-> in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]))(*( in_RETIRE_ROB_RE_OLD_NUM_REG [i][j])); |
---|
328 | (*(_Register_unit-> in_RETIRE_ROB_RD_NEW_USE [i][j]))(*( in_RETIRE_ROB_RD_NEW_USE [i][j])); |
---|
329 | (*(_Register_unit-> in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]))(*( in_RETIRE_ROB_RD_NEW_NUM_REG [i][j])); |
---|
330 | (*(_Register_unit-> in_RETIRE_ROB_RE_NEW_USE [i][j]))(*( in_RETIRE_ROB_RE_NEW_USE [i][j])); |
---|
331 | (*(_Register_unit-> in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]))(*( in_RETIRE_ROB_RE_NEW_NUM_REG [i][j])); |
---|
332 | } |
---|
333 | |
---|
334 | cout << "<" << name << "> Start Simulation ............" << endl; |
---|
335 | Time * _time = new Time(); |
---|
336 | |
---|
337 | /******************************************************** |
---|
338 | * Simulation - Begin |
---|
339 | ********************************************************/ |
---|
340 | |
---|
341 | // Initialisation |
---|
342 | uint32_t max_nb_general_register = 0; |
---|
343 | |
---|
344 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
345 | if (_param->_nb_general_register [i] > max_nb_general_register) |
---|
346 | max_nb_general_register = _param->_nb_general_register [i]; |
---|
347 | |
---|
348 | uint32_t max_nb_special_register = 0; |
---|
349 | |
---|
350 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
351 | if (_param->_nb_special_register [i] > max_nb_special_register) |
---|
352 | max_nb_special_register = _param->_nb_special_register [i]; |
---|
353 | |
---|
354 | const int32_t percent_transaction_read = 70; |
---|
355 | const int32_t percent_transaction_write = 70; |
---|
356 | const int32_t percent_transaction_insert = 70; |
---|
357 | const int32_t percent_transaction_insert_use = 70; |
---|
358 | const int32_t percent_transaction_retire = 70; |
---|
359 | const int32_t percent_transaction_retire_use = 70; |
---|
360 | const uint32_t nb_request = max_nb_general_register; |
---|
361 | |
---|
362 | const uint32_t seed = 0; |
---|
363 | //const uint32_t seed = static_cast<uint32_t>(time(NULL)); |
---|
364 | |
---|
365 | srand(seed); |
---|
366 | |
---|
367 | Tgeneral_data_t gpr [_param->_nb_ooo_engine][max_nb_general_register]; |
---|
368 | Tcontrol_t gpr_status [_param->_nb_ooo_engine][max_nb_general_register]; |
---|
369 | Tspecial_data_t spr [_param->_nb_ooo_engine][max_nb_special_register]; |
---|
370 | Tcontrol_t spr_status [_param->_nb_ooo_engine][max_nb_special_register]; |
---|
371 | |
---|
372 | SC_START(0); |
---|
373 | |
---|
374 | LABEL("Initialisation"); |
---|
375 | |
---|
376 | in_NRESET->write(0); |
---|
377 | SC_START(5); |
---|
378 | in_NRESET->write(1); |
---|
379 | |
---|
380 | for (uint32_t i=0; i<_param->_nb_gpr_read ; i++) |
---|
381 | in_GPR_READ_VAL [i]->write(0); |
---|
382 | for (uint32_t i=0; i<_param->_nb_gpr_write; i++) |
---|
383 | in_GPR_WRITE_VAL [i]->write(0); |
---|
384 | for (uint32_t i=0; i<_param->_nb_spr_read ; i++) |
---|
385 | in_SPR_READ_VAL [i]->write(0); |
---|
386 | for (uint32_t i=0; i<_param->_nb_spr_write; i++) |
---|
387 | in_SPR_WRITE_VAL [i]->write(0); |
---|
388 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
389 | { |
---|
390 | for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) |
---|
391 | in_INSERT_ROB_VAL [i][j]->write(0); |
---|
392 | for (uint32_t j=0; j<_param->_nb_inst_retire_rob [i]; j++) |
---|
393 | in_RETIRE_ROB_VAL [i][j]->write(0); |
---|
394 | } |
---|
395 | |
---|
396 | Tgeneral_address_t gpr_address [_param->_nb_gpr_write]; |
---|
397 | Tgeneral_address_t gpr_address_next; |
---|
398 | uint32_t nb_port_gpr_active; // number of port active |
---|
399 | |
---|
400 | Tspecial_address_t spr_address [_param->_nb_spr_write]; |
---|
401 | Tspecial_address_t spr_address_next; |
---|
402 | uint32_t nb_port_spr_active; // number of port active |
---|
403 | |
---|
404 | LABEL("Loop of Test"); |
---|
405 | |
---|
406 | for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) |
---|
407 | { |
---|
408 | LABEL("Iteration "+toString(iteration)); |
---|
409 | |
---|
410 | LABEL("(GPR) Write default value"); |
---|
411 | |
---|
412 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
413 | for(uint32_t j=0; j<max_nb_general_register; j++) |
---|
414 | { |
---|
415 | gpr [i][j] = rand()%_param->_size_general_data; |
---|
416 | gpr_status [i][j] = 1; |
---|
417 | } |
---|
418 | |
---|
419 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
420 | { |
---|
421 | gpr_address_next = _param->_nb_gpr_write; |
---|
422 | nb_port_gpr_active = _param->_nb_gpr_write; |
---|
423 | |
---|
424 | for (uint32_t j=0; j<_param->_nb_gpr_write; j++) |
---|
425 | { |
---|
426 | gpr_address[j] = j; |
---|
427 | if (j >= _param->_nb_general_register [i]) |
---|
428 | nb_port_gpr_active --; |
---|
429 | } |
---|
430 | |
---|
431 | while (nb_port_gpr_active > 0) |
---|
432 | { |
---|
433 | for (uint32_t j=0; j<_param->_nb_gpr_write; j++) |
---|
434 | { |
---|
435 | in_GPR_WRITE_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and |
---|
436 | ((rand() % 100) < percent_transaction_write)); |
---|
437 | in_GPR_WRITE_OOO_ENGINE_ID [j]->write(i); |
---|
438 | in_GPR_WRITE_NUM_REG [j]->write(gpr_address[j]); |
---|
439 | in_GPR_WRITE_DATA [j]->write(gpr [i][gpr_address[j]]); |
---|
440 | } |
---|
441 | |
---|
442 | SC_START(1); |
---|
443 | |
---|
444 | // Test if write |
---|
445 | for (uint32_t j=0; j<_param->_nb_gpr_write; j++) |
---|
446 | if (in_GPR_WRITE_VAL [j]->read() and out_GPR_WRITE_ACK [j]->read()) |
---|
447 | { |
---|
448 | gpr_address[j] = gpr_address_next; |
---|
449 | |
---|
450 | if (gpr_address_next >= _param->_nb_general_register [i]) |
---|
451 | nb_port_gpr_active --; |
---|
452 | |
---|
453 | gpr_address_next ++; |
---|
454 | } |
---|
455 | } |
---|
456 | } |
---|
457 | |
---|
458 | for (uint32_t i=0; i<_param->_nb_gpr_write; i++) |
---|
459 | in_GPR_WRITE_VAL [i]->write(0); |
---|
460 | |
---|
461 | LABEL("(GPR) Read - and test data writted"); |
---|
462 | |
---|
463 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
464 | { |
---|
465 | gpr_address_next = _param->_nb_gpr_read; |
---|
466 | nb_port_gpr_active = _param->_nb_gpr_read; |
---|
467 | |
---|
468 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
469 | { |
---|
470 | gpr_address[j] = j; |
---|
471 | if (j >= _param->_nb_general_register [i]) |
---|
472 | nb_port_gpr_active --; |
---|
473 | } |
---|
474 | |
---|
475 | while (nb_port_gpr_active > 0) |
---|
476 | { |
---|
477 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
478 | { |
---|
479 | in_GPR_READ_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and |
---|
480 | ((rand() % 100) < percent_transaction_read)); |
---|
481 | in_GPR_READ_OOO_ENGINE_ID [j]->write(i); |
---|
482 | in_GPR_READ_NUM_REG [j]->write(gpr_address[j]); |
---|
483 | } |
---|
484 | |
---|
485 | SC_START(1); |
---|
486 | |
---|
487 | // Test if read |
---|
488 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
489 | if (in_GPR_READ_VAL [j]->read() and out_GPR_READ_ACK [j]->read()) |
---|
490 | { |
---|
491 | TEST(Tgeneral_data_t, out_GPR_READ_DATA [j]->read(), gpr [i][gpr_address[j]]); |
---|
492 | TEST(Tcontrol_t , out_GPR_READ_DATA_VAL[j]->read(), gpr_status [i][gpr_address[j]]); |
---|
493 | |
---|
494 | gpr_address[j] = gpr_address_next; |
---|
495 | |
---|
496 | if (gpr_address_next >= _param->_nb_general_register [i]) |
---|
497 | nb_port_gpr_active --; |
---|
498 | |
---|
499 | gpr_address_next ++; |
---|
500 | } |
---|
501 | } |
---|
502 | } |
---|
503 | |
---|
504 | for (uint32_t i=0; i<_param->_nb_gpr_read; i++) |
---|
505 | in_GPR_READ_VAL [i]->write(0); |
---|
506 | |
---|
507 | LABEL("(SPR) Write default value"); |
---|
508 | |
---|
509 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
510 | for(uint32_t j=0; j<max_nb_special_register; j++) |
---|
511 | { |
---|
512 | spr [i][j] = rand()%_param->_size_special_data; |
---|
513 | spr_status [i][j] = 1; |
---|
514 | } |
---|
515 | |
---|
516 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
517 | { |
---|
518 | spr_address_next = _param->_nb_spr_write; |
---|
519 | nb_port_spr_active = _param->_nb_spr_write; |
---|
520 | |
---|
521 | for (uint32_t j=0; j<_param->_nb_spr_write; j++) |
---|
522 | { |
---|
523 | spr_address[j] = j; |
---|
524 | if (j >= _param->_nb_special_register [i]) |
---|
525 | nb_port_spr_active --; |
---|
526 | } |
---|
527 | |
---|
528 | while (nb_port_spr_active > 0) |
---|
529 | { |
---|
530 | for (uint32_t j=0; j<_param->_nb_spr_write; j++) |
---|
531 | { |
---|
532 | in_SPR_WRITE_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and |
---|
533 | ((rand() % 100) < percent_transaction_write)); |
---|
534 | in_SPR_WRITE_OOO_ENGINE_ID [j]->write(i); |
---|
535 | in_SPR_WRITE_NUM_REG [j]->write(spr_address[j]); |
---|
536 | in_SPR_WRITE_DATA [j]->write(spr [i][spr_address[j]]); |
---|
537 | } |
---|
538 | |
---|
539 | SC_START(1); |
---|
540 | |
---|
541 | // Test if write |
---|
542 | for (uint32_t j=0; j<_param->_nb_spr_write; j++) |
---|
543 | if (in_SPR_WRITE_VAL [j]->read() and out_SPR_WRITE_ACK [j]->read()) |
---|
544 | { |
---|
545 | spr_address[j] = spr_address_next; |
---|
546 | |
---|
547 | if (spr_address_next >= _param->_nb_special_register [i]) |
---|
548 | nb_port_spr_active --; |
---|
549 | |
---|
550 | spr_address_next ++; |
---|
551 | } |
---|
552 | } |
---|
553 | } |
---|
554 | |
---|
555 | for (uint32_t i=0; i<_param->_nb_spr_write; i++) |
---|
556 | in_SPR_WRITE_VAL [i]->write(0); |
---|
557 | |
---|
558 | LABEL("(SPR) Read - and test data writted"); |
---|
559 | |
---|
560 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
561 | { |
---|
562 | spr_address_next = _param->_nb_spr_read; |
---|
563 | nb_port_spr_active = _param->_nb_spr_read; |
---|
564 | |
---|
565 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
566 | { |
---|
567 | spr_address[j] = j; |
---|
568 | if (j >= _param->_nb_special_register [i]) |
---|
569 | nb_port_spr_active --; |
---|
570 | } |
---|
571 | |
---|
572 | while (nb_port_spr_active > 0) |
---|
573 | { |
---|
574 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
575 | { |
---|
576 | in_SPR_READ_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and |
---|
577 | ((rand() % 100) < percent_transaction_read)); |
---|
578 | in_SPR_READ_OOO_ENGINE_ID [j]->write(i); |
---|
579 | in_SPR_READ_NUM_REG [j]->write(spr_address[j]); |
---|
580 | } |
---|
581 | |
---|
582 | SC_START(1); |
---|
583 | |
---|
584 | // Test if read |
---|
585 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
586 | if (in_SPR_READ_VAL [j]->read() and out_SPR_READ_ACK [j]->read()) |
---|
587 | { |
---|
588 | TEST(Tspecial_data_t, out_SPR_READ_DATA [j]->read(), spr [i][spr_address[j]]); |
---|
589 | TEST(Tcontrol_t , out_SPR_READ_DATA_VAL[j]->read(), spr_status [i][spr_address[j]]); |
---|
590 | |
---|
591 | spr_address[j] = spr_address_next; |
---|
592 | |
---|
593 | if (spr_address_next >= _param->_nb_special_register [i]) |
---|
594 | nb_port_spr_active --; |
---|
595 | |
---|
596 | spr_address_next ++; |
---|
597 | } |
---|
598 | } |
---|
599 | } |
---|
600 | |
---|
601 | for (uint32_t i=0; i<_param->_nb_spr_read; i++) |
---|
602 | in_SPR_READ_VAL [i]->write(0); |
---|
603 | |
---|
604 | LABEL("insert rob"); |
---|
605 | |
---|
606 | uint32_t cpt = 0; |
---|
607 | |
---|
608 | while (cpt < nb_request) |
---|
609 | { |
---|
610 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
611 | { |
---|
612 | uint32_t x=_param->_nb_inst_insert_rob [i]; |
---|
613 | for (uint32_t j=0; j<x; j++) |
---|
614 | { |
---|
615 | in_INSERT_ROB_VAL [i][j]->write((rand() % 100) < percent_transaction_insert); |
---|
616 | in_INSERT_ROB_RD_USE [i][j]->write((rand() % 100) < percent_transaction_insert_use); |
---|
617 | in_INSERT_ROB_RD_NUM_REG [i][j]->write(rand() % _param->_nb_general_register [i]); |
---|
618 | in_INSERT_ROB_RE_USE [i][j]->write((rand() % 100) < percent_transaction_insert_use); |
---|
619 | in_INSERT_ROB_RE_NUM_REG [i][j]->write(rand() % _param->_nb_special_register [i]); |
---|
620 | } |
---|
621 | } |
---|
622 | |
---|
623 | SC_START(1); |
---|
624 | |
---|
625 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
626 | { |
---|
627 | uint32_t x=_param->_nb_inst_insert_rob [i]; |
---|
628 | for (uint32_t j=0; j<x; j++) |
---|
629 | { |
---|
630 | if (in_INSERT_ROB_VAL [i][j]->read() and out_INSERT_ROB_ACK [i][j]->read()) |
---|
631 | { |
---|
632 | cpt ++; |
---|
633 | |
---|
634 | if (in_INSERT_ROB_RD_USE [i][j]->read()) |
---|
635 | gpr_status [i][in_INSERT_ROB_RD_NUM_REG [i][j]->read()] = 0; |
---|
636 | |
---|
637 | if (in_INSERT_ROB_RE_USE [i][j]->read()) |
---|
638 | spr_status [i][in_INSERT_ROB_RE_NUM_REG [i][j]->read()] = 0; |
---|
639 | } |
---|
640 | } |
---|
641 | } |
---|
642 | } |
---|
643 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
644 | for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) |
---|
645 | in_INSERT_ROB_VAL [i][j]->write(0); |
---|
646 | |
---|
647 | LABEL("(GPR) Read - and test data writted"); |
---|
648 | |
---|
649 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
650 | { |
---|
651 | gpr_address_next = _param->_nb_gpr_read; |
---|
652 | nb_port_gpr_active = _param->_nb_gpr_read; |
---|
653 | |
---|
654 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
655 | { |
---|
656 | gpr_address[j] = j; |
---|
657 | if (j >= _param->_nb_general_register [i]) |
---|
658 | nb_port_gpr_active --; |
---|
659 | } |
---|
660 | |
---|
661 | while (nb_port_gpr_active > 0) |
---|
662 | { |
---|
663 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
664 | { |
---|
665 | in_GPR_READ_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and |
---|
666 | ((rand() % 100) < percent_transaction_read)); |
---|
667 | in_GPR_READ_OOO_ENGINE_ID [j]->write(i); |
---|
668 | in_GPR_READ_NUM_REG [j]->write(gpr_address[j]); |
---|
669 | } |
---|
670 | |
---|
671 | SC_START(1); |
---|
672 | |
---|
673 | // Test if read |
---|
674 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
675 | if (in_GPR_READ_VAL [j]->read() and out_GPR_READ_ACK [j]->read()) |
---|
676 | { |
---|
677 | TEST(Tgeneral_data_t, out_GPR_READ_DATA [j]->read(), gpr [i][gpr_address[j]]); |
---|
678 | TEST(Tcontrol_t , out_GPR_READ_DATA_VAL[j]->read(), gpr_status [i][gpr_address[j]]); |
---|
679 | |
---|
680 | gpr_address[j] = gpr_address_next; |
---|
681 | |
---|
682 | if (gpr_address_next >= _param->_nb_general_register [i]) |
---|
683 | nb_port_gpr_active --; |
---|
684 | |
---|
685 | gpr_address_next ++; |
---|
686 | } |
---|
687 | } |
---|
688 | } |
---|
689 | |
---|
690 | for (uint32_t i=0; i<_param->_nb_gpr_read; i++) |
---|
691 | in_GPR_READ_VAL [i]->write(0); |
---|
692 | |
---|
693 | LABEL("(SPR) Read - and test data writted"); |
---|
694 | |
---|
695 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
696 | { |
---|
697 | spr_address_next = _param->_nb_spr_read; |
---|
698 | nb_port_spr_active = _param->_nb_spr_read; |
---|
699 | |
---|
700 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
701 | { |
---|
702 | spr_address[j] = j; |
---|
703 | if (j >= _param->_nb_special_register [i]) |
---|
704 | nb_port_spr_active --; |
---|
705 | } |
---|
706 | |
---|
707 | while (nb_port_spr_active > 0) |
---|
708 | { |
---|
709 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
710 | { |
---|
711 | in_SPR_READ_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and |
---|
712 | ((rand() % 100) < percent_transaction_read)); |
---|
713 | in_SPR_READ_OOO_ENGINE_ID [j]->write(i); |
---|
714 | in_SPR_READ_NUM_REG [j]->write(spr_address[j]); |
---|
715 | } |
---|
716 | |
---|
717 | SC_START(1); |
---|
718 | |
---|
719 | // Test if read |
---|
720 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
721 | if (in_SPR_READ_VAL [j]->read() and out_SPR_READ_ACK [j]->read()) |
---|
722 | { |
---|
723 | TEST(Tspecial_data_t, out_SPR_READ_DATA [j]->read(), spr [i][spr_address[j]]); |
---|
724 | TEST(Tcontrol_t , out_SPR_READ_DATA_VAL[j]->read(), spr_status [i][spr_address[j]]); |
---|
725 | |
---|
726 | spr_address[j] = spr_address_next; |
---|
727 | |
---|
728 | if (spr_address_next >= _param->_nb_special_register [i]) |
---|
729 | nb_port_spr_active --; |
---|
730 | |
---|
731 | spr_address_next ++; |
---|
732 | } |
---|
733 | } |
---|
734 | } |
---|
735 | |
---|
736 | LABEL("retire rob"); |
---|
737 | |
---|
738 | cpt = 0; |
---|
739 | |
---|
740 | while (cpt < nb_request) |
---|
741 | { |
---|
742 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
743 | { |
---|
744 | uint32_t x=_param->_nb_inst_retire_rob [i]; |
---|
745 | for (uint32_t j=0; j<x; j++) |
---|
746 | { |
---|
747 | in_RETIRE_ROB_VAL [i][j]->write((rand() % 100) < percent_transaction_retire); |
---|
748 | in_RETIRE_ROB_RD_OLD_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use); |
---|
749 | in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]->write(rand() % _param->_nb_general_register [i]); |
---|
750 | in_RETIRE_ROB_RD_NEW_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use); |
---|
751 | in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]->write(rand() % _param->_nb_general_register [i]); |
---|
752 | in_RETIRE_ROB_RE_OLD_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use); |
---|
753 | in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]->write(rand() % _param->_nb_special_register [i]); |
---|
754 | in_RETIRE_ROB_RE_NEW_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use); |
---|
755 | in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]->write(rand() % _param->_nb_special_register [i]); |
---|
756 | } |
---|
757 | } |
---|
758 | |
---|
759 | SC_START(1); |
---|
760 | |
---|
761 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
762 | { |
---|
763 | uint32_t x=_param->_nb_inst_retire_rob [i]; |
---|
764 | for (uint32_t j=0; j<x; j++) |
---|
765 | { |
---|
766 | if (in_RETIRE_ROB_VAL [i][j]->read() and out_RETIRE_ROB_ACK [i][j]->read()) |
---|
767 | { |
---|
768 | cpt ++; |
---|
769 | |
---|
770 | if (in_RETIRE_ROB_RD_OLD_USE [i][j]->read()) |
---|
771 | gpr_status [i][in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]->read()] = 0; |
---|
772 | if (in_RETIRE_ROB_RD_NEW_USE [i][j]->read()) |
---|
773 | gpr_status [i][in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]->read()] = 1; |
---|
774 | if (in_RETIRE_ROB_RE_OLD_USE [i][j]->read()) |
---|
775 | spr_status [i][in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]->read()] = 0; |
---|
776 | if (in_RETIRE_ROB_RE_NEW_USE [i][j]->read()) |
---|
777 | spr_status [i][in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]->read()] = 1; |
---|
778 | } |
---|
779 | } |
---|
780 | } |
---|
781 | } |
---|
782 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
783 | for (uint32_t j=0; j<_param->_nb_inst_retire_rob [i]; j++) |
---|
784 | in_RETIRE_ROB_VAL [i][j]->write(0); |
---|
785 | |
---|
786 | LABEL("(GPR) Read - and test data writted"); |
---|
787 | |
---|
788 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
789 | { |
---|
790 | gpr_address_next = _param->_nb_gpr_read; |
---|
791 | nb_port_gpr_active = _param->_nb_gpr_read; |
---|
792 | |
---|
793 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
794 | { |
---|
795 | gpr_address[j] = j; |
---|
796 | if (j >= _param->_nb_general_register [i]) |
---|
797 | nb_port_gpr_active --; |
---|
798 | } |
---|
799 | |
---|
800 | while (nb_port_gpr_active > 0) |
---|
801 | { |
---|
802 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
803 | { |
---|
804 | in_GPR_READ_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and |
---|
805 | ((rand() % 100) < percent_transaction_read)); |
---|
806 | in_GPR_READ_OOO_ENGINE_ID [j]->write(i); |
---|
807 | in_GPR_READ_NUM_REG [j]->write(gpr_address[j]); |
---|
808 | } |
---|
809 | |
---|
810 | SC_START(1); |
---|
811 | |
---|
812 | // Test if read |
---|
813 | for (uint32_t j=0; j<_param->_nb_gpr_read; j++) |
---|
814 | if (in_GPR_READ_VAL [j]->read() and out_GPR_READ_ACK [j]->read()) |
---|
815 | { |
---|
816 | TEST(Tgeneral_data_t, out_GPR_READ_DATA [j]->read(), gpr [i][gpr_address[j]]); |
---|
817 | TEST(Tcontrol_t , out_GPR_READ_DATA_VAL[j]->read(), gpr_status [i][gpr_address[j]]); |
---|
818 | |
---|
819 | gpr_address[j] = gpr_address_next; |
---|
820 | |
---|
821 | if (gpr_address_next >= _param->_nb_general_register [i]) |
---|
822 | nb_port_gpr_active --; |
---|
823 | |
---|
824 | gpr_address_next ++; |
---|
825 | } |
---|
826 | } |
---|
827 | } |
---|
828 | |
---|
829 | for (uint32_t i=0; i<_param->_nb_gpr_read; i++) |
---|
830 | in_GPR_READ_VAL [i]->write(0); |
---|
831 | |
---|
832 | LABEL("(SPR) Read - and test data writted"); |
---|
833 | |
---|
834 | for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) |
---|
835 | { |
---|
836 | spr_address_next = _param->_nb_spr_read; |
---|
837 | nb_port_spr_active = _param->_nb_spr_read; |
---|
838 | |
---|
839 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
840 | { |
---|
841 | spr_address[j] = j; |
---|
842 | if (j >= _param->_nb_special_register [i]) |
---|
843 | nb_port_spr_active --; |
---|
844 | } |
---|
845 | |
---|
846 | while (nb_port_spr_active > 0) |
---|
847 | { |
---|
848 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
849 | { |
---|
850 | in_SPR_READ_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and |
---|
851 | ((rand() % 100) < percent_transaction_read)); |
---|
852 | in_SPR_READ_OOO_ENGINE_ID [j]->write(i); |
---|
853 | in_SPR_READ_NUM_REG [j]->write(spr_address[j]); |
---|
854 | } |
---|
855 | |
---|
856 | SC_START(1); |
---|
857 | |
---|
858 | // Test if read |
---|
859 | for (uint32_t j=0; j<_param->_nb_spr_read; j++) |
---|
860 | if (in_SPR_READ_VAL [j]->read() and out_SPR_READ_ACK [j]->read()) |
---|
861 | { |
---|
862 | TEST(Tspecial_data_t, out_SPR_READ_DATA [j]->read(), spr [i][spr_address[j]]); |
---|
863 | TEST(Tcontrol_t , out_SPR_READ_DATA_VAL[j]->read(), spr_status [i][spr_address[j]]); |
---|
864 | |
---|
865 | spr_address[j] = spr_address_next; |
---|
866 | |
---|
867 | if (spr_address_next >= _param->_nb_special_register [i]) |
---|
868 | nb_port_spr_active --; |
---|
869 | |
---|
870 | spr_address_next ++; |
---|
871 | } |
---|
872 | } |
---|
873 | } |
---|
874 | |
---|
875 | } |
---|
876 | |
---|
877 | /******************************************************** |
---|
878 | * Simulation - End |
---|
879 | ********************************************************/ |
---|
880 | |
---|
881 | TEST_OK ("End of Simulation"); |
---|
882 | delete _time; |
---|
883 | cout << "<" << name << "> ............ Stop Simulation" << endl; |
---|
884 | |
---|
885 | delete in_CLOCK; |
---|
886 | delete in_NRESET; |
---|
887 | |
---|
888 | delete [] in_GPR_READ_VAL ; |
---|
889 | delete [] out_GPR_READ_ACK ; |
---|
890 | delete [] in_GPR_READ_OOO_ENGINE_ID ; |
---|
891 | delete [] in_GPR_READ_NUM_REG ; |
---|
892 | delete [] out_GPR_READ_DATA ; |
---|
893 | delete [] out_GPR_READ_DATA_VAL ; |
---|
894 | delete [] in_GPR_WRITE_VAL ; |
---|
895 | delete [] out_GPR_WRITE_ACK ; |
---|
896 | delete [] in_GPR_WRITE_OOO_ENGINE_ID ; |
---|
897 | delete [] in_GPR_WRITE_NUM_REG ; |
---|
898 | delete [] in_GPR_WRITE_DATA ; |
---|
899 | delete [] in_SPR_READ_VAL ; |
---|
900 | delete [] out_SPR_READ_ACK ; |
---|
901 | delete [] in_SPR_READ_OOO_ENGINE_ID ; |
---|
902 | delete [] in_SPR_READ_NUM_REG ; |
---|
903 | delete [] out_SPR_READ_DATA ; |
---|
904 | delete [] out_SPR_READ_DATA_VAL ; |
---|
905 | delete [] in_SPR_WRITE_VAL ; |
---|
906 | delete [] out_SPR_WRITE_ACK ; |
---|
907 | delete [] in_SPR_WRITE_OOO_ENGINE_ID ; |
---|
908 | delete [] in_SPR_WRITE_NUM_REG ; |
---|
909 | delete [] in_SPR_WRITE_DATA ; |
---|
910 | delete [] in_INSERT_ROB_VAL ; |
---|
911 | delete [] out_INSERT_ROB_ACK ; |
---|
912 | delete [] in_INSERT_ROB_RD_USE ; |
---|
913 | delete [] in_INSERT_ROB_RD_NUM_REG ; |
---|
914 | delete [] in_INSERT_ROB_RE_USE ; |
---|
915 | delete [] in_INSERT_ROB_RE_NUM_REG ; |
---|
916 | delete [] in_RETIRE_ROB_VAL ; |
---|
917 | delete [] out_RETIRE_ROB_ACK ; |
---|
918 | delete [] in_RETIRE_ROB_RD_OLD_USE ; |
---|
919 | delete [] in_RETIRE_ROB_RD_OLD_NUM_REG ; |
---|
920 | delete [] in_RETIRE_ROB_RD_NEW_USE ; |
---|
921 | delete [] in_RETIRE_ROB_RD_NEW_NUM_REG ; |
---|
922 | delete [] in_RETIRE_ROB_RE_OLD_USE ; |
---|
923 | delete [] in_RETIRE_ROB_RE_OLD_NUM_REG ; |
---|
924 | delete [] in_RETIRE_ROB_RE_NEW_USE ; |
---|
925 | delete [] in_RETIRE_ROB_RE_NEW_NUM_REG ; |
---|
926 | #endif |
---|
927 | |
---|
928 | delete _Register_unit; |
---|
929 | #ifdef STATISTICS |
---|
930 | delete _parameters_statistics; |
---|
931 | #endif |
---|
932 | } |
---|