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Execute_loop_allocation.cpp @ 78

Last change on this file since 78 was 78, checked in by rosiere, 16 years ago

Add :

Execute_loop (must be test systemC)
Prediction
- Direction : predifined scheme
- Branch Target Buffer
iFetch_unit
- ifetch_queue
- pc management
Decod_unit
- coming soon : support for custom operation
Rename_unit
- RAT
- Free_list
- Dependence RAW check
- Load store unit pointer
New Environnement (hierarchy_memory will remove in a next version)

Modif :

Manage Custom Operation
All component in execute_loop to use the new statistics management

Not Finish :

Return Address Stack
Environnement

File size: 88.0 KB

Line
1	/*
2	* $Id$
3	*
4	* [ Description ]
5	*
6	*/
7
8	#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h"
9	#include "Behavioural/include/Allocation.h"
10
11	namespace morpheo {
12	namespace behavioural {
13	namespace core {
14	namespace multi_execute_loop {
15	namespace execute_loop {
16
17
18
19	#undef FUNCTION
20	#define FUNCTION "Execute_loop::allocation"
21	void Execute_loop::allocation (
22	#ifdef STATISTICS
23	morpheo::behavioural::Parameters_Statistics * param_statistics
24	#else
25	void
26	#endif
27	)
28	{
29	log_printf(FUNC,Execute_loop,FUNCTION,"Begin");
30
31	_component = new Component (_usage);
32
33	Entity * entity = _component->set_entity (_name
34	,"Execute_loop"
35	#ifdef POSITION
36	,COMBINATORY
37	#endif
38	);
39
40	_interfaces = entity->set_interfaces();
41
42	// ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
43
44	Interface * interface = _interfaces->set_interface(""
45	#ifdef POSITION
46	,IN
47	,SOUTH,
48	"Generalist interface"
49	#endif
50	);
51
52	in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES);
53	in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
54
55	// ~~~~~[ Interface "execute_loop_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
56	{
57	ALLOC1_INTERFACE("execute_loop_in", IN, EAST, "Operation's Input", _param->_nb_read_unit);
58
59	ALLOC1_VALACK_IN ( in_EXECUTE_LOOP_IN_VAL,VAL);
60	ALLOC1_VALACK_OUT(out_EXECUTE_LOOP_IN_ACK,ACK);
61	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id);
62	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id);
63	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_OOO_ENGINE_ID ,"ooo_engine_id" ,Tcontext_t ,_param->_size_ooo_engine_id);
64	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_packet_id);
65	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation);
66	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type);
67	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_max_size_store_queue);
68	if (_param->_have_port_load_queue_ptr)
69	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,_param->_max_size_load_queue);
70	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1);
71	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_IMMEDIAT ,"immediat" ,Tgeneral_data_t ,_param->_size_general_data);
72	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_READ_RA ,"read_ra" ,Tcontrol_t ,1);
73	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_NUM_REG_RA ,"num_reg_ra" ,Tgeneral_address_t,_param->_size_general_register);
74	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_READ_RB ,"read_rb" ,Tcontrol_t ,1);
75	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_NUM_REG_RB ,"num_reg_rb" ,Tgeneral_address_t,_param->_size_general_register);
76	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_READ_RC ,"read_rc" ,Tcontrol_t ,1);
77	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_NUM_REG_RC ,"num_reg_rc" ,Tspecial_address_t,_param->_size_special_register);
78	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_WRITE_RD ,"write_rd" ,Tcontrol_t ,1);
79	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register);
80	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_WRITE_RE ,"write_re" ,Tcontrol_t ,1);
81	ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_NUM_REG_RE ,"num_reg_re" ,Tspecial_address_t,_param->_size_special_register);
82	}
83	// ~~~~~[ Interface "execute_loop_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
84	{
85	ALLOC1_INTERFACE("execute_loop_out",OUT, EAST, "Operation's Output", _param->_nb_write_unit);
86
87	ALLOC1_VALACK_OUT(out_EXECUTE_LOOP_OUT_VAL,VAL);
88	ALLOC1_VALACK_IN ( in_EXECUTE_LOOP_OUT_ACK,ACK);
89	ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id);
90	ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id);
91	ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id);
92	ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_packet_id);
93	// ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation);
94	// ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type);
95	ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_FLAGS ,"flags" ,Tspecial_data_t,_param->_size_special_data);
96	ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception);
97	ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_NO_SEQUENCE ,"no_sequence" ,Tcontrol_t ,1);
98	ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_ADDRESS ,"address" ,Tgeneral_data_t,_param->_size_general_data);
99	}
100	// ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
101	{
102	ALLOC1_INTERFACE("dcache_req",OUT, NORTH, "Data cache port : request", _param->_nb_load_store_unit);
103
104	ALLOC1_VALACK_OUT(out_DCACHE_REQ_VAL,VAL);
105	ALLOC1_VALACK_IN ( in_DCACHE_REQ_ACK,ACK);
106	ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_CONTEXT_ID,"context_id",Tcontext_t ,_param->_max_size_dcache_context_id);
107	ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_max_size_dcache_packet_id );
108	ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_ADDRESS ,"address" ,Tdcache_address_t,_param->_size_general_data);
109	ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_TYPE ,"type" ,Tdcache_type_t ,_param->_size_dcache_type);
110	ALLOC1_SIGNAL_OUT(out_DCACHE_REQ_WDATA ,"wdata" ,Tdcache_data_t ,_param->_size_general_data);
111	}
112	// ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
113	{
114	ALLOC1_INTERFACE("dcache_rsp",IN, NORTH, "Data cache port : respons", _param->_nb_load_store_unit);
115
116	ALLOC1_VALACK_IN ( in_DCACHE_RSP_VAL,VAL);
117	ALLOC1_VALACK_OUT(out_DCACHE_RSP_ACK,ACK);
118	ALLOC1_SIGNAL_IN ( in_DCACHE_RSP_CONTEXT_ID,"context_id",Tcontext_t ,_param->_max_size_dcache_context_id);
119	ALLOC1_SIGNAL_IN ( in_DCACHE_RSP_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_max_size_dcache_packet_id);
120	ALLOC1_SIGNAL_IN ( in_DCACHE_RSP_RDATA ,"rdata" ,Tdcache_data_t ,_param->_size_general_data);
121	ALLOC1_SIGNAL_IN ( in_DCACHE_RSP_ERROR ,"error" ,Tdcache_error_t,_param->_size_dcache_error);
122	}
123	// ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
124	{
125	ALLOC2_INTERFACE("insert_rob",IN, EAST, "Rename's stage : insert a new instruction in the Re Order Buffer",_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_interface_it1]);
126
127	_ALLOC2_VALACK_IN ( in_INSERT_ROB_VAL,VAL,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
128	_ALLOC2_VALACK_OUT(out_INSERT_ROB_ACK,ACK,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
129
130	_ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_USE ,"rd_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
131	_ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_NUM_REG,"rd_num_reg",Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
132	_ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_USE ,"re_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
133	_ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_NUM_REG,"re_num_reg",Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[alloc_signal_it1]);
134	}
135	// ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
136	{
137	ALLOC2_INTERFACE("retire_rob",IN, EAST, "Rename's stage : retire a new instruction in the Re Order Buffer",_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_interface_it1]);
138
139	_ALLOC2_VALACK_IN ( in_RETIRE_ROB_VAL,VAL,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
140	_ALLOC2_VALACK_OUT(out_RETIRE_ROB_ACK,ACK,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
141
142	_ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RD_OLD_USE ,"rd_old_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
143	_ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RD_OLD_NUM_REG,"rd_old_num_reg",Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
144	_ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RD_NEW_USE ,"rd_new_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
145	_ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RD_NEW_NUM_REG,"rd_new_num_reg",Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
146	_ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RE_OLD_USE ,"re_old_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
147	_ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RE_OLD_NUM_REG,"re_old_num_reg",Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
148	_ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RE_NEW_USE ,"re_new_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
149	_ALLOC2_SIGNAL_IN ( in_RETIRE_ROB_RE_NEW_NUM_REG,"re_new_num_reg",Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[alloc_signal_it1]);
150	}
151
152	// ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
153	std::string name;
154
155	_component_read_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::Read_unit * [_param->_nb_read_unit];
156	for (uint32_t i=0; i<_param->_nb_read_unit; i++)
157	{
158	name = _name+"_read_unit_"+toString(i);
159	std::cout << "Create : " << name << std::endl;
160
161	_component_read_unit [i] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::Read_unit
162	(name.c_str()
163	#ifdef STATISTICS
164	,param_statistics
165	#endif
166	,_param->_param_read_unit[i]);
167
168	_component->set_component (_component_read_unit [i]->_component
169	#ifdef POSITION
170	, 50, 50, 10, 10
171	#endif
172	);
173	}
174
175	_component_functionnal_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::Functionnal_unit * [_param->_nb_functionnal_unit];
176	for (uint32_t i=0; i<_param->_nb_functionnal_unit; i++)
177	{
178	name = _name+"_functionnal_unit_"+toString(i);
179	std::cout << "Create : " << name << std::endl;
180
181	_component_functionnal_unit [i] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::functionnal_unit::Functionnal_unit
182	(name.c_str()
183	#ifdef STATISTICS
184	,param_statistics
185	#endif
186	,_param->_param_functionnal_unit[i]);
187
188	_component->set_component (_component_functionnal_unit [i]->_component
189	#ifdef POSITION
190	, 50, 50, 10, 10
191	#endif
192	);
193	}
194
195	_component_load_store_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Load_store_unit * [_param->_nb_load_store_unit];
196	for (uint32_t i=0; i<_param->_nb_load_store_unit; i++)
197	{
198	name = _name+"_load_store_unit_"+toString(i);
199	std::cout << "Create : " << name << std::endl;
200
201	_component_load_store_unit [i] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Load_store_unit
202	(name.c_str()
203	#ifdef STATISTICS
204	,param_statistics
205	#endif
206	,_param->_param_load_store_unit[i]);
207
208	_component->set_component (_component_load_store_unit [i]->_component
209	#ifdef POSITION
210	, 50, 50, 10, 10
211	#endif
212	);
213	}
214
215	_component_write_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Write_unit * [_param->_nb_write_unit];
216	for (uint32_t i=0; i<_param->_nb_write_unit; i++)
217	{
218	name = _name+"_write_unit_"+toString(i);
219	std::cout << "Create : " << name << std::endl;
220
221	_component_write_unit [i] = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Write_unit
222	(name.c_str()
223	#ifdef STATISTICS
224	,param_statistics
225	#endif
226	,_param->_param_write_unit[i]);
227
228	_component->set_component (_component_write_unit [i]->_component
229	#ifdef POSITION
230	, 50, 50, 10, 10
231	#endif
232	);
233	}
234
235	{
236	name = _name+"_read_unit_to_execution_unit";
237	std::cout << "Create : " << name << std::endl;
238
239	_component_read_unit_to_execution_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::network::read_unit_to_execution_unit::Read_unit_to_Execution_unit
240	(name.c_str()
241	#ifdef STATISTICS
242	,param_statistics
243	#endif
244	,_param->_param_read_unit_to_execution_unit);
245
246	_component->set_component (_component_read_unit_to_execution_unit->_component
247	#ifdef POSITION
248	, 50, 50, 10, 10
249	#endif
250	);
251	}
252
253	{
254	name = _name+"_execution_unit_to_write_unit";
255	std::cout << "Create : " << name << std::endl;
256
257	_component_execution_unit_to_write_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::network::execution_unit_to_write_unit::Execution_unit_to_Write_unit
258	(name.c_str()
259	#ifdef STATISTICS
260	,param_statistics
261	#endif
262	,_param->_param_execution_unit_to_write_unit);
263
264	_component->set_component (_component_execution_unit_to_write_unit->_component
265	#ifdef POSITION
266	, 50, 50, 10, 10
267	#endif
268	);
269	}
270
271	{
272	name = _name+"_register_unit";
273	std::cout << "Create : " << name << std::endl;
274
275	_component_register_unit = new morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::Register_unit
276	(name.c_str()
277	#ifdef STATISTICS
278	,param_statistics
279	#endif
280	,_param->_param_register_unit);
281
282	_component->set_component (_component_register_unit->_component
283	#ifdef POSITION
284	, 50, 50, 10, 10
285	#endif
286	);
287	}
288
289	// ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
290	std::string src,dest;
291
292	// ===================================================================
293	// =====[ READ_UNIT ]=================================================
294	// ===================================================================
295	{
296	uint32_t it_read_unit_out = 0;
297
298	for (uint32_t i=0; i<_param->_nb_read_unit; i++)
299	{
300	src = _name+"_read_unit_"+toString(i);
301	std::cout << "Instance : " << src << std::endl;
302
303	{
304	dest = _name;
305	#ifdef POSITION
306	_component->interface_map (src ,"",
307	dest,"");
308	#endif
309	PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK");
310	PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET");
311	}
312
313	// ~~~~~[ Interface "read_unit_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
314	{
315	dest = _name;
316	#ifdef POSITION
317	_component->interface_map (src ,"read_unit_in",
318	dest,"execute_loop_in_"+toString(i));
319	#endif
320
321	PORT_MAP(_component ,src , "in_READ_UNIT_IN_VAL" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_VAL" );
322	PORT_MAP(_component ,src ,"out_READ_UNIT_IN_ACK" ,dest ,"out_EXECUTE_LOOP_IN_"+toString(i)+"_ACK" );
323	if (_param->_have_port_context_id)
324	PORT_MAP(_component ,src , "in_READ_UNIT_IN_CONTEXT_ID" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_CONTEXT_ID" );
325	if (_param->_have_port_front_end_id)
326	PORT_MAP(_component ,src , "in_READ_UNIT_IN_FRONT_END_ID" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_FRONT_END_ID" );
327	if (_param->_have_port_ooo_engine_id)
328	PORT_MAP(_component ,src , "in_READ_UNIT_IN_OOO_ENGINE_ID" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_OOO_ENGINE_ID" );
329	if (_param->_have_port_packet_id)
330	PORT_MAP(_component ,src , "in_READ_UNIT_IN_PACKET_ID" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_PACKET_ID" );
331	PORT_MAP(_component ,src , "in_READ_UNIT_IN_OPERATION" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_OPERATION" );
332	PORT_MAP(_component ,src , "in_READ_UNIT_IN_TYPE" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_TYPE" );
333	PORT_MAP(_component ,src , "in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE",dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
334	if (_param->_have_port_load_queue_ptr)
335	PORT_MAP(_component ,src , "in_READ_UNIT_IN_LOAD_QUEUE_PTR_WRITE" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
336	PORT_MAP(_component ,src , "in_READ_UNIT_IN_HAS_IMMEDIAT" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_HAS_IMMEDIAT" );
337	PORT_MAP(_component ,src , "in_READ_UNIT_IN_IMMEDIAT" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_IMMEDIAT" );
338	PORT_MAP(_component ,src , "in_READ_UNIT_IN_READ_RA" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_READ_RA" );
339	PORT_MAP(_component ,src , "in_READ_UNIT_IN_NUM_REG_RA" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RA" );
340	PORT_MAP(_component ,src , "in_READ_UNIT_IN_READ_RB" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_READ_RB" );
341	PORT_MAP(_component ,src , "in_READ_UNIT_IN_NUM_REG_RB" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RB" );
342	PORT_MAP(_component ,src , "in_READ_UNIT_IN_READ_RC" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_READ_RC" );
343	PORT_MAP(_component ,src , "in_READ_UNIT_IN_NUM_REG_RC" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RC" );
344	PORT_MAP(_component ,src , "in_READ_UNIT_IN_WRITE_RD" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_WRITE_RD" );
345	PORT_MAP(_component ,src , "in_READ_UNIT_IN_NUM_REG_RD" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RD" );
346	PORT_MAP(_component ,src , "in_READ_UNIT_IN_WRITE_RE" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_WRITE_RE" );
347	PORT_MAP(_component ,src , "in_READ_UNIT_IN_NUM_REG_RE" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RE" );
348	}
349
350	// ~~~~~[ Interface "read_unit_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
351	for (uint32_t j=0; j < _param->_nb_inst_retire[i]; j++)
352	{
353	dest = _name+"_read_unit_to_execution_unit";
354
355	#ifdef POSITION
356	_component->interface_map (src ,"read_unit_"+toString(i),
357	dest,"read_unit_"+toString(it_read_unit_out));
358	#endif
359
360	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_VAL" ,
361	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_VAL" );
362	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(i )+"_ACK" ,
363	dest,"out_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_ACK" );
364	if (_param->_have_port_context_id)
365	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_CONTEXT_ID" ,
366	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_CONTEXT_ID" );
367	if (_param->_have_port_front_end_id)
368	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_FRONT_END_ID" ,
369	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_FRONT_END_ID" );
370	if (_param->_have_port_ooo_engine_id)
371	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_OOO_ENGINE_ID" ,
372	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_OOO_ENGINE_ID" );
373	if (_param->_have_port_packet_id)
374	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_PACKET_ID" ,
375	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_PACKET_ID" );
376	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_OPERATION" ,
377	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_OPERATION" );
378	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_TYPE" ,
379	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_TYPE" );
380	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_STORE_QUEUE_PTR_WRITE",
381	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_STORE_QUEUE_PTR_WRITE");
382	if (_param->_have_port_load_queue_ptr)
383	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_LOAD_QUEUE_PTR_WRITE" ,
384	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_LOAD_QUEUE_PTR_WRITE" );
385	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_HAS_IMMEDIAT" ,
386	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_HAS_IMMEDIAT" );
387	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_IMMEDIAT" ,
388	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_IMMEDIAT" );
389	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_DATA_RA" ,
390	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RA" );
391	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_DATA_RB" ,
392	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RB" );
393	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_DATA_RC" ,
394	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RC" );
395	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_WRITE_RD" ,
396	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_WRITE_RD" );
397	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_NUM_REG_RD" ,
398	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_NUM_REG_RD" );
399	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_WRITE_RE" ,
400	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_WRITE_RE" );
401	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(i )+"_NUM_REG_RE" ,
402	dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_NUM_REG_RE" );
403
404	it_read_unit_out ++;
405	}
406
407	// ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
408	{
409	dest = _name+"_register_unit";
410	#ifdef POSITION
411	_component->interface_map (src ,"gpr_read_0",
412	dest,"gpr_read_"+toString(2*i ));
413	_component->interface_map (src ,"gpr_read_1",
414	dest,"gpr_read_"+toString(2*i+1));
415	#endif
416	PORT_MAP(_component ,src ,"out_GPR_READ_0_VAL" , dest, "in_GPR_READ_"+toString(2*i )+"_VAL" );
417	PORT_MAP(_component ,src , "in_GPR_READ_0_ACK" , dest,"out_GPR_READ_"+toString(2*i )+"_ACK" );
418	if (_param->_have_port_ooo_engine_id)
419	PORT_MAP(_component ,src ,"out_GPR_READ_0_OOO_ENGINE_ID", dest, "in_GPR_READ_"+toString(2*i )+"_OOO_ENGINE_ID");
420	PORT_MAP(_component ,src ,"out_GPR_READ_0_NUM_REG" , dest, "in_GPR_READ_"+toString(2*i )+"_NUM_REG" );
421	PORT_MAP(_component ,src , "in_GPR_READ_0_DATA" , dest,"out_GPR_READ_"+toString(2*i )+"_DATA" );
422	PORT_MAP(_component ,src , "in_GPR_READ_0_DATA_VAL" , dest,"out_GPR_READ_"+toString(2*i )+"_DATA_VAL" );
423	PORT_MAP(_component ,src ,"out_GPR_READ_1_VAL" , dest, "in_GPR_READ_"+toString(2*i+1)+"_VAL" );
424	PORT_MAP(_component ,src , "in_GPR_READ_1_ACK" , dest,"out_GPR_READ_"+toString(2*i+1)+"_ACK" );
425	if (_param->_have_port_ooo_engine_id)
426	PORT_MAP(_component ,src ,"out_GPR_READ_1_OOO_ENGINE_ID", dest, "in_GPR_READ_"+toString(2*i+1)+"_OOO_ENGINE_ID");
427	PORT_MAP(_component ,src ,"out_GPR_READ_1_NUM_REG" , dest, "in_GPR_READ_"+toString(2*i+1)+"_NUM_REG" );
428	PORT_MAP(_component ,src , "in_GPR_READ_1_DATA" , dest,"out_GPR_READ_"+toString(2*i+1)+"_DATA" );
429	PORT_MAP(_component ,src , "in_GPR_READ_1_DATA_VAL" , dest,"out_GPR_READ_"+toString(2*i+1)+"_DATA_VAL" );
430	}
431
432	// ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
433	{
434	dest = _name+"_register_unit";
435	#ifdef POSITION
436	_component->interface_map (src ,"spr_read_0",
437	dest,"spr_read_"+toString(2*i ));
438	#endif
439	PORT_MAP(_component ,src ,"out_SPR_READ_0_VAL" , dest, "in_SPR_READ_"+toString(2*i )+"_VAL" );
440	PORT_MAP(_component ,src , "in_SPR_READ_0_ACK" , dest,"out_SPR_READ_"+toString(2*i )+"_ACK" );
441	if (_param->_have_port_ooo_engine_id)
442	PORT_MAP(_component ,src ,"out_SPR_READ_0_OOO_ENGINE_ID", dest, "in_SPR_READ_"+toString(2*i )+"_OOO_ENGINE_ID");
443	PORT_MAP(_component ,src ,"out_SPR_READ_0_NUM_REG" , dest, "in_SPR_READ_"+toString(2*i )+"_NUM_REG" );
444	PORT_MAP(_component ,src , "in_SPR_READ_0_DATA" , dest,"out_SPR_READ_"+toString(2*i )+"_DATA" );
445	PORT_MAP(_component ,src , "in_SPR_READ_0_DATA_VAL" , dest,"out_SPR_READ_"+toString(2*i )+"_DATA_VAL" );
446	}
447
448	// ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
449	uint32_t it_gpr_write = 0;
450	for (std::set<uint32_t>::iterator it=_param->_set_read_unit_source_register_write[i].begin();
451	it!=_param->_set_read_unit_source_register_write[i].end();
452	it++)
453	{
454	dest = _name+"_write_unit_"+toString(*it);
455	#ifdef POSITION
456	_component->interface_map (src ,"gpr_write_"+toString(it_gpr_write),
457	dest,"gpr_write");
458	#endif
459
460	PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_VAL" ,
461	dest,"out_GPR_WRITE_0_VAL" );
462	if (_param->_have_port_ooo_engine_id)
463	PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_OOO_ENGINE_ID",
464	dest,"out_GPR_WRITE_0_OOO_ENGINE_ID");
465	PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_NUM_REG" ,
466	dest,"out_GPR_WRITE_0_NUM_REG" );
467	PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_DATA" ,
468	dest,"out_GPR_WRITE_0_DATA" );
469
470	// PORT MAP to the "write_unit" component
471	#ifdef POSITION
472	_component->interface_map (dest,"gpr_write",
473	src ,"gpr_write_"+toString(it_gpr_write));
474	#endif
475
476	PORT_MAP(_component ,dest,"out_GPR_WRITE_0_VAL" ,
477	src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_VAL" );
478	if (_param->_have_port_ooo_engine_id)
479	PORT_MAP(_component ,dest,"out_GPR_WRITE_0_OOO_ENGINE_ID",
480	src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_OOO_ENGINE_ID");
481	PORT_MAP(_component ,dest,"out_GPR_WRITE_0_NUM_REG" ,
482	src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_NUM_REG" );
483	PORT_MAP(_component ,dest,"out_GPR_WRITE_0_DATA" ,
484	src , "in_GPR_WRITE_"+toString(it_gpr_write)+"_DATA" );
485
486	it_gpr_write ++;
487	}
488
489	// ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
490	uint32_t it_spr_write = 0;
491	for (std::set<uint32_t>::iterator it=_param->_set_read_unit_source_register_write[i].begin();
492	it!=_param->_set_read_unit_source_register_write[i].end();
493	it++)
494	{
495	dest = _name+"_write_unit_"+toString(*it);
496	#ifdef POSITION
497	_component->interface_map (src ,"spr_write_"+toString(it_spr_write),
498	dest,"spr_write");
499	#endif
500
501	PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(it_spr_write)+"_VAL" ,
502	dest,"out_SPR_WRITE_0_VAL" );
503	if (_param->_have_port_ooo_engine_id)
504	PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(it_spr_write)+"_OOO_ENGINE_ID",
505	dest,"out_SPR_WRITE_0_OOO_ENGINE_ID");
506	PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(it_spr_write)+"_NUM_REG" ,
507	dest,"out_SPR_WRITE_0_NUM_REG" );
508	PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(it_spr_write)+"_DATA" ,
509	dest,"out_SPR_WRITE_0_DATA" );
510
511	// PORT MAP to the "write_unit" component
512	#ifdef POSITION
513	_component->interface_map (dest,"spr_write",
514	src ,"spr_write_"+toString(it_spr_write));
515	#endif
516	PORT_MAP(_component ,dest,"out_SPR_WRITE_0_VAL" ,
517	src , "in_SPR_WRITE_"+toString(it_spr_write)+"_VAL" );
518	if (_param->_have_port_ooo_engine_id)
519	PORT_MAP(_component ,dest,"out_SPR_WRITE_0_OOO_ENGINE_ID",
520	src , "in_SPR_WRITE_"+toString(it_spr_write)+"_OOO_ENGINE_ID");
521	PORT_MAP(_component ,dest,"out_SPR_WRITE_0_NUM_REG" ,
522	src , "in_SPR_WRITE_"+toString(it_spr_write)+"_NUM_REG" );
523	PORT_MAP(_component ,dest,"out_SPR_WRITE_0_DATA" ,
524	src , "in_SPR_WRITE_"+toString(it_spr_write)+"_DATA" );
525
526	it_spr_write ++;
527	}
528
529	// ~~~~~[ Interface "bypass_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
530	uint32_t it_bypass_write = 0;
531	for (std::set<uint32_t>::iterator it=_param->_set_read_unit_source_bypass_write[i].begin();
532	it!=_param->_set_read_unit_source_bypass_write[i].end();
533	it++)
534	{
535	dest = _name+"_write_unit_"+toString(*it);
536
537	for (uint32_t j=0; j<_param->_nb_bypass_write[*it]; j++)
538	{
539	#ifdef POSITION
540	_component->interface_map (src ,"bypass_write_"+toString(it_bypass_write),
541	dest,"bypass_write_"+toString(j));
542	#endif
543
544	if (_param->_have_port_ooo_engine_id)
545	PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_OOO_ENGINE_ID",
546	dest,"out_BYPASS_WRITE_"+toString(j )+"_OOO_ENGINE_ID");
547	PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_VAL" ,
548	dest,"out_BYPASS_WRITE_"+toString(j )+"_GPR_VAL" );
549	PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_NUM_REG" ,
550	dest,"out_BYPASS_WRITE_"+toString(j )+"_GPR_NUM_REG" );
551	PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_DATA" ,
552	dest,"out_BYPASS_WRITE_"+toString(j )+"_GPR_DATA" );
553	PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_VAL" ,
554	dest,"out_BYPASS_WRITE_"+toString(j )+"_SPR_VAL" );
555	PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_NUM_REG" ,
556	dest,"out_BYPASS_WRITE_"+toString(j )+"_SPR_NUM_REG" );
557	PORT_MAP(_component ,src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_DATA" ,
558	dest,"out_BYPASS_WRITE_"+toString(j )+"_SPR_DATA" );
559
560	#ifdef POSITION
561	_component->interface_map (dest,"bypass_write_"+toString(j),
562	src ,"bypass_write_"+toString(it_bypass_write));
563	#endif
564
565	if (_param->_have_port_ooo_engine_id)
566	PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j )+"_OOO_ENGINE_ID",
567	src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_OOO_ENGINE_ID");
568	PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j )+"_GPR_VAL" ,
569	src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_VAL" );
570	PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j )+"_GPR_NUM_REG" ,
571	src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_NUM_REG" );
572	PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j )+"_GPR_DATA" ,
573	src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_GPR_DATA" );
574	PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j )+"_SPR_VAL" ,
575	src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_VAL" );
576	PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j )+"_SPR_NUM_REG" ,
577	src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_NUM_REG" );
578	PORT_MAP(_component ,dest,"out_BYPASS_WRITE_"+toString(j )+"_SPR_DATA" ,
579	src , "in_BYPASS_WRITE_"+toString(it_bypass_write)+"_SPR_DATA" );
580
581	it_bypass_write ++;
582	}
583	}
584
585	// ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
586	uint32_t it_bypass_memory = 0;
587	for (std::set<uint32_t>::iterator it=_param->_set_read_unit_source_bypass_memory[i].begin();
588	it!=_param->_set_read_unit_source_bypass_memory[i].end();
589	it++)
590	{
591	dest = _name+"_load_store_unit_"+toString(_param->_translate_num_execute_unit[*it]);
592
593	for (uint32_t j=0; j<_param->_nb_bypass_memory[_param->_translate_num_execute_unit[*it]]; j++)
594	{
595	#ifdef POSITION
596	_component->interface_map (src ,"bypass_memory_"+toString(it_bypass_memory),
597	dest,"bypass_memory_"+toString(j));
598	#endif
599
600	if (_param->_have_port_ooo_engine_id)
601	PORT_MAP(_component ,src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_OOO_ENGINE_ID",
602	dest,"out_BYPASS_MEMORY_"+toString(j )+"_OOO_ENGINE_ID");
603	PORT_MAP(_component ,src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_VAL" ,
604	dest,"out_BYPASS_MEMORY_"+toString(j )+"_VAL" );
605	PORT_MAP(_component ,src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_NUM_REG" ,
606	dest,"out_BYPASS_MEMORY_"+toString(j )+"_NUM_REG" );
607	PORT_MAP(_component ,src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_DATA" ,
608	dest,"out_BYPASS_MEMORY_"+toString(j )+"_DATA" );
609
610	// port map to the "load_store_unit" component
611	#ifdef POSITION
612	_component->interface_map (dest,"bypass_memory_"+toString(j),
613	src ,"bypass_memory_"+toString(it_bypass_memory));
614	#endif
615
616	if (_param->_have_port_ooo_engine_id)
617	PORT_MAP(_component ,dest,"out_BYPASS_MEMORY_"+toString(j )+"_OOO_ENGINE_ID",
618	src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_OOO_ENGINE_ID");
619	PORT_MAP(_component ,dest,"out_BYPASS_MEMORY_"+toString(j )+"_VAL" ,
620	src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_VAL" );
621	PORT_MAP(_component ,dest,"out_BYPASS_MEMORY_"+toString(j )+"_NUM_REG" ,
622	src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_NUM_REG" );
623	PORT_MAP(_component ,dest,"out_BYPASS_MEMORY_"+toString(j )+"_DATA" ,
624	src , "in_BYPASS_MEMORY_"+toString(it_bypass_memory)+"_DATA" );
625
626	it_bypass_memory ++;
627	}
628	}
629	}
630	}
631
632	// ===================================================================
633	// =====[ EXECUTE_UNIT ]==============================================
634	// ===================================================================
635	for (uint32_t i=0; i<_param->_nb_execute_unit; i++)
636	{
637	uint32_t x=_param->_translate_num_execute_unit[i];
638
639	if (_param->_is_load_store_unit[i] == false)
640	{
641	// ===================================================================
642	// =====[ FUNCTIONNAL_UNIT ]==========================================
643	// ===================================================================
644
645	src = _name+"_functionnal_unit_"+toString(x);
646	std::cout << "Instance : " << src << std::endl;
647
648	{
649	dest = _name;
650	#ifdef POSITION
651	_component->interface_map (src ,"",
652	dest,"");
653	#endif
654	PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK");
655	PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET");
656	}
657
658	// ~~~~~[ Interface "execute_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
659	{
660	dest = _name+"_read_unit_to_execution_unit";
661
662	#ifdef POSITION
663	_component->interface_map (src ,"execute_in",
664	dest,"execute_unit_in_"+toString(i));
665	#endif
666
667	PORT_MAP(_component ,src , "in_EXECUTE_IN_VAL" ,
668	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_VAL" );
669	PORT_MAP(_component ,src ,"out_EXECUTE_IN_ACK" ,
670	dest, "in_EXECUTE_UNIT_IN_"+toString(i)+"_ACK" );
671	if (_param->_have_port_context_id)
672	PORT_MAP(_component ,src , "in_EXECUTE_IN_CONTEXT_ID" ,
673	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_CONTEXT_ID" );
674	if (_param->_have_port_front_end_id)
675	PORT_MAP(_component ,src , "in_EXECUTE_IN_FRONT_END_ID" ,
676	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_FRONT_END_ID" );
677	if (_param->_have_port_ooo_engine_id)
678	PORT_MAP(_component ,src , "in_EXECUTE_IN_OOO_ENGINE_ID" ,
679	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID" );
680	if (_param->_have_port_packet_id)
681	PORT_MAP(_component ,src , "in_EXECUTE_IN_PACKET_ID" ,
682	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_PACKET_ID" );
683	PORT_MAP(_component ,src , "in_EXECUTE_IN_OPERATION" ,
684	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OPERATION" );
685	PORT_MAP(_component ,src , "in_EXECUTE_IN_TYPE" ,
686	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_TYPE" );
687	PORT_MAP(_component ,src , "in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE",
688	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
689	if (_param->_have_port_load_queue_ptr)
690	PORT_MAP(_component ,src , "in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE" ,
691	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
692	PORT_MAP(_component ,src , "in_EXECUTE_IN_HAS_IMMEDIAT" ,
693	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_HAS_IMMEDIAT" );
694	PORT_MAP(_component ,src , "in_EXECUTE_IN_IMMEDIAT" ,
695	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_IMMEDIAT" );
696	PORT_MAP(_component ,src , "in_EXECUTE_IN_DATA_RA" ,
697	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RA" );
698	PORT_MAP(_component ,src , "in_EXECUTE_IN_DATA_RB" ,
699	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RB" );
700	PORT_MAP(_component ,src , "in_EXECUTE_IN_DATA_RC" ,
701	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RC" );
702	PORT_MAP(_component ,src , "in_EXECUTE_IN_WRITE_RD" ,
703	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RD" );
704	PORT_MAP(_component ,src , "in_EXECUTE_IN_NUM_REG_RD" ,
705	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RD" );
706	PORT_MAP(_component ,src , "in_EXECUTE_IN_WRITE_RE" ,
707	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RE" );
708	PORT_MAP(_component ,src , "in_EXECUTE_IN_NUM_REG_RE" ,
709	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RE" );
710	}
711
712	// ~~~~~[ Interface "execute_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
713	{
714	dest = _name+"_execution_unit_to_write_unit";
715
716	#ifdef POSITION
717	_component->interface_map (src ,"execute_out",
718	dest,"execute_unit_out_"+toString(i));
719	#endif
720
721	PORT_MAP(_component ,src ,"out_EXECUTE_OUT_VAL" ,
722	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_VAL" );
723	PORT_MAP(_component ,src , "in_EXECUTE_OUT_ACK" ,
724	dest,"out_EXECUTE_UNIT_OUT_"+toString(i)+"_ACK" );
725	if (_param->_have_port_context_id)
726	PORT_MAP(_component ,src ,"out_EXECUTE_OUT_CONTEXT_ID" ,
727	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_CONTEXT_ID" );
728	if (_param->_have_port_front_end_id)
729	PORT_MAP(_component ,src ,"out_EXECUTE_OUT_FRONT_END_ID" ,
730	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_FRONT_END_ID" );
731	if (_param->_have_port_ooo_engine_id)
732	PORT_MAP(_component ,src ,"out_EXECUTE_OUT_OOO_ENGINE_ID",
733	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OOO_ENGINE_ID");
734	if (_param->_have_port_packet_id)
735	PORT_MAP(_component ,src ,"out_EXECUTE_OUT_PACKET_ID" ,
736	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_PACKET_ID" );
737	// PORT_MAP(_component ,src ,"out_EXECUTE_OUT_OPERATION" ,
738	// dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OPERATION" );
739	PORT_MAP(_component ,src ,"out_EXECUTE_OUT_TYPE" ,
740	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_TYPE" );
741	PORT_MAP(_component ,src ,"out_EXECUTE_OUT_WRITE_RD" ,
742	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RD" );
743	PORT_MAP(_component ,src ,"out_EXECUTE_OUT_NUM_REG_RD" ,
744	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RD" );
745	PORT_MAP(_component ,src ,"out_EXECUTE_OUT_DATA_RD" ,
746	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RD" );
747	PORT_MAP(_component ,src ,"out_EXECUTE_OUT_WRITE_RE" ,
748	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RE" );
749	PORT_MAP(_component ,src ,"out_EXECUTE_OUT_NUM_REG_RE" ,
750	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RE" );
751	PORT_MAP(_component ,src ,"out_EXECUTE_OUT_DATA_RE" ,
752	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RE" );
753	PORT_MAP(_component ,src ,"out_EXECUTE_OUT_EXCEPTION" ,
754	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_EXCEPTION" );
755	PORT_MAP(_component ,src ,"out_EXECUTE_OUT_NO_SEQUENCE" ,
756	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NO_SEQUENCE" );
757	PORT_MAP(_component ,src ,"out_EXECUTE_OUT_ADDRESS" ,
758	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_ADDRESS" );
759	}
760	}
761	else
762	{
763	// ===================================================================
764	// =====[ LOAD_STORE_UNIT ]===========================================
765	// ===================================================================
766
767	src = _name+"_load_store_unit_"+toString(x);
768	std::cout << "Instance : " << src << std::endl;
769
770	// ~~~~~[ Interface "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
771	{
772	dest = _name;
773	#ifdef POSITION
774	_component->interface_map (src ,"",
775	dest,"");
776	#endif
777	PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK");
778	PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET");
779	}
780
781	// ~~~~~[ Interface "memory_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
782	{
783	dest = _name+"_read_unit_to_execution_unit";
784
785	#ifdef POSITION
786	_component->interface_map (src ,"memory_in",
787	dest,"execute_unit_in_"+toString(i));
788	#endif
789
790	PORT_MAP(_component ,src , "in_MEMORY_IN_VAL" ,
791	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_VAL" );
792	PORT_MAP(_component ,src ,"out_MEMORY_IN_ACK" ,
793	dest, "in_EXECUTE_UNIT_IN_"+toString(i)+"_ACK" );
794	if (_param->_have_port_context_id)
795	PORT_MAP(_component ,src , "in_MEMORY_IN_CONTEXT_ID" ,
796	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_CONTEXT_ID" );
797	if (_param->_have_port_front_end_id)
798	PORT_MAP(_component ,src , "in_MEMORY_IN_FRONT_END_ID" ,
799	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_FRONT_END_ID" );
800	if (_param->_have_port_ooo_engine_id)
801	PORT_MAP(_component ,src , "in_MEMORY_IN_OOO_ENGINE_ID" ,
802	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID" );
803	if (_param->_have_port_packet_id)
804	PORT_MAP(_component ,src , "in_MEMORY_IN_PACKET_ID" ,
805	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_PACKET_ID" );
806	PORT_MAP(_component ,src , "in_MEMORY_IN_OPERATION" ,
807	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OPERATION" );
808	PORT_MAP(_component ,src , "in_MEMORY_IN_TYPE" ,
809	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_TYPE" );
810	PORT_MAP(_component ,src , "in_MEMORY_IN_STORE_QUEUE_PTR_WRITE",
811	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
812	if (_param->_have_port_load_queue_ptr)
813	PORT_MAP(_component ,src , "in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE" ,
814	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
815	PORT_MAP(_component ,src , "in_MEMORY_IN_HAS_IMMEDIAT" ,
816	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_HAS_IMMEDIAT" );
817	PORT_MAP(_component ,src , "in_MEMORY_IN_IMMEDIAT" ,
818	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_IMMEDIAT" );
819	PORT_MAP(_component ,src , "in_MEMORY_IN_DATA_RA" ,
820	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RA" );
821	PORT_MAP(_component ,src , "in_MEMORY_IN_DATA_RB" ,
822	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RB" );
823	PORT_MAP(_component ,src , "in_MEMORY_IN_DATA_RC" ,
824	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RC" );
825	PORT_MAP(_component ,src , "in_MEMORY_IN_WRITE_RD" ,
826	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RD" );
827	PORT_MAP(_component ,src , "in_MEMORY_IN_NUM_REG_RD" ,
828	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RD" );
829	PORT_MAP(_component ,src , "in_MEMORY_IN_WRITE_RE" ,
830	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RE" );
831	PORT_MAP(_component ,src , "in_MEMORY_IN_NUM_REG_RE" ,
832	dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RE" );
833	}
834
835	// ~~~~~[ Interface "memory_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
836	{
837	dest = _name+"_execution_unit_to_write_unit";
838
839	#ifdef POSITION
840	_component->interface_map (src ,"memory_out",
841	dest,"execute_unit_out_"+toString(i));
842	#endif
843
844	PORT_MAP(_component ,src ,"out_MEMORY_OUT_VAL" ,
845	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_VAL" );
846	PORT_MAP(_component ,src , "in_MEMORY_OUT_ACK" ,
847	dest,"out_EXECUTE_UNIT_OUT_"+toString(i)+"_ACK" );
848	if (_param->_have_port_context_id)
849	PORT_MAP(_component ,src ,"out_MEMORY_OUT_CONTEXT_ID" ,
850	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_CONTEXT_ID" );
851	if (_param->_have_port_front_end_id)
852	PORT_MAP(_component ,src ,"out_MEMORY_OUT_FRONT_END_ID" ,
853	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_FRONT_END_ID" );
854	if (_param->_have_port_ooo_engine_id)
855	PORT_MAP(_component ,src ,"out_MEMORY_OUT_OOO_ENGINE_ID",
856	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OOO_ENGINE_ID");
857	if (_param->_have_port_packet_id)
858	PORT_MAP(_component ,src ,"out_MEMORY_OUT_PACKET_ID" ,
859	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_PACKET_ID" );
860	// PORT_MAP(_component ,src ,"out_MEMORY_OUT_OPERATION" ,
861	// dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OPERATION" );
862	PORT_MAP(_component ,src ,"out_MEMORY_OUT_TYPE" ,
863	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_TYPE" );
864	PORT_MAP(_component ,src ,"out_MEMORY_OUT_WRITE_RD" ,
865	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RD" );
866	PORT_MAP(_component ,src ,"out_MEMORY_OUT_NUM_REG_RD" ,
867	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RD" );
868	PORT_MAP(_component ,src ,"out_MEMORY_OUT_DATA_RD" ,
869	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RD" );
870	PORT_MAP(_component ,src ,"out_MEMORY_OUT_WRITE_RE" ,
871	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RE" );
872	PORT_MAP(_component ,src ,"out_MEMORY_OUT_NUM_REG_RE" ,
873	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RE" );
874	PORT_MAP(_component ,src ,"out_MEMORY_OUT_DATA_RE" ,
875	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RE" );
876	PORT_MAP(_component ,src ,"out_MEMORY_OUT_EXCEPTION" ,
877	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_EXCEPTION" );
878	PORT_MAP(_component ,src ,"out_MEMORY_OUT_NO_SEQUENCE" ,
879	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NO_SEQUENCE" );
880	PORT_MAP(_component ,src ,"out_MEMORY_OUT_ADDRESS" ,
881	dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_ADDRESS" );
882	}
883
884	// ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
885	{
886	dest = _name;
887
888	#ifdef POSITION
889	_component->interface_map (src ,"dcache_req",
890	dest,"dcache_req_"+toString(i));
891	#endif
892	PORT_MAP(_component ,src ,"out_DCACHE_REQ_VAL" ,dest,"out_DCACHE_REQ_"+toString(i)+"_VAL" );
893	PORT_MAP(_component ,src , "in_DCACHE_REQ_ACK" ,dest, "in_DCACHE_REQ_"+toString(i)+"_ACK" );
894	if (_param->_have_port_dcache_context_id)
895	PORT_MAP(_component ,src ,"out_DCACHE_REQ_CONTEXT_ID",dest,"out_DCACHE_REQ_"+toString(i)+"_CONTEXT_ID");
896	PORT_MAP(_component ,src ,"out_DCACHE_REQ_PACKET_ID" ,dest,"out_DCACHE_REQ_"+toString(i)+"_PACKET_ID" );
897	PORT_MAP(_component ,src ,"out_DCACHE_REQ_ADDRESS" ,dest,"out_DCACHE_REQ_"+toString(i)+"_ADDRESS" );
898	PORT_MAP(_component ,src ,"out_DCACHE_REQ_TYPE" ,dest,"out_DCACHE_REQ_"+toString(i)+"_TYPE" );
899	PORT_MAP(_component ,src ,"out_DCACHE_REQ_WDATA" ,dest,"out_DCACHE_REQ_"+toString(i)+"_WDATA" );
900	}
901
902	// ~~~~~[ Interface "dcache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
903	{
904	dest = _name;
905
906	#ifdef POSITION
907	_component->interface_map (src ,"dcache_rsp",
908	dest,"dcache_rsp_"+toString(i));
909	#endif
910	PORT_MAP(_component ,src , "in_DCACHE_RSP_VAL" ,dest, "in_DCACHE_RSP_"+toString(i)+"_VAL" );
911	PORT_MAP(_component ,src ,"out_DCACHE_RSP_ACK" ,dest,"out_DCACHE_RSP_"+toString(i)+"_ACK" );
912	if (_param->_have_port_dcache_context_id)
913	PORT_MAP(_component ,src , "in_DCACHE_RSP_CONTEXT_ID",dest, "in_DCACHE_RSP_"+toString(i)+"_CONTEXT_ID");
914	PORT_MAP(_component ,src , "in_DCACHE_RSP_PACKET_ID" ,dest, "in_DCACHE_RSP_"+toString(i)+"_PACKET_ID" );
915	PORT_MAP(_component ,src , "in_DCACHE_RSP_RDATA" ,dest, "in_DCACHE_RSP_"+toString(i)+"_RDATA" );
916	PORT_MAP(_component ,src , "in_DCACHE_RSP_ERROR" ,dest, "in_DCACHE_RSP_"+toString(i)+"_ERROR" );
917	}
918
919	// ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
920	{
921	// Port map with "read_unit" is ok!
922	}
923	}
924	}
925
926	// ===================================================================
927	// =====[ WRITE_UNIT ]================================================
928	// ===================================================================
929	for (uint32_t i=0; i<_param->_nb_write_unit; i++)
930	{
931	src = _name+"_write_unit_"+toString(i);
932	std::cout << "Instance : " << src << std::endl;
933
934	{
935	dest = _name;
936	#ifdef POSITION
937	_component->interface_map (src ,"",
938	dest,"");
939	#endif
940	PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK");
941	PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET");
942	}
943
944	// -----[ Interface "write_unit_in" ]---------------------------------
945	{
946	dest = _name+"_execution_unit_to_write_unit";
947	#ifdef POSITION
948	_component->interface_map (src ,"write_unit_in",
949	dest,"execute_unit_in_"+toString(i));
950	#endif
951
952	PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_VAL" ,
953	dest,"out_WRITE_UNIT_IN_"+toString(i)+"_VAL" );
954	PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_ACK" ,
955	dest, "in_WRITE_UNIT_IN_"+toString(i)+"_ACK" );
956	if (_param->_have_port_context_id)
957	PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_CONTEXT_ID" ,
958	dest,"out_WRITE_UNIT_IN_"+toString(i)+"_CONTEXT_ID" );
959	if (_param->_have_port_front_end_id)
960	PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_FRONT_END_ID" ,
961	dest,"out_WRITE_UNIT_IN_"+toString(i)+"_FRONT_END_ID" );
962	if (_param->_have_port_ooo_engine_id)
963	PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_OOO_ENGINE_ID",
964	dest,"out_WRITE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID");
965	if (_param->_have_port_packet_id)
966	PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_PACKET_ID" ,
967	dest,"out_WRITE_UNIT_IN_"+toString(i)+"_PACKET_ID" );
968	// PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_OPERATION" ,
969	// dest,"out_WRITE_UNIT_IN_"+toString(i)+"_OPERATION" );
970	PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_TYPE" ,
971	dest,"out_WRITE_UNIT_IN_"+toString(i)+"_TYPE" );
972	PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_WRITE_RD" ,
973	dest,"out_WRITE_UNIT_IN_"+toString(i)+"_WRITE_RD" );
974	PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_NUM_REG_RD" ,
975	dest,"out_WRITE_UNIT_IN_"+toString(i)+"_NUM_REG_RD" );
976	PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_DATA_RD" ,
977	dest,"out_WRITE_UNIT_IN_"+toString(i)+"_DATA_RD" );
978	PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_WRITE_RE" ,
979	dest,"out_WRITE_UNIT_IN_"+toString(i)+"_WRITE_RE" );
980	PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_NUM_REG_RE" ,
981	dest,"out_WRITE_UNIT_IN_"+toString(i)+"_NUM_REG_RE" );
982	PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_DATA_RE" ,
983	dest,"out_WRITE_UNIT_IN_"+toString(i)+"_DATA_RE" );
984	PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_EXCEPTION" ,
985	dest,"out_WRITE_UNIT_IN_"+toString(i)+"_EXCEPTION" );
986	PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_NO_SEQUENCE" ,
987	dest,"out_WRITE_UNIT_IN_"+toString(i)+"_NO_SEQUENCE" );
988	PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_ADDRESS" ,
989	dest,"out_WRITE_UNIT_IN_"+toString(i)+"_ADDRESS" );
990	}
991
992	// -----[ Interface "write_unit_out" ]--------------------------------
993	{
994	dest = _name;
995	#ifdef POSITION
996	_component->interface_map (src ,"write_unit_out",
997	dest,"execute_loop_out_"+toString(i));
998	#endif
999
1000	PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_VAL" ,
1001	dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_VAL" );
1002	PORT_MAP(_component ,src , "in_WRITE_UNIT_OUT_ACK" ,
1003	dest, "in_EXECUTE_LOOP_OUT_"+toString(i)+"_ACK" );
1004	if (_param->_have_port_context_id)
1005	PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_CONTEXT_ID" ,
1006	dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_CONTEXT_ID" );
1007	if (_param->_have_port_front_end_id)
1008	PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_FRONT_END_ID" ,
1009	dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_FRONT_END_ID" );
1010	if (_param->_have_port_ooo_engine_id)
1011	PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_OOO_ENGINE_ID",
1012	dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_OOO_ENGINE_ID");
1013	if (_param->_have_port_packet_id)
1014	PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_PACKET_ID" ,
1015	dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_PACKET_ID" );
1016	// PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_OPERATION" ,
1017	// dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_OPERATION" );
1018	// PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_TYPE" ,
1019	// dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_TYPE" );
1020	PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_FLAGS" ,
1021	dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_FLAGS" );
1022	PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_EXCEPTION" ,
1023	dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_EXCEPTION" );
1024	PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_NO_SEQUENCE" ,
1025	dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_NO_SEQUENCE" );
1026	PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_ADDRESS" ,
1027	dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_ADDRESS" );
1028	}
1029	// -----[ Interface "gpr_write" ]-------------------------------------
1030	{
1031	// Port map with "read_unit" is ok!
1032
1033	dest = _name+"_register_unit";
1034	#ifdef POSITION
1035	_component->interface_map (src ,"gpr_write",
1036	dest,"gpr_write_"+toString(i));
1037	#endif
1038
1039	PORT_MAP(_component ,src ,"out_GPR_WRITE_0_VAL" ,
1040	dest, "in_GPR_WRITE_"+toString(i)+"_VAL" );
1041	PORT_MAP(_component ,src , "in_GPR_WRITE_0_ACK" ,
1042	dest,"out_GPR_WRITE_"+toString(i)+"_ACK" );
1043	if (_param->_have_port_context_id)
1044	PORT_MAP(_component ,src ,"out_GPR_WRITE_0_OOO_ENGINE_ID",
1045	dest, "in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID");
1046	PORT_MAP(_component ,src ,"out_GPR_WRITE_0_NUM_REG" ,
1047	dest, "in_GPR_WRITE_"+toString(i)+"_NUM_REG" );
1048	PORT_MAP(_component ,src ,"out_GPR_WRITE_0_DATA" ,
1049	dest, "in_GPR_WRITE_"+toString(i)+"_DATA" );
1050	}
1051
1052	// -----[ Interface "spr_write" ]-------------------------------------
1053	{
1054	// Port map with "read_unit" is ok!
1055
1056	dest = _name+"_register_unit";
1057	#ifdef POSITION
1058	_component->interface_map (src ,"spr_write",
1059	dest,"spr_write_"+toString(i));
1060	#endif
1061
1062	PORT_MAP(_component ,src ,"out_SPR_WRITE_0_VAL" ,
1063	dest, "in_SPR_WRITE_"+toString(i)+"_VAL" );
1064	PORT_MAP(_component ,src , "in_SPR_WRITE_0_ACK" ,
1065	dest,"out_SPR_WRITE_"+toString(i)+"_ACK" );
1066	if (_param->_have_port_context_id)
1067	PORT_MAP(_component ,src ,"out_SPR_WRITE_0_OOO_ENGINE_ID",
1068	dest, "in_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID");
1069	PORT_MAP(_component ,src ,"out_SPR_WRITE_0_NUM_REG" ,
1070	dest, "in_SPR_WRITE_"+toString(i)+"_NUM_REG" );
1071	PORT_MAP(_component ,src ,"out_SPR_WRITE_0_DATA" ,
1072	dest, "in_SPR_WRITE_"+toString(i)+"_DATA" );
1073	}
1074
1075	// -----[ Interface "bypass_write" ]----------------------------------
1076	{
1077	// Port map with "read_unit" is ok!
1078	}
1079	}
1080
1081	// ===================================================================
1082	// =====[ REGISTER_UNIT ]=============================================
1083	// ===================================================================
1084	{
1085	src = _name+"_register_unit";
1086	std::cout << "Instance : " << src << std::endl;
1087
1088	{
1089	dest = _name;
1090	#ifdef POSITION
1091	_component->interface_map (src ,"",
1092	dest,"");
1093	#endif
1094	PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK");
1095	PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET");
1096	}
1097
1098	// ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1099	for (uint32_t i=0; i<_param->_nb_read_unit; i++)
1100	{
1101	dest = _name+"_read_unit_"+toString(i);
1102	#ifdef POSITION
1103	_component->interface_map (src ,"gpr_read_"+toString(2*i )
1104	dest,"gpr_read_0");
1105	_component->interface_map (src ,"gpr_read_"+toString(2*i+1)
1106	dest,"gpr_read_1");
1107	#endif
1108
1109	PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i )+"_VAL" ,dest,"out_GPR_READ_0_VAL" );
1110	PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i )+"_ACK" ,dest, "in_GPR_READ_0_ACK" );
1111	if (_param->_have_port_context_id)
1112	PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i )+"_OOO_ENGINE_ID",dest,"out_GPR_READ_0_OOO_ENGINE_ID");
1113	PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i )+"_NUM_REG" ,dest,"out_GPR_READ_0_NUM_REG" );
1114	PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i )+"_DATA" ,dest, "in_GPR_READ_0_DATA" );
1115	PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i )+"_DATA_VAL" ,dest, "in_GPR_READ_0_DATA_VAL" );
1116
1117	PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i+1)+"_VAL" ,dest,"out_GPR_READ_1_VAL" );
1118	PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i+1)+"_ACK" ,dest, "in_GPR_READ_1_ACK" );
1119	if (_param->_have_port_context_id)
1120	PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i+1)+"_OOO_ENGINE_ID",dest,"out_GPR_READ_1_OOO_ENGINE_ID");
1121	PORT_MAP(_component ,src , "in_GPR_READ_"+toString(2*i+1)+"_NUM_REG" ,dest,"out_GPR_READ_1_NUM_REG" );
1122	PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i+1)+"_DATA" ,dest, "in_GPR_READ_1_DATA" );
1123	PORT_MAP(_component ,src ,"out_GPR_READ_"+toString(2*i+1)+"_DATA_VAL" ,dest, "in_GPR_READ_1_DATA_VAL" );
1124	}
1125
1126	// ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1127	for (uint32_t i=0; i<_param->_nb_write_unit; i++)
1128	{
1129	dest = _name+"_write_unit_"+toString(i);
1130	#ifdef POSITION
1131	_component->interface_map (src ,"gpr_write_"+toString(i)
1132	dest,"gpr_write_0");
1133	#endif
1134
1135	PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_VAL" ,dest,"out_GPR_WRITE_0_VAL" );
1136	PORT_MAP(_component ,src ,"out_GPR_WRITE_"+toString(i)+"_ACK" ,dest, "in_GPR_WRITE_0_ACK" );
1137	if (_param->_have_port_context_id)
1138	PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID",dest,"out_GPR_WRITE_0_OOO_ENGINE_ID");
1139	PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_NUM_REG" ,dest,"out_GPR_WRITE_0_NUM_REG" );
1140	PORT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_DATA" ,dest,"out_GPR_WRITE_0_DATA" );
1141	}
1142
1143	// ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1144	for (uint32_t i=0; i<_param->_nb_read_unit; i++)
1145	{
1146	dest = _name+"_read_unit_"+toString(i);
1147	#ifdef POSITION
1148	_component->interface_map (src ,"spr_read_"+toString(i),
1149	dest,"spr_read_0");
1150	#endif
1151
1152	PORT_MAP(_component ,src , "in_SPR_READ_"+toString(i)+"_VAL" ,dest,"out_SPR_READ_0_VAL" );
1153	PORT_MAP(_component ,src ,"out_SPR_READ_"+toString(i)+"_ACK" ,dest, "in_SPR_READ_0_ACK" );
1154	if (_param->_have_port_context_id)
1155	PORT_MAP(_component ,src , "in_SPR_READ_"+toString(i)+"_OOO_ENGINE_ID",dest,"out_SPR_READ_0_OOO_ENGINE_ID");
1156	PORT_MAP(_component ,src , "in_SPR_READ_"+toString(i)+"_NUM_REG" ,dest,"out_SPR_READ_0_NUM_REG" );
1157	PORT_MAP(_component ,src ,"out_SPR_READ_"+toString(i)+"_DATA" ,dest, "in_SPR_READ_0_DATA" );
1158	PORT_MAP(_component ,src ,"out_SPR_READ_"+toString(i)+"_DATA_VAL" ,dest, "in_SPR_READ_0_DATA_VAL" );
1159	}
1160
1161	// ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1162	for (uint32_t i=0; i<_param->_nb_write_unit; i++)
1163	{
1164	dest = _name+"_write_unit_"+toString(i);
1165	#ifdef POSITION
1166	_component->interface_map (src ,"spr_write_"+toString(i)
1167	dest,"spr_write_0");
1168	#endif
1169
1170	PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(i)+"_VAL" ,dest,"out_SPR_WRITE_0_VAL" );
1171	PORT_MAP(_component ,src ,"out_SPR_WRITE_"+toString(i)+"_ACK" ,dest, "in_SPR_WRITE_0_ACK" );
1172	if (_param->_have_port_context_id)
1173	PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID",dest,"out_SPR_WRITE_0_OOO_ENGINE_ID");
1174	PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(i)+"_NUM_REG" ,dest,"out_SPR_WRITE_0_NUM_REG" );
1175	PORT_MAP(_component ,src , "in_SPR_WRITE_"+toString(i)+"_DATA" ,dest,"out_SPR_WRITE_0_DATA" );
1176	}
1177
1178	// ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1179	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
1180	{
1181	uint32_t x=_param->_nb_inst_insert_rob [i];
1182
1183	for (uint32_t j=0; j<x; j++)
1184	{
1185	dest = _name;
1186	#ifdef POSITION
1187	_component->interface_map (src ,"insert_rob_"+toString(i)+"_"+toString(j),
1188	dest,"insert_rob_"+toString(i)+"_"+toString(j));
1189	#endif
1190
1191	PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL" ,
1192	dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL" );
1193	PORT_MAP(_component ,src ,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK" ,
1194	dest,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK" );
1195	PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE" ,
1196	dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE" );
1197	PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG",
1198	dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG");
1199	PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE" ,
1200	dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE" );
1201	PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG",
1202	dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG");
1203	}
1204	}
1205
1206	// ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1207	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
1208	{
1209	uint32_t x=_param->_nb_inst_retire_rob [i];
1210
1211	for (uint32_t j=0; j<x; j++)
1212	{
1213	dest = _name;
1214	#ifdef POSITION
1215	_component->interface_map (src ,"retire_rob_"+toString(i)+"_"+toString(j),
1216	dest,"retire_rob_"+toString(i)+"_"+toString(j));
1217	#endif
1218
1219	PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL" ,
1220	dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL" );
1221	PORT_MAP(_component ,src ,"out_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_ACK" ,
1222	dest,"out_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_ACK" );
1223	PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_OLD_USE" ,
1224	dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_OLD_USE" );
1225	PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_OLD_NUM_REG",
1226	dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_OLD_NUM_REG");
1227	PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_NEW_USE" ,
1228	dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_NEW_USE" );
1229	PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_NEW_NUM_REG",
1230	dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_NEW_NUM_REG");
1231	PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_OLD_USE" ,
1232	dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_OLD_USE" );
1233	PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_OLD_NUM_REG",
1234	dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_OLD_NUM_REG");
1235	PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_NEW_USE" ,
1236	dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_NEW_USE" );
1237	PORT_MAP(_component ,src , "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_NEW_NUM_REG",
1238	dest, "in_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_NEW_NUM_REG");
1239	}
1240	}
1241	}
1242
1243	// ===================================================================
1244	// =====[ READ_UNIT_TO_EXECUTION_UNIT ]===============================
1245	// ===================================================================
1246	{
1247	src = _name+"_read_unit_to_execution_unit";
1248	std::cout << "Instance : " << src << std::endl;
1249
1250	{
1251	dest = _name;
1252	#ifdef POSITION
1253	_component->interface_map (src ,"",
1254	dest,"");
1255	#endif
1256	PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK");
1257	PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET");
1258	}
1259
1260	// ~~~~~[ Interface "read_unit_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1261	uint32_t it_read_unit_out =0;
1262	for (uint32_t i=0; i < _param->_nb_read_unit; i++)
1263	for (uint32_t j=0; j < _param->_nb_inst_retire[i]; j++)
1264	{
1265	dest = _name+"_read_unit_"+toString(i);
1266
1267	#ifdef POSITION
1268	_component->interface_map (src ,"read_unit_"+toString(it_read_unit_out),
1269	dest,"read_unit_"+toString(j));
1270	#endif
1271
1272	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_VAL" ,
1273	dest,"out_READ_UNIT_OUT_"+toString(j )+"_VAL" );
1274	PORT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_ACK" ,
1275	dest, "in_READ_UNIT_OUT_"+toString(j )+"_ACK" );
1276	if (_param->_have_port_context_id)
1277	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_CONTEXT_ID" ,
1278	dest,"out_READ_UNIT_OUT_"+toString(j )+"_CONTEXT_ID" );
1279	if (_param->_have_port_front_end_id)
1280	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_FRONT_END_ID" ,
1281	dest,"out_READ_UNIT_OUT_"+toString(j )+"_FRONT_END_ID" );
1282	if (_param->_have_port_ooo_engine_id)
1283	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_OOO_ENGINE_ID" ,
1284	dest,"out_READ_UNIT_OUT_"+toString(j )+"_OOO_ENGINE_ID" );
1285	if (_param->_have_port_packet_id)
1286	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_PACKET_ID" ,
1287	dest,"out_READ_UNIT_OUT_"+toString(j )+"_PACKET_ID" );
1288	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_OPERATION" ,
1289	dest,"out_READ_UNIT_OUT_"+toString(j )+"_OPERATION" );
1290	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_TYPE" ,
1291	dest,"out_READ_UNIT_OUT_"+toString(j )+"_TYPE" );
1292	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_STORE_QUEUE_PTR_WRITE",
1293	dest,"out_READ_UNIT_OUT_"+toString(j )+"_STORE_QUEUE_PTR_WRITE");
1294	if (_param->_have_port_load_queue_ptr)
1295	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_LOAD_QUEUE_PTR_WRITE" ,
1296	dest,"out_READ_UNIT_OUT_"+toString(j )+"_LOAD_QUEUE_PTR_WRITE" );
1297	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_HAS_IMMEDIAT" ,
1298	dest,"out_READ_UNIT_OUT_"+toString(j )+"_HAS_IMMEDIAT" );
1299	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_IMMEDIAT" ,
1300	dest,"out_READ_UNIT_OUT_"+toString(j )+"_IMMEDIAT" );
1301	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RA" ,
1302	dest,"out_READ_UNIT_OUT_"+toString(j )+"_DATA_RA" );
1303	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RB" ,
1304	dest,"out_READ_UNIT_OUT_"+toString(j )+"_DATA_RB" );
1305	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_DATA_RC" ,
1306	dest,"out_READ_UNIT_OUT_"+toString(j )+"_DATA_RC" );
1307	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_WRITE_RD" ,
1308	dest,"out_READ_UNIT_OUT_"+toString(j )+"_WRITE_RD" );
1309	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_NUM_REG_RD" ,
1310	dest,"out_READ_UNIT_OUT_"+toString(j )+"_NUM_REG_RD" );
1311	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_WRITE_RE" ,
1312	dest,"out_READ_UNIT_OUT_"+toString(j )+"_WRITE_RE" );
1313	PORT_MAP(_component ,src , "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_NUM_REG_RE" ,
1314	dest,"out_READ_UNIT_OUT_"+toString(j )+"_NUM_REG_RE" );
1315
1316	it_read_unit_out ++;
1317	}
1318
1319	// ~~~~~[ Interface "execute_unit_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1320	for (uint32_t i=0; i<_param->_nb_execute_unit; i++)
1321	{
1322	uint32_t x=_param->_translate_num_execute_unit[i];
1323
1324	if (_param->_is_load_store_unit[i] == false)
1325	{
1326	dest = _name+"_functionnal_unit_"+toString(x);
1327
1328	#ifdef POSITION
1329	_component->interface_map (src ,"execute_unit_in_"+toString(i),
1330	dest,"execute_in");
1331	#endif
1332
1333	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_VAL" ,
1334	dest, "in_EXECUTE_IN_VAL" );
1335	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_IN_"+toString(i)+"_ACK" ,
1336	dest,"out_EXECUTE_IN_ACK" );
1337	if (_param->_have_port_context_id)
1338	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_CONTEXT_ID" ,
1339	dest, "in_EXECUTE_IN_CONTEXT_ID" );
1340	if (_param->_have_port_front_end_id)
1341	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_FRONT_END_ID" ,
1342	dest, "in_EXECUTE_IN_FRONT_END_ID" );
1343	if (_param->_have_port_ooo_engine_id)
1344	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID" ,
1345	dest, "in_EXECUTE_IN_OOO_ENGINE_ID" );
1346	if (_param->_have_port_packet_id)
1347	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_PACKET_ID" ,
1348	dest, "in_EXECUTE_IN_PACKET_ID" );
1349	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OPERATION" ,
1350	dest, "in_EXECUTE_IN_OPERATION" );
1351	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_TYPE" ,
1352	dest, "in_EXECUTE_IN_TYPE" );
1353	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",
1354	dest, "in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE");
1355	if (_param->_have_port_load_queue_ptr)
1356	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,
1357	dest, "in_EXECUTE_IN_LOAD_QUEUE_PTR_WRITE" );
1358	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_HAS_IMMEDIAT" ,
1359	dest, "in_EXECUTE_IN_HAS_IMMEDIAT" );
1360	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_IMMEDIAT" ,
1361	dest, "in_EXECUTE_IN_IMMEDIAT" );
1362	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RA" ,
1363	dest, "in_EXECUTE_IN_DATA_RA" );
1364	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RB" ,
1365	dest, "in_EXECUTE_IN_DATA_RB" );
1366	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RC" ,
1367	dest, "in_EXECUTE_IN_DATA_RC" );
1368	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RD" ,
1369	dest, "in_EXECUTE_IN_WRITE_RD" );
1370	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RD" ,
1371	dest, "in_EXECUTE_IN_NUM_REG_RD" );
1372	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RE" ,
1373	dest, "in_EXECUTE_IN_WRITE_RE" );
1374	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RE" ,
1375	dest, "in_EXECUTE_IN_NUM_REG_RE" );
1376	}
1377	else
1378	{
1379	dest = _name+"_load_store_unit_"+toString(x);
1380
1381	#ifdef POSITION
1382	_component->interface_map (src ,"execute_unit_in_"+toString(i),
1383	dest,"memory_in");
1384	#endif
1385
1386	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_VAL" ,
1387	dest, "in_MEMORY_IN_VAL" );
1388	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_IN_"+toString(i)+"_ACK" ,
1389	dest,"out_MEMORY_IN_ACK" );
1390	if (_param->_have_port_context_id)
1391	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_CONTEXT_ID" ,
1392	dest, "in_MEMORY_IN_CONTEXT_ID" );
1393	if (_param->_have_port_front_end_id)
1394	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_FRONT_END_ID" ,
1395	dest, "in_MEMORY_IN_FRONT_END_ID" );
1396	if (_param->_have_port_ooo_engine_id)
1397	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID" ,
1398	dest, "in_MEMORY_IN_OOO_ENGINE_ID" );
1399	if (_param->_have_port_packet_id)
1400	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_PACKET_ID" ,
1401	dest, "in_MEMORY_IN_PACKET_ID" );
1402	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_OPERATION" ,
1403	dest, "in_MEMORY_IN_OPERATION" );
1404	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_TYPE" ,
1405	dest, "in_MEMORY_IN_TYPE" );
1406	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",
1407	dest, "in_MEMORY_IN_STORE_QUEUE_PTR_WRITE");
1408	if (_param->_have_port_load_queue_ptr)
1409	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,
1410	dest, "in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE" );
1411	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_HAS_IMMEDIAT" ,
1412	dest, "in_MEMORY_IN_HAS_IMMEDIAT" );
1413	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_IMMEDIAT" ,
1414	dest, "in_MEMORY_IN_IMMEDIAT" );
1415	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RA" ,
1416	dest, "in_MEMORY_IN_DATA_RA" );
1417	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RB" ,
1418	dest, "in_MEMORY_IN_DATA_RB" );
1419	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_DATA_RC" ,
1420	dest, "in_MEMORY_IN_DATA_RC" );
1421	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RD" ,
1422	dest, "in_MEMORY_IN_WRITE_RD" );
1423	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RD" ,
1424	dest, "in_MEMORY_IN_NUM_REG_RD" );
1425	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_WRITE_RE" ,
1426	dest, "in_MEMORY_IN_WRITE_RE" );
1427	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_IN_"+toString(i)+"_NUM_REG_RE" ,
1428	dest, "in_MEMORY_IN_NUM_REG_RE" );
1429	}
1430	}
1431	}
1432
1433	// ===================================================================
1434	// =====[ EXECUTION_UNIT_TO_WRITE_UNIT ]==============================
1435	// ===================================================================
1436	{
1437	src = _name+"_execution_unit_to_write_unit";
1438	std::cout << "Instance : " << src << std::endl;
1439
1440	{
1441	dest = _name;
1442	#ifdef POSITION
1443	_component->interface_map (src ,"",
1444	dest,"");
1445	#endif
1446	PORT_MAP(_component ,src , "in_CLOCK" ,dest, "in_CLOCK");
1447	PORT_MAP(_component ,src , "in_NRESET",dest, "in_NRESET");
1448	}
1449
1450	// ~~~~~[ Interface "execute_unit_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1451	for (uint32_t i=0; i<_param->_nb_execute_unit; i++)
1452	{
1453	uint32_t x=_param->_translate_num_execute_unit[i];
1454
1455	if (_param->_is_load_store_unit[i] == false)
1456	{
1457	dest = _name+"_functionnal_unit_"+toString(x);
1458
1459	#ifdef POSITION
1460	_component->interface_map (src ,"execute_unit_out_"+toString(i),
1461	dest,"execute_out");
1462	#endif
1463	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_VAL" ,
1464	dest,"out_EXECUTE_OUT_VAL" );
1465	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_OUT_"+toString(i)+"_ACK" ,
1466	dest, "in_EXECUTE_OUT_ACK" );
1467	if (_param->_have_port_context_id)
1468	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_CONTEXT_ID" ,
1469	dest,"out_EXECUTE_OUT_CONTEXT_ID" );
1470	if (_param->_have_port_front_end_id)
1471	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_FRONT_END_ID" ,
1472	dest,"out_EXECUTE_OUT_FRONT_END_ID" );
1473	if (_param->_have_port_ooo_engine_id)
1474	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OOO_ENGINE_ID",
1475	dest,"out_EXECUTE_OUT_OOO_ENGINE_ID");
1476	if (_param->_have_port_packet_id)
1477	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_PACKET_ID" ,
1478	dest,"out_EXECUTE_OUT_PACKET_ID" );
1479	// PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OPERATION" ,
1480	// dest,"out_EXECUTE_OUT_OPERATION" );
1481	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_TYPE" ,
1482	dest,"out_EXECUTE_OUT_TYPE" );
1483	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RD" ,
1484	dest,"out_EXECUTE_OUT_WRITE_RD" );
1485	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RD" ,
1486	dest,"out_EXECUTE_OUT_NUM_REG_RD" );
1487	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RD" ,
1488	dest,"out_EXECUTE_OUT_DATA_RD" );
1489	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RE" ,
1490	dest,"out_EXECUTE_OUT_WRITE_RE" );
1491	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RE" ,
1492	dest,"out_EXECUTE_OUT_NUM_REG_RE" );
1493	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RE" ,
1494	dest,"out_EXECUTE_OUT_DATA_RE" );
1495	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_EXCEPTION" ,
1496	dest,"out_EXECUTE_OUT_EXCEPTION" );
1497	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NO_SEQUENCE" ,
1498	dest,"out_EXECUTE_OUT_NO_SEQUENCE" );
1499	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_ADDRESS" ,
1500	dest,"out_EXECUTE_OUT_ADDRESS" );
1501	}
1502	else
1503	{
1504	dest = _name+"_load_store_unit_"+toString(x);
1505
1506	#ifdef POSITION
1507	_component->interface_map (src ,"execute_unit_out_"+toString(i),
1508	dest,"memory_out");
1509	#endif
1510	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_VAL" ,
1511	dest,"out_MEMORY_OUT_VAL" );
1512	PORT_MAP(_component ,src ,"out_EXECUTE_UNIT_OUT_"+toString(i)+"_ACK" ,
1513	dest, "in_MEMORY_OUT_ACK" );
1514	if (_param->_have_port_context_id)
1515	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_CONTEXT_ID" ,
1516	dest,"out_MEMORY_OUT_CONTEXT_ID" );
1517	if (_param->_have_port_front_end_id)
1518	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_FRONT_END_ID" ,
1519	dest,"out_MEMORY_OUT_FRONT_END_ID" );
1520	if (_param->_have_port_ooo_engine_id)
1521	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OOO_ENGINE_ID",
1522	dest,"out_MEMORY_OUT_OOO_ENGINE_ID");
1523	if (_param->_have_port_packet_id)
1524	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_PACKET_ID" ,
1525	dest,"out_MEMORY_OUT_PACKET_ID" );
1526	// PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_OPERATION" ,
1527	// dest,"out_MEMORY_OUT_OPERATION" );
1528	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_TYPE" ,
1529	dest,"out_MEMORY_OUT_TYPE" );
1530	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RD" ,
1531	dest,"out_MEMORY_OUT_WRITE_RD" );
1532	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RD" ,
1533	dest,"out_MEMORY_OUT_NUM_REG_RD" );
1534	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RD" ,
1535	dest,"out_MEMORY_OUT_DATA_RD" );
1536	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_WRITE_RE" ,
1537	dest,"out_MEMORY_OUT_WRITE_RE" );
1538	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NUM_REG_RE" ,
1539	dest,"out_MEMORY_OUT_NUM_REG_RE" );
1540	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_DATA_RE" ,
1541	dest,"out_MEMORY_OUT_DATA_RE" );
1542	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_EXCEPTION" ,
1543	dest,"out_MEMORY_OUT_EXCEPTION" );
1544	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_NO_SEQUENCE" ,
1545	dest,"out_MEMORY_OUT_NO_SEQUENCE" );
1546	PORT_MAP(_component ,src , "in_EXECUTE_UNIT_OUT_"+toString(i)+"_ADDRESS" ,
1547	dest,"out_MEMORY_OUT_ADDRESS" );
1548	}
1549	}
1550
1551	// ~~~~~[ Interface "write_unit_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1552	for (uint32_t i=0; i<_param->_nb_write_unit; i++)
1553	{
1554	dest = _name+"_write_unit_"+toString(i);
1555
1556	#ifdef POSITION
1557	_component->interface_map (src ,"write_unit_out_"+toString(i),
1558	dest,"write_out");
1559	#endif
1560
1561	PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_VAL" ,
1562	dest, "in_WRITE_UNIT_IN_VAL" );
1563	PORT_MAP(_component ,src , "in_WRITE_UNIT_IN_"+toString(i)+"_ACK" ,
1564	dest,"out_WRITE_UNIT_IN_ACK" );
1565	if (_param->_have_port_context_id)
1566	PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_CONTEXT_ID" ,
1567	dest, "in_WRITE_UNIT_IN_CONTEXT_ID" );
1568	if (_param->_have_port_front_end_id)
1569	PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_FRONT_END_ID" ,
1570	dest, "in_WRITE_UNIT_IN_FRONT_END_ID" );
1571	if (_param->_have_port_ooo_engine_id)
1572	PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_OOO_ENGINE_ID",
1573	dest, "in_WRITE_UNIT_IN_OOO_ENGINE_ID");
1574	if (_param->_have_port_packet_id)
1575	PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_PACKET_ID" ,
1576	dest, "in_WRITE_UNIT_IN_PACKET_ID" );
1577	// PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_OPERATION" ,
1578	// dest, "in_WRITE_UNIT_IN_OPERATION" );
1579	PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_TYPE" ,
1580	dest, "in_WRITE_UNIT_IN_TYPE" );
1581	PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_WRITE_RD" ,
1582	dest, "in_WRITE_UNIT_IN_WRITE_RD" );
1583	PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_NUM_REG_RD" ,
1584	dest, "in_WRITE_UNIT_IN_NUM_REG_RD" );
1585	PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_DATA_RD" ,
1586	dest, "in_WRITE_UNIT_IN_DATA_RD" );
1587	PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_WRITE_RE" ,
1588	dest, "in_WRITE_UNIT_IN_WRITE_RE" );
1589	PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_NUM_REG_RE" ,
1590	dest, "in_WRITE_UNIT_IN_NUM_REG_RE" );
1591	PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_DATA_RE" ,
1592	dest, "in_WRITE_UNIT_IN_DATA_RE" );
1593	PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_EXCEPTION" ,
1594	dest, "in_WRITE_UNIT_IN_EXCEPTION" );
1595	PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_NO_SEQUENCE" ,
1596	dest, "in_WRITE_UNIT_IN_NO_SEQUENCE" );
1597	PORT_MAP(_component ,src ,"out_WRITE_UNIT_IN_"+toString(i)+"_ADDRESS" ,
1598	dest, "in_WRITE_UNIT_IN_ADDRESS" );
1599	}
1600	}
1601
1602	_component->test_map();
1603	for (uint32_t i=0; i<_param->_nb_read_unit; i++)
1604	_component_read_unit [i]->_component->test_map();
1605	for (uint32_t i=0; i<_param->_nb_functionnal_unit; i++)
1606	_component_functionnal_unit [i]->_component->test_map();
1607	for (uint32_t i=0; i<_param->_nb_load_store_unit; i++)
1608	_component_load_store_unit [i]->_component->test_map();
1609	for (uint32_t i=0; i<_param->_nb_write_unit; i++)
1610	_component_write_unit [i]->_component->test_map();
1611	_component_read_unit_to_execution_unit->_component->test_map();
1612	_component_execution_unit_to_write_unit->_component->test_map();
1613	_component_register_unit->_component->test_map();
1614
1615	#ifdef POSITION
1616	_component->generate_file();
1617	#endif
1618
1619	log_printf(FUNC,Execute_loop,FUNCTION,"End");
1620	};
1621
1622	}; // end namespace execute_loop
1623	}; // end namespace multi_execute_loop
1624	}; // end namespace core
1625
1626	}; // end namespace behavioural
1627	}; // end namespace morpheo

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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_allocation.cpp @ 78

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