[83] | 1 | /* |
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| 2 | * $Id: test.cpp 106 2009-02-09 22:55:26Z rosiere $ |
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| 3 | * |
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| 4 | * [ Description ] |
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| 5 | * |
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| 6 | * Test |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/include/test.h" |
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| 10 | #include "Behavioural/include/Allocation.h" |
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| 11 | |
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| 12 | void test (string name, |
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| 13 | morpheo::behavioural::core::multi_front_end::front_end::context_state::Parameters * _param) |
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| 14 | { |
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| 15 | msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); |
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| 16 | |
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| 17 | #ifdef STATISTICS |
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| 18 | morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); |
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| 19 | #endif |
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| 20 | |
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| 21 | Tusage_t _usage = USE_ALL; |
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| 22 | |
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| 23 | // _usage = usage_unset(_usage,USE_SYSTEMC ); |
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| 24 | // _usage = usage_unset(_usage,USE_VHDL ); |
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| 25 | // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH ); |
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| 26 | // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT); |
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| 27 | // _usage = usage_unset(_usage,USE_POSITION ); |
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| 28 | // _usage = usage_unset(_usage,USE_STATISTICS ); |
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| 29 | // _usage = usage_unset(_usage,USE_INFORMATION ); |
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| 30 | |
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| 31 | Context_State * _Context_State = new Context_State |
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| 32 | (name.c_str(), |
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| 33 | #ifdef STATISTICS |
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| 34 | _parameters_statistics, |
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| 35 | #endif |
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| 36 | _param, |
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| 37 | _usage); |
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| 38 | |
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| 39 | #ifdef SYSTEMC |
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| 40 | if (usage_is_set(_usage,USE_SYSTEMC)) |
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| 41 | { |
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| 42 | /********************************************************************* |
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| 43 | * Déclarations des signaux |
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| 44 | *********************************************************************/ |
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| 45 | string rename; |
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| 46 | |
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| 47 | sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); |
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| 48 | sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); |
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| 49 | |
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[88] | 50 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_VAL ," in_BRANCH_EVENT_VAL ",Tcontrol_t ,_param->_nb_context); |
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| 51 | ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ACK ,"out_BRANCH_EVENT_ACK ",Tcontrol_t ,_param->_nb_context); |
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| 52 | //ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_CONTEXT_ID ," in_BRANCH_EVENT_CONTEXT_ID ",Tcontext_t ,_param->_nb_context); |
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[98] | 53 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_DEPTH ," in_BRANCH_EVENT_DEPTH ",Tdepth_t ,_param->_nb_context); |
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[88] | 54 | //ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_MISS_PREDICTION ," in_BRANCH_EVENT_MISS_PREDICTION ",Tcontrol_t ,_param->_nb_context); |
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| 55 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_SRC ," in_BRANCH_EVENT_ADDRESS_SRC ",Taddress_t ,_param->_nb_context); |
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[95] | 56 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST_VAL ," in_BRANCH_EVENT_ADDRESS_DEST_VAL ",Tcontrol_t ,_param->_nb_context); |
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[88] | 57 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST ," in_BRANCH_EVENT_ADDRESS_DEST ",Taddress_t ,_param->_nb_context); |
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| 58 | |
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[83] | 59 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_VAL ," in_DECOD_EVENT_VAL ",Tcontrol_t ,_param->_nb_decod_unit); |
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| 60 | ALLOC1_SC_SIGNAL(out_DECOD_EVENT_ACK ,"out_DECOD_EVENT_ACK ",Tcontrol_t ,_param->_nb_decod_unit); |
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| 61 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_CONTEXT_ID ," in_DECOD_EVENT_CONTEXT_ID ",Tcontext_t ,_param->_nb_decod_unit); |
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| 62 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_DEPTH ," in_DECOD_EVENT_DEPTH ",Tdepth_t ,_param->_nb_decod_unit); |
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| 63 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_TYPE ," in_DECOD_EVENT_TYPE ",Tevent_type_t,_param->_nb_decod_unit); |
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| 64 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_IS_DELAY_SLOT ," in_DECOD_EVENT_IS_DELAY_SLOT ",Tcontrol_t ,_param->_nb_decod_unit); |
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| 65 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS ," in_DECOD_EVENT_ADDRESS ",Taddress_t ,_param->_nb_decod_unit); |
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| 66 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS_EPCR ," in_DECOD_EVENT_ADDRESS_EPCR ",Taddress_t ,_param->_nb_decod_unit); |
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| 67 | |
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[88] | 68 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_VAL ," in_COMMIT_EVENT_VAL ",Tcontrol_t ); |
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| 69 | ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ACK ,"out_COMMIT_EVENT_ACK ",Tcontrol_t ); |
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| 70 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_CONTEXT_ID ," in_COMMIT_EVENT_CONTEXT_ID ",Tcontext_t ); |
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| 71 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_DEPTH ," in_COMMIT_EVENT_DEPTH ",Tdepth_t ); |
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| 72 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_TYPE ," in_COMMIT_EVENT_TYPE ",Tevent_type_t); |
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| 73 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_IS_DELAY_SLOT ," in_COMMIT_EVENT_IS_DELAY_SLOT ",Tcontrol_t ); |
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| 74 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS ," in_COMMIT_EVENT_ADDRESS ",Taddress_t ); |
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[105] | 75 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EPCR_VAL ," in_COMMIT_EVENT_ADDRESS_EPCR_VAL ",Tcontrol_t ); |
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[88] | 76 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EPCR ," in_COMMIT_EVENT_ADDRESS_EPCR ",Taddress_t ); |
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| 77 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EEAR_VAL ," in_COMMIT_EVENT_ADDRESS_EEAR_VAL ",Tcontrol_t ); |
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[97] | 78 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EEAR ," in_COMMIT_EVENT_ADDRESS_EEAR ",Tgeneral_data_t); |
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[83] | 79 | |
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| 80 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL ," in_BRANCH_COMPLETE_VAL ",Tcontrol_t ,_param->_nb_inst_branch_complete); |
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| 81 | ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ACK ,"out_BRANCH_COMPLETE_ACK ",Tcontrol_t ,_param->_nb_inst_branch_complete); |
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| 82 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_CONTEXT_ID ," in_BRANCH_COMPLETE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_branch_complete); |
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| 83 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH ," in_BRANCH_COMPLETE_DEPTH ",Tdepth_t ,_param->_nb_inst_branch_complete); |
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| 84 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION," in_BRANCH_COMPLETE_MISS_PREDICTION",Tcontrol_t ,_param->_nb_inst_branch_complete); |
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| 85 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_TAKE ," in_BRANCH_COMPLETE_TAKE ",Tcontrol_t ,_param->_nb_inst_branch_complete); |
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| 86 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC ," in_BRANCH_COMPLETE_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_branch_complete); |
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| 87 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST ," in_BRANCH_COMPLETE_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_branch_complete); |
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| 88 | |
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| 89 | |
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[88] | 90 | ALLOC1_SC_SIGNAL( in_NB_INST_DECOD_ALL ," in_NB_INST_DECOD_ALL ",Tcounter_t ,_param->_nb_context ); |
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| 91 | ALLOC1_SC_SIGNAL( in_NB_INST_COMMIT_ALL ," in_NB_INST_COMMIT_ALL ",Tcounter_t ,_param->_nb_context ); |
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| 92 | ALLOC1_SC_SIGNAL( in_NB_INST_COMMIT_MEM ," in_NB_INST_COMMIT_MEM ",Tcounter_t ,_param->_nb_context ); |
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[83] | 93 | |
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| 94 | ALLOC1_SC_SIGNAL(out_EVENT_VAL ,"out_EVENT_VAL ",Tcontrol_t ,_param->_nb_context ); |
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| 95 | ALLOC1_SC_SIGNAL( in_EVENT_ACK ," in_EVENT_ACK ",Tcontrol_t ,_param->_nb_context ); |
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| 96 | ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS ,"out_EVENT_ADDRESS ",Taddress_t ,_param->_nb_context ); |
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| 97 | ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT ,"out_EVENT_ADDRESS_NEXT ",Taddress_t ,_param->_nb_context ); |
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| 98 | ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT_VAL ,"out_EVENT_ADDRESS_NEXT_VAL ",Tcontrol_t ,_param->_nb_context ); |
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| 99 | ALLOC1_SC_SIGNAL(out_EVENT_IS_DS_TAKE ,"out_EVENT_IS_DS_TAKE ",Tcontrol_t ,_param->_nb_context ); |
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[97] | 100 | ALLOC1_SC_SIGNAL(out_EVENT_TYPE ,"out_EVENT_TYPE ",Tevent_type_t,_param->_nb_context ); |
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| 101 | ALLOC1_SC_SIGNAL(out_EVENT_DEPTH ,"out_EVENT_DEPTH ",Tdepth_t ,_param->_nb_context ); |
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| 102 | |
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[88] | 103 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_VAL ,"out_SPR_EVENT_VAL ",Tcontrol_t ,_param->_nb_context ); |
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| 104 | ALLOC1_SC_SIGNAL( in_SPR_EVENT_ACK ," in_SPR_EVENT_ACK ",Tcontrol_t ,_param->_nb_context ); |
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| 105 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_EPCR ,"out_SPR_EVENT_EPCR ",Taddress_t ,_param->_nb_context ); |
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| 106 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_EEAR ,"out_SPR_EVENT_EEAR ",Taddress_t ,_param->_nb_context ); |
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| 107 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_EEAR_WEN ,"out_SPR_EVENT_EEAR_WEN ",Tcontrol_t ,_param->_nb_context ); |
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| 108 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_SR_DSX ,"out_SPR_EVENT_SR_DSX ",Tcontrol_t ,_param->_nb_context ); |
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| 109 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_SR_TO_ESR ,"out_SPR_EVENT_SR_TO_ESR ",Tcontrol_t ,_param->_nb_context ); |
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[83] | 110 | |
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| 111 | ALLOC1_SC_SIGNAL(out_CONTEXT_DECOD_ENABLE ,"out_CONTEXT_DECOD_ENABLE ",Tcontrol_t ,_param->_nb_context ); |
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| 112 | |
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[88] | 113 | ALLOC1_SC_SIGNAL( in_DEPTH_MIN ," in_DEPTH_MIN ",Tdepth_t ,_param->_nb_context ); |
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[83] | 114 | |
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[88] | 115 | ALLOC1_SC_SIGNAL( in_SPR_SR_IEE ," in_SPR_SR_IEE ",Tcontrol_t ,_param->_nb_context ); |
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| 116 | ALLOC1_SC_SIGNAL( in_SPR_SR_EPH ," in_SPR_SR_EPH ",Tcontrol_t ,_param->_nb_context ); |
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| 117 | |
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| 118 | ALLOC1_SC_SIGNAL( in_INTERRUPT_ENABLE ," in_INTERRUPT_ENABLE ",Tcontrol_t ,_param->_nb_context ); |
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| 119 | |
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[83] | 120 | /******************************************************** |
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| 121 | * Instanciation |
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| 122 | ********************************************************/ |
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| 123 | |
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| 124 | msg(_("<%s> : Instanciation of _Context_State.\n"),name.c_str()); |
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| 125 | |
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| 126 | (*(_Context_State->in_CLOCK)) (*(in_CLOCK)); |
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| 127 | (*(_Context_State->in_NRESET)) (*(in_NRESET)); |
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| 128 | |
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[88] | 129 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_VAL ,_param->_nb_context); |
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| 130 | INSTANCE1_SC_SIGNAL(_Context_State,out_BRANCH_EVENT_ACK ,_param->_nb_context); |
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| 131 | //INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_CONTEXT_ID ,_param->_nb_context); |
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[98] | 132 | if (_param->_have_port_depth) |
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| 133 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_DEPTH ,_param->_nb_context); |
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[88] | 134 | //INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_MISS_PREDICTION ,_param->_nb_context); |
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| 135 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_SRC ,_param->_nb_context); |
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[95] | 136 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context); |
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[88] | 137 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context); |
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[83] | 138 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_VAL ,_param->_nb_decod_unit); |
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| 139 | INSTANCE1_SC_SIGNAL(_Context_State,out_DECOD_EVENT_ACK ,_param->_nb_decod_unit); |
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| 140 | if (_param->_have_port_context_id) |
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| 141 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_CONTEXT_ID ,_param->_nb_decod_unit); |
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[88] | 142 | if (_param->_have_port_depth) |
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[83] | 143 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_DEPTH ,_param->_nb_decod_unit); |
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| 144 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_TYPE ,_param->_nb_decod_unit); |
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| 145 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_IS_DELAY_SLOT ,_param->_nb_decod_unit); |
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| 146 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_ADDRESS ,_param->_nb_decod_unit); |
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| 147 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_ADDRESS_EPCR ,_param->_nb_decod_unit); |
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| 148 | |
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[88] | 149 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_VAL ); |
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| 150 | INSTANCE_SC_SIGNAL (_Context_State,out_COMMIT_EVENT_ACK ); |
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[83] | 151 | if (_param->_have_port_context_id) |
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[88] | 152 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_CONTEXT_ID ); |
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| 153 | if (_param->_have_port_depth) |
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| 154 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_DEPTH ); |
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| 155 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_TYPE ); |
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| 156 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_IS_DELAY_SLOT ); |
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| 157 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_ADDRESS ); |
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[105] | 158 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_ADDRESS_EPCR_VAL ); |
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[88] | 159 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_ADDRESS_EPCR ); |
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| 160 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_ADDRESS_EEAR_VAL ); |
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| 161 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_ADDRESS_EEAR ); |
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[83] | 162 | |
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| 163 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_VAL ,_param->_nb_inst_branch_complete); |
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| 164 | INSTANCE1_SC_SIGNAL(_Context_State,out_BRANCH_COMPLETE_ACK ,_param->_nb_inst_branch_complete); |
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| 165 | if (_param->_have_port_context_id) |
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| 166 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_CONTEXT_ID ,_param->_nb_inst_branch_complete); |
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[88] | 167 | if (_param->_have_port_depth) |
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[83] | 168 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete); |
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| 169 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete); |
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| 170 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); |
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| 171 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); |
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| 172 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); |
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| 173 | |
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[88] | 174 | INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_DECOD_ALL ,_param->_nb_context ); |
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| 175 | INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_COMMIT_ALL ,_param->_nb_context ); |
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| 176 | INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_COMMIT_MEM ,_param->_nb_context ); |
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[83] | 177 | |
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| 178 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_VAL ,_param->_nb_context ); |
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| 179 | INSTANCE1_SC_SIGNAL(_Context_State, in_EVENT_ACK ,_param->_nb_context ); |
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| 180 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_ADDRESS ,_param->_nb_context ); |
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| 181 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_ADDRESS_NEXT ,_param->_nb_context ); |
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| 182 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_ADDRESS_NEXT_VAL ,_param->_nb_context ); |
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| 183 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_IS_DS_TAKE ,_param->_nb_context ); |
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[97] | 184 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_TYPE ,_param->_nb_context ); |
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| 185 | if (_param->_have_port_depth) |
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| 186 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_DEPTH ,_param->_nb_context ); |
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[83] | 187 | |
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[88] | 188 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_VAL ,_param->_nb_context ); |
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| 189 | INSTANCE1_SC_SIGNAL(_Context_State, in_SPR_EVENT_ACK ,_param->_nb_context ); |
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| 190 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_EPCR ,_param->_nb_context ); |
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| 191 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_EEAR ,_param->_nb_context ); |
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| 192 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_EEAR_WEN ,_param->_nb_context ); |
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| 193 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_SR_DSX ,_param->_nb_context ); |
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| 194 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_SR_TO_ESR ,_param->_nb_context ); |
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[83] | 195 | |
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| 196 | INSTANCE1_SC_SIGNAL(_Context_State,out_CONTEXT_DECOD_ENABLE ,_param->_nb_context ); |
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| 197 | |
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| 198 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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[88] | 199 | if (_param->_have_port_depth) |
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| 200 | INSTANCE_SC_SIGNAL(_Context_State, in_DEPTH_MIN [i]); |
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[83] | 201 | |
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[88] | 202 | INSTANCE1_SC_SIGNAL(_Context_State, in_SPR_SR_IEE ,_param->_nb_context ); |
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| 203 | INSTANCE1_SC_SIGNAL(_Context_State, in_SPR_SR_EPH ,_param->_nb_context ); |
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| 204 | |
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| 205 | INSTANCE1_SC_SIGNAL(_Context_State, in_INTERRUPT_ENABLE ,_param->_nb_context ); |
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| 206 | |
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[83] | 207 | msg(_("<%s> : Start Simulation ............\n"),name.c_str()); |
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| 208 | |
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| 209 | Time * _time = new Time(); |
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| 210 | |
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| 211 | /******************************************************** |
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| 212 | * Simulation - Begin |
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| 213 | ********************************************************/ |
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| 214 | |
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| 215 | // Initialisation |
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| 216 | |
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[101] | 217 | const bool test1 = true; |
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[105] | 218 | const bool test2 = false; |
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[101] | 219 | const bool test3 = true; |
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| 220 | const bool test4 = true; |
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| 221 | const bool test5 = true; |
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| 222 | const bool test6 = true; |
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| 223 | const bool test7 = true; |
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| 224 | const bool test8 = true; |
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| 225 | const bool test9 = true; |
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| 226 | const bool test10 = true; |
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| 227 | const bool test11 = true; |
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| 228 | const bool test12 = true; |
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| 229 | |
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[83] | 230 | const uint32_t seed = 0; |
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| 231 | //const uint32_t seed = static_cast<uint32_t>(time(NULL)); |
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| 232 | |
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| 233 | srand(seed); |
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| 234 | |
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[98] | 235 | const int32_t percent_transaction_branch_event = 75; |
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[83] | 236 | const int32_t percent_transaction_decod_event = 75; |
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| 237 | const int32_t percent_transaction_commit_event = 75; |
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[98] | 238 | //const int32_t percent_transaction_branch_complete = 75; |
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[83] | 239 | const int32_t percent_transaction_event = 75; |
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| 240 | const int32_t percent_transaction_spr = 75; |
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| 241 | |
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| 242 | SC_START(0); |
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| 243 | LABEL("Initialisation"); |
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| 244 | |
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| 245 | LABEL("Reset"); |
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| 246 | in_NRESET->write(0); |
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| 247 | SC_START(5); |
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| 248 | in_NRESET->write(1); |
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| 249 | |
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| 250 | LABEL("Loop of Test"); |
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| 251 | |
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| 252 | for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) |
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| 253 | { |
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| 254 | LABEL("Iteration %d",iteration); |
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| 255 | for (uint32_t i=0; i<_param->_nb_decod_unit; i++) |
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| 256 | in_DECOD_EVENT_VAL [i]->write(0); |
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[88] | 257 | in_COMMIT_EVENT_VAL ->write(0); |
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[98] | 258 | // for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) |
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| 259 | // in_BRANCH_COMPLETE_VAL [i]->write(0); |
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| 260 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 261 | in_BRANCH_EVENT_VAL [i]->write(0); |
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[83] | 262 | |
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| 263 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 264 | { |
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[88] | 265 | in_BRANCH_EVENT_VAL [i]->write(0); |
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| 266 | in_EVENT_ACK [i]->write(0); |
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| 267 | in_SPR_EVENT_ACK [i]->write(0); |
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| 268 | in_SPR_SR_IEE [i]->write(0); |
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| 269 | in_SPR_SR_EPH [i]->write(0); |
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| 270 | in_INTERRUPT_ENABLE [i]->write(0); |
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[83] | 271 | |
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| 272 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[i]->read(), 1); |
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| 273 | } |
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| 274 | |
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| 275 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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[88] | 276 | if (_param->_have_port_depth) |
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[106] | 277 | in_DEPTH_MIN [i]->write((log2(_param->_nb_inst_branch_speculated[i])==0)?0:(i%log2(_param->_nb_inst_branch_speculated[i]))); |
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[83] | 278 | |
---|
| 279 | uint32_t context = rand()%_param->_nb_context; |
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| 280 | |
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[101] | 281 | if (test1) |
---|
[83] | 282 | { |
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| 283 | SC_START(3); |
---|
| 284 | |
---|
| 285 | LABEL("msync (begin)"); |
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[88] | 286 | in_NB_INST_DECOD_ALL [context]->write(1); |
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| 287 | in_NB_INST_COMMIT_ALL [context]->write(1); |
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| 288 | in_NB_INST_COMMIT_MEM [context]->write(1); |
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[83] | 289 | |
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| 290 | uint32_t port = rand()%_param->_nb_decod_unit; |
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| 291 | |
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| 292 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
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| 293 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
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| 294 | in_DECOD_EVENT_ADDRESS [port]->write(0x100); |
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| 295 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdeadbeef); |
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[88] | 296 | if (_param->_have_port_depth) |
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[106] | 297 | in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); |
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[83] | 298 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_MSYNC); |
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| 299 | |
---|
| 300 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
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| 301 | |
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[101] | 302 | in_DECOD_EVENT_VAL [port]->write(1); |
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| 303 | |
---|
| 304 | SC_START(0); |
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| 305 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 306 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 0); |
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| 307 | |
---|
| 308 | SC_START(1); |
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| 309 | |
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[88] | 310 | in_NB_INST_DECOD_ALL [context]->write(0); |
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[101] | 311 | in_NB_INST_COMMIT_ALL [context]->write(0); |
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[88] | 312 | in_NB_INST_COMMIT_MEM [context]->write(0); |
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[101] | 313 | |
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| 314 | LABEL("msync (send decod)"); |
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| 315 | SC_START(0); |
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[83] | 316 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
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[101] | 317 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 1); |
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| 318 | |
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[83] | 319 | SC_START(1); |
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[101] | 320 | |
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| 321 | in_DECOD_EVENT_VAL [port]->write(0); |
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| 322 | in_NB_INST_COMMIT_ALL [context]->write(1); |
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[83] | 323 | |
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| 324 | LABEL("msync (wait end)"); |
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| 325 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
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| 326 | |
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| 327 | SC_START(3); |
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| 328 | |
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[101] | 329 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
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| 330 | in_NB_INST_COMMIT_ALL [context]->write(0); |
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| 331 | |
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[83] | 332 | SC_START(1); |
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| 333 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
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| 334 | } |
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| 335 | |
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[101] | 336 | if (test2) |
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[83] | 337 | { |
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| 338 | SC_START(3); |
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[101] | 339 | |
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[83] | 340 | LABEL("psync (begin)"); |
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[88] | 341 | in_NB_INST_DECOD_ALL [context]->write(1); |
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| 342 | in_NB_INST_COMMIT_ALL [context]->write(1); |
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| 343 | in_NB_INST_COMMIT_MEM [context]->write(1); |
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[83] | 344 | |
---|
| 345 | uint32_t port = rand()%_param->_nb_decod_unit; |
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| 346 | |
---|
| 347 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
| 348 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
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| 349 | in_DECOD_EVENT_ADDRESS [port]->write(0x200); |
---|
| 350 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdeadbebe); |
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[88] | 351 | if (_param->_have_port_depth) |
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[106] | 352 | in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); |
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[83] | 353 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_PSYNC); |
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| 354 | |
---|
| 355 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 356 | |
---|
[101] | 357 | in_DECOD_EVENT_VAL [port]->write(1); |
---|
| 358 | |
---|
| 359 | SC_START(0); |
---|
| 360 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 361 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 0); |
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| 362 | |
---|
| 363 | SC_START(1); |
---|
| 364 | |
---|
| 365 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 366 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 367 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
| 368 | |
---|
| 369 | LABEL("psync (send decod)"); |
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| 370 | SC_START(0); |
---|
| 371 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 372 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 1); |
---|
| 373 | |
---|
| 374 | SC_START(1); |
---|
| 375 | |
---|
| 376 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 377 | in_NB_INST_COMMIT_ALL [context]->write(1); |
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[83] | 378 | |
---|
| 379 | LABEL("psync (wait end)"); |
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| 380 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 381 | |
---|
| 382 | SC_START(3); |
---|
| 383 | |
---|
[101] | 384 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
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[88] | 385 | in_NB_INST_COMMIT_ALL [context]->write(0); |
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[101] | 386 | |
---|
[83] | 387 | SC_START(1); |
---|
| 388 | |
---|
| 389 | bool find = false; |
---|
| 390 | do |
---|
| 391 | { |
---|
| 392 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 393 | |
---|
| 394 | SC_START(0); |
---|
| 395 | |
---|
| 396 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 397 | { |
---|
| 398 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x201); |
---|
| 399 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xdeadbebe); |
---|
| 400 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 401 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 402 | |
---|
| 403 | find = true; |
---|
| 404 | } |
---|
| 405 | |
---|
| 406 | SC_START(1); |
---|
| 407 | } |
---|
| 408 | while (not find); |
---|
| 409 | |
---|
| 410 | in_EVENT_ACK [context]->write(0); |
---|
| 411 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 412 | } |
---|
| 413 | |
---|
[101] | 414 | if (test3) |
---|
[83] | 415 | { |
---|
| 416 | SC_START(3); |
---|
[101] | 417 | |
---|
[83] | 418 | LABEL("csync (begin)"); |
---|
[88] | 419 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 420 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 421 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 422 | |
---|
| 423 | uint32_t port = rand()%_param->_nb_decod_unit; |
---|
| 424 | |
---|
| 425 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
| 426 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
---|
[101] | 427 | in_DECOD_EVENT_ADDRESS [port]->write(0x300); |
---|
| 428 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdead0300); |
---|
[88] | 429 | if (_param->_have_port_depth) |
---|
[106] | 430 | in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[83] | 431 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_CSYNC); |
---|
| 432 | |
---|
| 433 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 434 | |
---|
[101] | 435 | in_DECOD_EVENT_VAL [port]->write(1); |
---|
| 436 | |
---|
| 437 | SC_START(0); |
---|
| 438 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 439 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 0); |
---|
| 440 | |
---|
| 441 | SC_START(1); |
---|
| 442 | |
---|
| 443 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 444 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 445 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
| 446 | |
---|
| 447 | LABEL("csync (send decod)"); |
---|
| 448 | SC_START(0); |
---|
| 449 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 450 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 1); |
---|
| 451 | |
---|
| 452 | SC_START(1); |
---|
| 453 | |
---|
| 454 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 455 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
[83] | 456 | |
---|
| 457 | LABEL("csync (wait end)"); |
---|
| 458 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 459 | |
---|
| 460 | SC_START(3); |
---|
| 461 | |
---|
[101] | 462 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
[88] | 463 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
[101] | 464 | |
---|
[83] | 465 | SC_START(1); |
---|
| 466 | |
---|
| 467 | bool find = false; |
---|
| 468 | do |
---|
| 469 | { |
---|
| 470 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 471 | |
---|
| 472 | SC_START(0); |
---|
| 473 | |
---|
| 474 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 475 | { |
---|
[101] | 476 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x301); |
---|
| 477 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xdead0300); |
---|
[83] | 478 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 479 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
[101] | 480 | |
---|
[83] | 481 | find = true; |
---|
| 482 | } |
---|
| 483 | |
---|
| 484 | SC_START(1); |
---|
| 485 | } |
---|
| 486 | while (not find); |
---|
[101] | 487 | |
---|
[83] | 488 | in_EVENT_ACK [context]->write(0); |
---|
[101] | 489 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 490 | |
---|
[83] | 491 | } |
---|
| 492 | |
---|
[101] | 493 | if (test4) |
---|
[83] | 494 | { |
---|
| 495 | SC_START(3); |
---|
| 496 | |
---|
[101] | 497 | LABEL("spr_access (begin)"); |
---|
[88] | 498 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 499 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 500 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 501 | |
---|
| 502 | uint32_t port = rand()%_param->_nb_decod_unit; |
---|
| 503 | |
---|
| 504 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
| 505 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
---|
[101] | 506 | in_DECOD_EVENT_ADDRESS [port]->write(0x400); |
---|
| 507 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdead0400); |
---|
[88] | 508 | if (_param->_have_port_depth) |
---|
[106] | 509 | in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[83] | 510 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_SPR_ACCESS); |
---|
| 511 | |
---|
| 512 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 513 | |
---|
[101] | 514 | in_DECOD_EVENT_VAL [port]->write(1); |
---|
| 515 | |
---|
| 516 | SC_START(0); |
---|
| 517 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 518 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 0); |
---|
| 519 | |
---|
| 520 | SC_START(1); |
---|
| 521 | |
---|
[88] | 522 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 523 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 524 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[101] | 525 | |
---|
| 526 | LABEL("spr_access (send decod)"); |
---|
| 527 | SC_START(0); |
---|
[83] | 528 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
[101] | 529 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 1); |
---|
| 530 | |
---|
[83] | 531 | SC_START(1); |
---|
[101] | 532 | |
---|
| 533 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 534 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
[83] | 535 | |
---|
[101] | 536 | LABEL("spr_access (wait end)"); |
---|
[83] | 537 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 538 | |
---|
| 539 | SC_START(3); |
---|
| 540 | |
---|
[101] | 541 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
[88] | 542 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
[101] | 543 | |
---|
[83] | 544 | SC_START(1); |
---|
| 545 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 546 | } |
---|
| 547 | |
---|
[101] | 548 | if (test5) |
---|
[83] | 549 | { |
---|
| 550 | SC_START(3); |
---|
| 551 | |
---|
| 552 | LABEL("miss (begin)"); |
---|
[88] | 553 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 554 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 555 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 556 | |
---|
[98] | 557 | // uint32_t port = rand()%_param->_nb_inst_branch_complete; |
---|
[83] | 558 | |
---|
[98] | 559 | // in_BRANCH_COMPLETE_CONTEXT_ID [port]->write(context); |
---|
| 560 | // if (_param->_have_port_depth) |
---|
[106] | 561 | // in_BRANCH_COMPLETE_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[98] | 562 | // in_BRANCH_COMPLETE_ADDRESS_SRC [port]->write(0x400); |
---|
| 563 | // in_BRANCH_COMPLETE_ADDRESS_DEST [port]->write(0x500); |
---|
| 564 | // in_BRANCH_COMPLETE_MISS_PREDICTION [port]->write(1); |
---|
| 565 | // in_BRANCH_COMPLETE_TAKE [port]->write(0); |
---|
| 566 | |
---|
| 567 | // TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 568 | |
---|
| 569 | // do |
---|
| 570 | // { |
---|
| 571 | // in_BRANCH_COMPLETE_VAL [port]->write(rand()%percent_transaction_branch_complete); |
---|
| 572 | |
---|
| 573 | // SC_START(1); |
---|
| 574 | // } |
---|
| 575 | // while (not ( in_BRANCH_COMPLETE_VAL [port]->read() and |
---|
| 576 | // out_BRANCH_COMPLETE_ACK [port]->read())); |
---|
| 577 | // in_BRANCH_COMPLETE_VAL [port]->write(0); |
---|
| 578 | |
---|
| 579 | uint32_t port = context; |
---|
| 580 | |
---|
[88] | 581 | if (_param->_have_port_depth) |
---|
[106] | 582 | in_BRANCH_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[98] | 583 | in_BRANCH_EVENT_ADDRESS_SRC [port]->write(0x400); |
---|
| 584 | in_BRANCH_EVENT_ADDRESS_DEST [port]->write(0x500); |
---|
| 585 | in_BRANCH_EVENT_ADDRESS_DEST_VAL [port]->write(0); |
---|
[83] | 586 | |
---|
| 587 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 588 | |
---|
| 589 | do |
---|
| 590 | { |
---|
[98] | 591 | in_BRANCH_EVENT_VAL [port]->write(rand()%percent_transaction_branch_event); |
---|
[83] | 592 | |
---|
| 593 | SC_START(1); |
---|
| 594 | } |
---|
[98] | 595 | while (not ( in_BRANCH_EVENT_VAL [port]->read() and |
---|
| 596 | out_BRANCH_EVENT_ACK [port]->read())); |
---|
| 597 | in_BRANCH_EVENT_VAL [port]->write(0); |
---|
[83] | 598 | |
---|
| 599 | LABEL("miss (wait end)"); |
---|
| 600 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 601 | |
---|
| 602 | SC_START(3); |
---|
| 603 | |
---|
[88] | 604 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 605 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 606 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 607 | |
---|
| 608 | SC_START(1); |
---|
| 609 | |
---|
| 610 | LABEL("miss (wait event)"); |
---|
| 611 | |
---|
| 612 | |
---|
| 613 | bool find = false; |
---|
| 614 | do |
---|
| 615 | { |
---|
| 616 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 617 | |
---|
| 618 | SC_START(0); |
---|
| 619 | |
---|
| 620 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 621 | { |
---|
| 622 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x401); |
---|
| 623 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0x500); |
---|
| 624 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 625 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 626 | |
---|
| 627 | find = true; |
---|
| 628 | } |
---|
| 629 | |
---|
| 630 | SC_START(1); |
---|
| 631 | } |
---|
| 632 | while (not find); |
---|
| 633 | |
---|
| 634 | in_EVENT_ACK [context]->write(0); |
---|
| 635 | |
---|
| 636 | } |
---|
| 637 | |
---|
[101] | 638 | if (test6) |
---|
[83] | 639 | { |
---|
| 640 | SC_START(3); |
---|
| 641 | |
---|
| 642 | LABEL("miss (begin)"); |
---|
[88] | 643 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 644 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 645 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 646 | |
---|
[98] | 647 | // uint32_t port = rand()%_param->_nb_inst_branch_complete; |
---|
[83] | 648 | |
---|
[98] | 649 | // in_BRANCH_COMPLETE_CONTEXT_ID [port]->write(context); |
---|
| 650 | // if (_param->_have_port_depth) |
---|
[106] | 651 | // in_BRANCH_COMPLETE_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[98] | 652 | // in_BRANCH_COMPLETE_ADDRESS_SRC [port]->write(0x600); |
---|
| 653 | // in_BRANCH_COMPLETE_ADDRESS_DEST [port]->write(0x700); |
---|
| 654 | // in_BRANCH_COMPLETE_MISS_PREDICTION [port]->write(1); |
---|
| 655 | // in_BRANCH_COMPLETE_TAKE [port]->write(1); |
---|
[83] | 656 | |
---|
[98] | 657 | // TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 658 | |
---|
| 659 | // do |
---|
| 660 | // { |
---|
| 661 | // in_BRANCH_COMPLETE_VAL [port]->write(rand()%percent_transaction_branch_complete); |
---|
| 662 | |
---|
| 663 | // SC_START(1); |
---|
| 664 | // } |
---|
| 665 | // while (not ( in_BRANCH_COMPLETE_VAL [port]->read() and |
---|
| 666 | // out_BRANCH_COMPLETE_ACK [port]->read())); |
---|
| 667 | // in_BRANCH_COMPLETE_VAL [port]->write(0); |
---|
| 668 | |
---|
| 669 | uint32_t port = context; |
---|
| 670 | |
---|
[106] | 671 | in_BRANCH_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[98] | 672 | in_BRANCH_EVENT_ADDRESS_SRC [port]->write(0x600); |
---|
| 673 | in_BRANCH_EVENT_ADDRESS_DEST [port]->write(0x700); |
---|
| 674 | in_BRANCH_EVENT_ADDRESS_DEST_VAL [port]->write(1); |
---|
| 675 | |
---|
[83] | 676 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 677 | |
---|
| 678 | do |
---|
| 679 | { |
---|
[98] | 680 | in_BRANCH_EVENT_VAL [port]->write(rand()%percent_transaction_branch_event); |
---|
[83] | 681 | |
---|
| 682 | SC_START(1); |
---|
| 683 | } |
---|
[98] | 684 | while (not ( in_BRANCH_EVENT_VAL [port]->read() and |
---|
| 685 | out_BRANCH_EVENT_ACK [port]->read())); |
---|
| 686 | in_BRANCH_EVENT_VAL [port]->write(0); |
---|
[83] | 687 | |
---|
| 688 | LABEL("miss (wait end)"); |
---|
| 689 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 690 | |
---|
| 691 | SC_START(3); |
---|
| 692 | |
---|
[88] | 693 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 694 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 695 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 696 | |
---|
| 697 | SC_START(1); |
---|
| 698 | |
---|
| 699 | LABEL("miss (wait event)"); |
---|
| 700 | |
---|
| 701 | bool find = false; |
---|
| 702 | do |
---|
| 703 | { |
---|
| 704 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 705 | |
---|
| 706 | SC_START(0); |
---|
| 707 | |
---|
| 708 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 709 | { |
---|
| 710 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x601); |
---|
| 711 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0x700); |
---|
| 712 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),1); |
---|
| 713 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),1); |
---|
| 714 | |
---|
| 715 | find = true; |
---|
| 716 | } |
---|
| 717 | |
---|
| 718 | SC_START(1); |
---|
| 719 | } |
---|
| 720 | while (not find); |
---|
| 721 | |
---|
| 722 | in_EVENT_ACK [context]->write(0); |
---|
| 723 | } |
---|
| 724 | |
---|
[101] | 725 | if (test7) |
---|
[83] | 726 | { |
---|
| 727 | SC_START(3); |
---|
| 728 | |
---|
| 729 | LABEL("exception (begin)"); |
---|
[88] | 730 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 731 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 732 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 733 | |
---|
[88] | 734 | uint32_t port = rand()%_param->_nb_decod_unit; |
---|
[83] | 735 | |
---|
| 736 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
[88] | 737 | if (_param->_have_port_depth) |
---|
[106] | 738 | in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[83] | 739 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_EXCEPTION); |
---|
| 740 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
---|
| 741 | in_DECOD_EVENT_ADDRESS [port]->write(0x800); |
---|
| 742 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0x900); |
---|
| 743 | |
---|
| 744 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 745 | |
---|
| 746 | do |
---|
| 747 | { |
---|
| 748 | in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event); |
---|
| 749 | |
---|
| 750 | SC_START(1); |
---|
| 751 | } |
---|
| 752 | while (not ( in_DECOD_EVENT_VAL [port]->read() and |
---|
| 753 | out_DECOD_EVENT_ACK [port]->read())); |
---|
| 754 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 755 | |
---|
| 756 | LABEL("exception (wait end)"); |
---|
| 757 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 758 | |
---|
| 759 | SC_START(3); |
---|
| 760 | |
---|
[88] | 761 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 762 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 763 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 764 | |
---|
| 765 | SC_START(1); |
---|
| 766 | |
---|
| 767 | LABEL("exception (wait event)"); |
---|
| 768 | |
---|
| 769 | bool find = false; |
---|
| 770 | do |
---|
| 771 | { |
---|
| 772 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 773 | |
---|
| 774 | SC_START(0); |
---|
| 775 | |
---|
| 776 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 777 | { |
---|
| 778 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x800); |
---|
| 779 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0x900); |
---|
| 780 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 781 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 782 | |
---|
| 783 | find = true; |
---|
| 784 | } |
---|
| 785 | |
---|
| 786 | SC_START(1); |
---|
| 787 | } |
---|
| 788 | while (not find); |
---|
| 789 | |
---|
| 790 | in_EVENT_ACK [context]->write(0); |
---|
| 791 | |
---|
| 792 | LABEL("exception (wait spr)"); |
---|
| 793 | |
---|
| 794 | find = false; |
---|
| 795 | do |
---|
| 796 | { |
---|
[88] | 797 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 798 | |
---|
| 799 | SC_START(0); |
---|
| 800 | |
---|
[88] | 801 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 802 | { |
---|
[88] | 803 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0x900); |
---|
| 804 | //TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),); |
---|
| 805 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),0); |
---|
| 806 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),0); |
---|
| 807 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 808 | |
---|
| 809 | find = true; |
---|
| 810 | } |
---|
| 811 | |
---|
| 812 | SC_START(1); |
---|
| 813 | } |
---|
| 814 | while (not find); |
---|
| 815 | |
---|
[88] | 816 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 817 | } |
---|
| 818 | |
---|
[101] | 819 | if (test8) |
---|
[83] | 820 | { |
---|
| 821 | SC_START(3); |
---|
| 822 | |
---|
| 823 | LABEL("exception (begin)"); |
---|
[88] | 824 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 825 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 826 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 827 | |
---|
[88] | 828 | uint32_t port = rand()%_param->_nb_decod_unit; |
---|
[83] | 829 | |
---|
| 830 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
[88] | 831 | if (_param->_have_port_depth) |
---|
[106] | 832 | in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[83] | 833 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_EXCEPTION); |
---|
| 834 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(1); |
---|
| 835 | in_DECOD_EVENT_ADDRESS [port]->write(0x800); |
---|
| 836 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0x900); |
---|
| 837 | |
---|
| 838 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 839 | |
---|
| 840 | do |
---|
| 841 | { |
---|
| 842 | in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event); |
---|
| 843 | |
---|
| 844 | SC_START(1); |
---|
| 845 | } |
---|
| 846 | while (not ( in_DECOD_EVENT_VAL [port]->read() and |
---|
| 847 | out_DECOD_EVENT_ACK [port]->read())); |
---|
| 848 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 849 | |
---|
| 850 | LABEL("exception (wait end)"); |
---|
| 851 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 852 | |
---|
| 853 | SC_START(3); |
---|
| 854 | |
---|
[88] | 855 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 856 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 857 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 858 | |
---|
| 859 | SC_START(1); |
---|
| 860 | |
---|
| 861 | LABEL("exception (wait event)"); |
---|
| 862 | |
---|
| 863 | bool find = false; |
---|
| 864 | do |
---|
| 865 | { |
---|
| 866 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 867 | |
---|
| 868 | SC_START(0); |
---|
| 869 | |
---|
| 870 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 871 | { |
---|
| 872 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x800); |
---|
| 873 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0x900); |
---|
| 874 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 875 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 876 | |
---|
| 877 | find = true; |
---|
| 878 | } |
---|
| 879 | |
---|
| 880 | SC_START(1); |
---|
| 881 | } |
---|
| 882 | while (not find); |
---|
| 883 | |
---|
| 884 | in_EVENT_ACK [context]->write(0); |
---|
| 885 | |
---|
| 886 | LABEL("exception (wait spr)"); |
---|
| 887 | |
---|
| 888 | find = false; |
---|
| 889 | do |
---|
| 890 | { |
---|
[88] | 891 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 892 | |
---|
| 893 | SC_START(0); |
---|
| 894 | |
---|
[88] | 895 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 896 | { |
---|
[88] | 897 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0x900); |
---|
| 898 | //TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),); |
---|
| 899 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),0); |
---|
| 900 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),1); |
---|
| 901 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 902 | |
---|
| 903 | find = true; |
---|
| 904 | } |
---|
| 905 | |
---|
| 906 | SC_START(1); |
---|
| 907 | } |
---|
| 908 | while (not find); |
---|
| 909 | |
---|
[88] | 910 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 911 | } |
---|
| 912 | |
---|
[101] | 913 | if (test9) |
---|
[83] | 914 | { |
---|
| 915 | SC_START(3); |
---|
| 916 | |
---|
| 917 | LABEL("exception (begin)"); |
---|
[88] | 918 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 919 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 920 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 921 | |
---|
[88] | 922 | in_COMMIT_EVENT_CONTEXT_ID ->write(context); |
---|
| 923 | if (_param->_have_port_depth) |
---|
[106] | 924 | in_COMMIT_EVENT_DEPTH ->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[88] | 925 | in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); |
---|
| 926 | in_COMMIT_EVENT_IS_DELAY_SLOT ->write(0); |
---|
| 927 | in_COMMIT_EVENT_ADDRESS ->write(0xa00); |
---|
| 928 | in_COMMIT_EVENT_ADDRESS_EPCR ->write(0xb00); |
---|
[105] | 929 | in_COMMIT_EVENT_ADDRESS_EPCR_VAL ->write(0); |
---|
[88] | 930 | in_COMMIT_EVENT_ADDRESS_EEAR ->write(0xc00); |
---|
| 931 | in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(0); |
---|
[83] | 932 | |
---|
| 933 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 934 | |
---|
| 935 | do |
---|
| 936 | { |
---|
[88] | 937 | in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event); |
---|
[83] | 938 | |
---|
| 939 | SC_START(1); |
---|
| 940 | } |
---|
[88] | 941 | while (not ( in_COMMIT_EVENT_VAL ->read() and |
---|
| 942 | out_COMMIT_EVENT_ACK ->read())); |
---|
| 943 | in_COMMIT_EVENT_VAL ->write(0); |
---|
[83] | 944 | |
---|
| 945 | LABEL("exception (wait end)"); |
---|
| 946 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 947 | |
---|
| 948 | SC_START(3); |
---|
| 949 | |
---|
[88] | 950 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 951 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 952 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 953 | |
---|
| 954 | SC_START(1); |
---|
| 955 | |
---|
| 956 | LABEL("exception (wait event)"); |
---|
| 957 | |
---|
| 958 | bool find = false; |
---|
| 959 | do |
---|
| 960 | { |
---|
| 961 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 962 | |
---|
| 963 | SC_START(0); |
---|
| 964 | |
---|
| 965 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 966 | { |
---|
| 967 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0xa00); |
---|
| 968 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xb00); |
---|
| 969 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 970 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 971 | |
---|
| 972 | find = true; |
---|
| 973 | } |
---|
| 974 | |
---|
| 975 | SC_START(1); |
---|
| 976 | } |
---|
| 977 | while (not find); |
---|
| 978 | |
---|
| 979 | in_EVENT_ACK [context]->write(0); |
---|
| 980 | |
---|
| 981 | LABEL("exception (wait spr)"); |
---|
| 982 | |
---|
| 983 | find = false; |
---|
| 984 | do |
---|
| 985 | { |
---|
[88] | 986 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 987 | |
---|
| 988 | SC_START(0); |
---|
| 989 | |
---|
[88] | 990 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 991 | { |
---|
[88] | 992 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0xb00); |
---|
| 993 | TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),0xc00); |
---|
| 994 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),0); |
---|
| 995 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),0); |
---|
| 996 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 997 | |
---|
| 998 | find = true; |
---|
| 999 | } |
---|
| 1000 | |
---|
| 1001 | SC_START(1); |
---|
| 1002 | } |
---|
| 1003 | while (not find); |
---|
| 1004 | |
---|
[88] | 1005 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 1006 | } |
---|
| 1007 | |
---|
[101] | 1008 | if (test10) |
---|
[83] | 1009 | { |
---|
| 1010 | SC_START(3); |
---|
| 1011 | |
---|
| 1012 | LABEL("exception (begin)"); |
---|
[88] | 1013 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 1014 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 1015 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 1016 | |
---|
[88] | 1017 | in_COMMIT_EVENT_CONTEXT_ID ->write(context); |
---|
| 1018 | if (_param->_have_port_depth) |
---|
[106] | 1019 | in_COMMIT_EVENT_DEPTH ->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[88] | 1020 | in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); |
---|
| 1021 | in_COMMIT_EVENT_IS_DELAY_SLOT ->write(1); |
---|
| 1022 | in_COMMIT_EVENT_ADDRESS ->write(0xd00); |
---|
| 1023 | in_COMMIT_EVENT_ADDRESS_EPCR ->write(0xe00); |
---|
[105] | 1024 | in_COMMIT_EVENT_ADDRESS_EPCR_VAL ->write(0); |
---|
[88] | 1025 | in_COMMIT_EVENT_ADDRESS_EEAR ->write(0xf00); |
---|
| 1026 | in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(0); |
---|
[83] | 1027 | |
---|
| 1028 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 1029 | |
---|
| 1030 | do |
---|
| 1031 | { |
---|
[88] | 1032 | in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event); |
---|
[83] | 1033 | |
---|
| 1034 | SC_START(1); |
---|
| 1035 | } |
---|
[88] | 1036 | while (not ( in_COMMIT_EVENT_VAL ->read() and |
---|
| 1037 | out_COMMIT_EVENT_ACK ->read())); |
---|
| 1038 | in_COMMIT_EVENT_VAL ->write(0); |
---|
[83] | 1039 | |
---|
| 1040 | LABEL("exception (wait end)"); |
---|
| 1041 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 1042 | |
---|
| 1043 | SC_START(3); |
---|
| 1044 | |
---|
[88] | 1045 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 1046 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 1047 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 1048 | |
---|
| 1049 | SC_START(1); |
---|
| 1050 | |
---|
| 1051 | LABEL("exception (wait event)"); |
---|
| 1052 | |
---|
| 1053 | bool find = false; |
---|
| 1054 | do |
---|
| 1055 | { |
---|
| 1056 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 1057 | |
---|
| 1058 | SC_START(0); |
---|
| 1059 | |
---|
| 1060 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 1061 | { |
---|
| 1062 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0xd00); |
---|
| 1063 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xe00); |
---|
| 1064 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 1065 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 1066 | |
---|
| 1067 | find = true; |
---|
| 1068 | } |
---|
| 1069 | |
---|
| 1070 | SC_START(1); |
---|
| 1071 | } |
---|
| 1072 | while (not find); |
---|
| 1073 | |
---|
| 1074 | in_EVENT_ACK [context]->write(0); |
---|
| 1075 | |
---|
| 1076 | LABEL("exception (wait spr)"); |
---|
| 1077 | |
---|
| 1078 | find = false; |
---|
| 1079 | do |
---|
| 1080 | { |
---|
[88] | 1081 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 1082 | |
---|
| 1083 | SC_START(0); |
---|
| 1084 | |
---|
[88] | 1085 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 1086 | { |
---|
[88] | 1087 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0xe00); |
---|
| 1088 | TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),0xf00); |
---|
| 1089 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),0); |
---|
| 1090 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),1); |
---|
| 1091 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 1092 | |
---|
| 1093 | find = true; |
---|
| 1094 | } |
---|
| 1095 | |
---|
| 1096 | SC_START(1); |
---|
| 1097 | } |
---|
| 1098 | while (not find); |
---|
| 1099 | |
---|
[88] | 1100 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 1101 | } |
---|
| 1102 | |
---|
[101] | 1103 | if (test11) |
---|
[83] | 1104 | { |
---|
| 1105 | SC_START(3); |
---|
| 1106 | |
---|
| 1107 | LABEL("exception (begin)"); |
---|
[88] | 1108 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 1109 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 1110 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 1111 | |
---|
[88] | 1112 | in_COMMIT_EVENT_CONTEXT_ID ->write(context); |
---|
| 1113 | if (_param->_have_port_depth) |
---|
[106] | 1114 | in_COMMIT_EVENT_DEPTH ->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[88] | 1115 | in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); |
---|
| 1116 | in_COMMIT_EVENT_IS_DELAY_SLOT ->write(0); |
---|
| 1117 | in_COMMIT_EVENT_ADDRESS ->write(0xa00); |
---|
| 1118 | in_COMMIT_EVENT_ADDRESS_EPCR ->write(0xb00); |
---|
[105] | 1119 | in_COMMIT_EVENT_ADDRESS_EPCR_VAL ->write(1); |
---|
[88] | 1120 | in_COMMIT_EVENT_ADDRESS_EEAR ->write(0xc00); |
---|
| 1121 | in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(1); |
---|
[83] | 1122 | |
---|
| 1123 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 1124 | |
---|
| 1125 | do |
---|
| 1126 | { |
---|
[88] | 1127 | in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event); |
---|
[83] | 1128 | |
---|
| 1129 | SC_START(1); |
---|
| 1130 | } |
---|
[88] | 1131 | while (not ( in_COMMIT_EVENT_VAL ->read() and |
---|
| 1132 | out_COMMIT_EVENT_ACK ->read())); |
---|
| 1133 | in_COMMIT_EVENT_VAL ->write(0); |
---|
[83] | 1134 | |
---|
| 1135 | LABEL("exception (wait end)"); |
---|
| 1136 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 1137 | |
---|
| 1138 | SC_START(3); |
---|
| 1139 | |
---|
[88] | 1140 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 1141 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 1142 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 1143 | |
---|
| 1144 | SC_START(1); |
---|
| 1145 | |
---|
| 1146 | LABEL("exception (wait event)"); |
---|
| 1147 | |
---|
| 1148 | bool find = false; |
---|
| 1149 | do |
---|
| 1150 | { |
---|
| 1151 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 1152 | |
---|
| 1153 | SC_START(0); |
---|
| 1154 | |
---|
| 1155 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 1156 | { |
---|
| 1157 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0xa00); |
---|
| 1158 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xb00); |
---|
| 1159 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 1160 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 1161 | |
---|
| 1162 | find = true; |
---|
| 1163 | } |
---|
| 1164 | |
---|
| 1165 | SC_START(1); |
---|
| 1166 | } |
---|
| 1167 | while (not find); |
---|
| 1168 | |
---|
| 1169 | in_EVENT_ACK [context]->write(0); |
---|
| 1170 | |
---|
| 1171 | LABEL("exception (wait spr)"); |
---|
| 1172 | |
---|
| 1173 | find = false; |
---|
| 1174 | do |
---|
| 1175 | { |
---|
[88] | 1176 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 1177 | |
---|
| 1178 | SC_START(0); |
---|
| 1179 | |
---|
[88] | 1180 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 1181 | { |
---|
[88] | 1182 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0xb00); |
---|
| 1183 | TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),0xc00); |
---|
| 1184 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),1); |
---|
| 1185 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),0); |
---|
| 1186 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 1187 | |
---|
| 1188 | find = true; |
---|
| 1189 | } |
---|
| 1190 | |
---|
| 1191 | SC_START(1); |
---|
| 1192 | } |
---|
| 1193 | while (not find); |
---|
| 1194 | |
---|
[88] | 1195 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 1196 | } |
---|
| 1197 | |
---|
[101] | 1198 | if (test12) |
---|
[83] | 1199 | { |
---|
| 1200 | SC_START(3); |
---|
| 1201 | |
---|
| 1202 | LABEL("exception (begin)"); |
---|
[88] | 1203 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 1204 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 1205 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 1206 | |
---|
[88] | 1207 | in_COMMIT_EVENT_CONTEXT_ID ->write(context); |
---|
| 1208 | if (_param->_have_port_depth) |
---|
[106] | 1209 | in_COMMIT_EVENT_DEPTH ->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[88] | 1210 | in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); |
---|
| 1211 | in_COMMIT_EVENT_IS_DELAY_SLOT ->write(1); |
---|
| 1212 | in_COMMIT_EVENT_ADDRESS ->write(0xd00); |
---|
| 1213 | in_COMMIT_EVENT_ADDRESS_EPCR ->write(0xe00); |
---|
[105] | 1214 | in_COMMIT_EVENT_ADDRESS_EPCR_VAL ->write(1); |
---|
[88] | 1215 | in_COMMIT_EVENT_ADDRESS_EEAR ->write(0xf00); |
---|
| 1216 | in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(1); |
---|
[83] | 1217 | |
---|
| 1218 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 1219 | |
---|
| 1220 | do |
---|
| 1221 | { |
---|
[88] | 1222 | in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event); |
---|
[83] | 1223 | |
---|
| 1224 | SC_START(1); |
---|
| 1225 | } |
---|
[88] | 1226 | while (not ( in_COMMIT_EVENT_VAL ->read() and |
---|
| 1227 | out_COMMIT_EVENT_ACK ->read())); |
---|
| 1228 | in_COMMIT_EVENT_VAL ->write(0); |
---|
[83] | 1229 | |
---|
| 1230 | LABEL("exception (wait end)"); |
---|
| 1231 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 1232 | |
---|
| 1233 | SC_START(3); |
---|
| 1234 | |
---|
[88] | 1235 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 1236 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 1237 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 1238 | |
---|
| 1239 | SC_START(1); |
---|
| 1240 | |
---|
| 1241 | LABEL("exception (wait event)"); |
---|
| 1242 | |
---|
| 1243 | bool find = false; |
---|
| 1244 | do |
---|
| 1245 | { |
---|
| 1246 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 1247 | |
---|
| 1248 | SC_START(0); |
---|
| 1249 | |
---|
| 1250 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 1251 | { |
---|
| 1252 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0xd00); |
---|
| 1253 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xe00); |
---|
| 1254 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 1255 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 1256 | |
---|
| 1257 | find = true; |
---|
| 1258 | } |
---|
| 1259 | |
---|
| 1260 | SC_START(1); |
---|
| 1261 | } |
---|
| 1262 | while (not find); |
---|
| 1263 | |
---|
| 1264 | in_EVENT_ACK [context]->write(0); |
---|
| 1265 | |
---|
| 1266 | LABEL("exception (wait spr)"); |
---|
| 1267 | |
---|
| 1268 | find = false; |
---|
| 1269 | do |
---|
| 1270 | { |
---|
[88] | 1271 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 1272 | |
---|
| 1273 | SC_START(0); |
---|
| 1274 | |
---|
[88] | 1275 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 1276 | { |
---|
[88] | 1277 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0xe00); |
---|
| 1278 | TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),0xf00); |
---|
| 1279 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),1); |
---|
| 1280 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),1); |
---|
| 1281 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 1282 | |
---|
| 1283 | find = true; |
---|
| 1284 | } |
---|
| 1285 | |
---|
| 1286 | SC_START(1); |
---|
| 1287 | } |
---|
| 1288 | while (not find); |
---|
| 1289 | |
---|
[88] | 1290 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 1291 | } |
---|
| 1292 | |
---|
| 1293 | |
---|
| 1294 | SC_START(1); |
---|
| 1295 | } |
---|
| 1296 | |
---|
| 1297 | |
---|
| 1298 | /******************************************************** |
---|
| 1299 | * Simulation - End |
---|
| 1300 | ********************************************************/ |
---|
| 1301 | |
---|
| 1302 | TEST_OK ("End of Simulation"); |
---|
| 1303 | delete _time; |
---|
| 1304 | |
---|
| 1305 | msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); |
---|
| 1306 | |
---|
| 1307 | delete in_CLOCK; |
---|
| 1308 | delete in_NRESET; |
---|
| 1309 | |
---|
[88] | 1310 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_VAL ,_param->_nb_context); |
---|
| 1311 | DELETE1_SC_SIGNAL(out_BRANCH_EVENT_ACK ,_param->_nb_context); |
---|
| 1312 | //DELETE1_SC_SIGNAL( in_BRANCH_EVENT_CONTEXT_ID ,_param->_nb_context); |
---|
[98] | 1313 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_DEPTH ,_param->_nb_context); |
---|
[88] | 1314 | //DELETE1_SC_SIGNAL( in_BRANCH_EVENT_MISS_PREDICTION ,_param->_nb_context); |
---|
| 1315 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_SRC ,_param->_nb_context); |
---|
[95] | 1316 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context); |
---|
[88] | 1317 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context); |
---|
[83] | 1318 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_VAL ,_param->_nb_decod_unit); |
---|
| 1319 | DELETE1_SC_SIGNAL(out_DECOD_EVENT_ACK ,_param->_nb_decod_unit); |
---|
| 1320 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_CONTEXT_ID ,_param->_nb_decod_unit); |
---|
| 1321 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_DEPTH ,_param->_nb_decod_unit); |
---|
| 1322 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_TYPE ,_param->_nb_decod_unit); |
---|
| 1323 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_IS_DELAY_SLOT ,_param->_nb_decod_unit); |
---|
| 1324 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS ,_param->_nb_decod_unit); |
---|
| 1325 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS_EPCR ,_param->_nb_decod_unit); |
---|
[88] | 1326 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_VAL ); |
---|
| 1327 | DELETE_SC_SIGNAL (out_COMMIT_EVENT_ACK ); |
---|
| 1328 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_CONTEXT_ID ); |
---|
| 1329 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_DEPTH ); |
---|
| 1330 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_TYPE ); |
---|
| 1331 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_IS_DELAY_SLOT ); |
---|
| 1332 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS ); |
---|
[105] | 1333 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EPCR_VAL ); |
---|
[88] | 1334 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EPCR ); |
---|
| 1335 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EEAR_VAL ); |
---|
| 1336 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EEAR ); |
---|
[83] | 1337 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL ,_param->_nb_inst_branch_complete); |
---|
| 1338 | DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ACK ,_param->_nb_inst_branch_complete); |
---|
| 1339 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_CONTEXT_ID ,_param->_nb_inst_branch_complete); |
---|
| 1340 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete); |
---|
| 1341 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete); |
---|
| 1342 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); |
---|
| 1343 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); |
---|
| 1344 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); |
---|
[88] | 1345 | DELETE1_SC_SIGNAL( in_NB_INST_DECOD_ALL ,_param->_nb_context ); |
---|
| 1346 | DELETE1_SC_SIGNAL( in_NB_INST_COMMIT_ALL ,_param->_nb_context ); |
---|
| 1347 | DELETE1_SC_SIGNAL( in_NB_INST_COMMIT_MEM ,_param->_nb_context ); |
---|
[83] | 1348 | DELETE1_SC_SIGNAL(out_EVENT_VAL ,_param->_nb_context ); |
---|
| 1349 | DELETE1_SC_SIGNAL( in_EVENT_ACK ,_param->_nb_context ); |
---|
| 1350 | DELETE1_SC_SIGNAL(out_EVENT_ADDRESS ,_param->_nb_context ); |
---|
| 1351 | DELETE1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT ,_param->_nb_context ); |
---|
| 1352 | DELETE1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT_VAL ,_param->_nb_context ); |
---|
| 1353 | DELETE1_SC_SIGNAL(out_EVENT_IS_DS_TAKE ,_param->_nb_context ); |
---|
[97] | 1354 | DELETE1_SC_SIGNAL(out_EVENT_TYPE ,_param->_nb_context ); |
---|
| 1355 | DELETE1_SC_SIGNAL(out_EVENT_DEPTH ,_param->_nb_context ); |
---|
[88] | 1356 | DELETE1_SC_SIGNAL(out_SPR_EVENT_VAL ,_param->_nb_context ); |
---|
| 1357 | DELETE1_SC_SIGNAL( in_SPR_EVENT_ACK ,_param->_nb_context ); |
---|
| 1358 | DELETE1_SC_SIGNAL(out_SPR_EVENT_EPCR ,_param->_nb_context ); |
---|
| 1359 | DELETE1_SC_SIGNAL(out_SPR_EVENT_EEAR ,_param->_nb_context ); |
---|
| 1360 | DELETE1_SC_SIGNAL(out_SPR_EVENT_EEAR_WEN ,_param->_nb_context ); |
---|
| 1361 | DELETE1_SC_SIGNAL(out_SPR_EVENT_SR_DSX ,_param->_nb_context ); |
---|
| 1362 | DELETE1_SC_SIGNAL(out_SPR_EVENT_SR_TO_ESR ,_param->_nb_context ); |
---|
[83] | 1363 | DELETE1_SC_SIGNAL(out_CONTEXT_DECOD_ENABLE ,_param->_nb_context ); |
---|
[88] | 1364 | DELETE1_SC_SIGNAL( in_DEPTH_MIN ,_param->_nb_context ); |
---|
| 1365 | DELETE1_SC_SIGNAL( in_SPR_SR_IEE ,_param->_nb_context ); |
---|
| 1366 | DELETE1_SC_SIGNAL( in_SPR_SR_EPH ,_param->_nb_context ); |
---|
| 1367 | |
---|
| 1368 | DELETE1_SC_SIGNAL( in_INTERRUPT_ENABLE ,_param->_nb_context ); |
---|
[83] | 1369 | } |
---|
| 1370 | #endif |
---|
| 1371 | |
---|
| 1372 | delete _Context_State; |
---|
| 1373 | #ifdef STATISTICS |
---|
| 1374 | delete _parameters_statistics; |
---|
| 1375 | #endif |
---|
| 1376 | } |
---|