[83] | 1 | /* |
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| 2 | * $Id: test.cpp 112 2009-03-18 22:36:26Z rosiere $ |
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| 3 | * |
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| 4 | * [ Description ] |
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| 5 | * |
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| 6 | * Test |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/include/test.h" |
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| 10 | #include "Behavioural/include/Allocation.h" |
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| 11 | |
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| 12 | void test (string name, |
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| 13 | morpheo::behavioural::core::multi_front_end::front_end::context_state::Parameters * _param) |
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| 14 | { |
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| 15 | msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); |
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| 16 | |
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| 17 | #ifdef STATISTICS |
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| 18 | morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); |
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| 19 | #endif |
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| 20 | |
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| 21 | Tusage_t _usage = USE_ALL; |
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| 22 | |
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| 23 | // _usage = usage_unset(_usage,USE_SYSTEMC ); |
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| 24 | // _usage = usage_unset(_usage,USE_VHDL ); |
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| 25 | // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH ); |
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| 26 | // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT); |
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| 27 | // _usage = usage_unset(_usage,USE_POSITION ); |
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| 28 | // _usage = usage_unset(_usage,USE_STATISTICS ); |
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| 29 | // _usage = usage_unset(_usage,USE_INFORMATION ); |
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| 30 | |
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| 31 | Context_State * _Context_State = new Context_State |
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| 32 | (name.c_str(), |
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| 33 | #ifdef STATISTICS |
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| 34 | _parameters_statistics, |
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| 35 | #endif |
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| 36 | _param, |
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| 37 | _usage); |
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| 38 | |
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| 39 | #ifdef SYSTEMC |
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| 40 | if (usage_is_set(_usage,USE_SYSTEMC)) |
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| 41 | { |
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| 42 | /********************************************************************* |
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| 43 | * Déclarations des signaux |
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| 44 | *********************************************************************/ |
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| 45 | string rename; |
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| 46 | |
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| 47 | sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); |
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| 48 | sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); |
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| 49 | |
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[88] | 50 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_VAL ," in_BRANCH_EVENT_VAL ",Tcontrol_t ,_param->_nb_context); |
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| 51 | ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ACK ,"out_BRANCH_EVENT_ACK ",Tcontrol_t ,_param->_nb_context); |
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| 52 | //ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_CONTEXT_ID ," in_BRANCH_EVENT_CONTEXT_ID ",Tcontext_t ,_param->_nb_context); |
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[98] | 53 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_DEPTH ," in_BRANCH_EVENT_DEPTH ",Tdepth_t ,_param->_nb_context); |
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[88] | 54 | //ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_MISS_PREDICTION ," in_BRANCH_EVENT_MISS_PREDICTION ",Tcontrol_t ,_param->_nb_context); |
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| 55 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_SRC ," in_BRANCH_EVENT_ADDRESS_SRC ",Taddress_t ,_param->_nb_context); |
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[95] | 56 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST_VAL ," in_BRANCH_EVENT_ADDRESS_DEST_VAL ",Tcontrol_t ,_param->_nb_context); |
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[88] | 57 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST ," in_BRANCH_EVENT_ADDRESS_DEST ",Taddress_t ,_param->_nb_context); |
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| 58 | |
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[83] | 59 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_VAL ," in_DECOD_EVENT_VAL ",Tcontrol_t ,_param->_nb_decod_unit); |
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| 60 | ALLOC1_SC_SIGNAL(out_DECOD_EVENT_ACK ,"out_DECOD_EVENT_ACK ",Tcontrol_t ,_param->_nb_decod_unit); |
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| 61 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_CONTEXT_ID ," in_DECOD_EVENT_CONTEXT_ID ",Tcontext_t ,_param->_nb_decod_unit); |
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| 62 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_DEPTH ," in_DECOD_EVENT_DEPTH ",Tdepth_t ,_param->_nb_decod_unit); |
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| 63 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_TYPE ," in_DECOD_EVENT_TYPE ",Tevent_type_t,_param->_nb_decod_unit); |
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| 64 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_IS_DELAY_SLOT ," in_DECOD_EVENT_IS_DELAY_SLOT ",Tcontrol_t ,_param->_nb_decod_unit); |
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| 65 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS ," in_DECOD_EVENT_ADDRESS ",Taddress_t ,_param->_nb_decod_unit); |
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| 66 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS_EPCR ," in_DECOD_EVENT_ADDRESS_EPCR ",Taddress_t ,_param->_nb_decod_unit); |
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| 67 | |
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[112] | 68 | ALLOC0_SC_SIGNAL( in_COMMIT_EVENT_VAL ," in_COMMIT_EVENT_VAL ",Tcontrol_t ); |
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| 69 | ALLOC0_SC_SIGNAL(out_COMMIT_EVENT_ACK ,"out_COMMIT_EVENT_ACK ",Tcontrol_t ); |
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| 70 | ALLOC0_SC_SIGNAL( in_COMMIT_EVENT_CONTEXT_ID ," in_COMMIT_EVENT_CONTEXT_ID ",Tcontext_t ); |
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| 71 | ALLOC0_SC_SIGNAL( in_COMMIT_EVENT_DEPTH ," in_COMMIT_EVENT_DEPTH ",Tdepth_t ); |
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| 72 | ALLOC0_SC_SIGNAL( in_COMMIT_EVENT_TYPE ," in_COMMIT_EVENT_TYPE ",Tevent_type_t); |
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| 73 | ALLOC0_SC_SIGNAL( in_COMMIT_EVENT_IS_DELAY_SLOT ," in_COMMIT_EVENT_IS_DELAY_SLOT ",Tcontrol_t ); |
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| 74 | ALLOC0_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS ," in_COMMIT_EVENT_ADDRESS ",Taddress_t ); |
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| 75 | ALLOC0_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EPCR_VAL ," in_COMMIT_EVENT_ADDRESS_EPCR_VAL ",Tcontrol_t ); |
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| 76 | ALLOC0_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EPCR ," in_COMMIT_EVENT_ADDRESS_EPCR ",Taddress_t ); |
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| 77 | ALLOC0_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EEAR_VAL ," in_COMMIT_EVENT_ADDRESS_EEAR_VAL ",Tcontrol_t ); |
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| 78 | ALLOC0_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EEAR ," in_COMMIT_EVENT_ADDRESS_EEAR ",Tgeneral_data_t); |
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[83] | 79 | |
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| 80 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL ," in_BRANCH_COMPLETE_VAL ",Tcontrol_t ,_param->_nb_inst_branch_complete); |
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| 81 | ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ACK ,"out_BRANCH_COMPLETE_ACK ",Tcontrol_t ,_param->_nb_inst_branch_complete); |
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| 82 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_CONTEXT_ID ," in_BRANCH_COMPLETE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_branch_complete); |
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| 83 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH ," in_BRANCH_COMPLETE_DEPTH ",Tdepth_t ,_param->_nb_inst_branch_complete); |
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| 84 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION," in_BRANCH_COMPLETE_MISS_PREDICTION",Tcontrol_t ,_param->_nb_inst_branch_complete); |
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[111] | 85 | //ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_TAKE ," in_BRANCH_COMPLETE_TAKE ",Tcontrol_t ,_param->_nb_inst_branch_complete); |
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| 86 | //ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC ," in_BRANCH_COMPLETE_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_branch_complete); |
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| 87 | //ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST ," in_BRANCH_COMPLETE_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_branch_complete); |
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[83] | 88 | |
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| 89 | |
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[88] | 90 | ALLOC1_SC_SIGNAL( in_NB_INST_DECOD_ALL ," in_NB_INST_DECOD_ALL ",Tcounter_t ,_param->_nb_context ); |
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| 91 | ALLOC1_SC_SIGNAL( in_NB_INST_COMMIT_ALL ," in_NB_INST_COMMIT_ALL ",Tcounter_t ,_param->_nb_context ); |
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| 92 | ALLOC1_SC_SIGNAL( in_NB_INST_COMMIT_MEM ," in_NB_INST_COMMIT_MEM ",Tcounter_t ,_param->_nb_context ); |
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[83] | 93 | |
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| 94 | ALLOC1_SC_SIGNAL(out_EVENT_VAL ,"out_EVENT_VAL ",Tcontrol_t ,_param->_nb_context ); |
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| 95 | ALLOC1_SC_SIGNAL( in_EVENT_ACK ," in_EVENT_ACK ",Tcontrol_t ,_param->_nb_context ); |
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| 96 | ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS ,"out_EVENT_ADDRESS ",Taddress_t ,_param->_nb_context ); |
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| 97 | ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT ,"out_EVENT_ADDRESS_NEXT ",Taddress_t ,_param->_nb_context ); |
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| 98 | ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT_VAL ,"out_EVENT_ADDRESS_NEXT_VAL ",Tcontrol_t ,_param->_nb_context ); |
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| 99 | ALLOC1_SC_SIGNAL(out_EVENT_IS_DS_TAKE ,"out_EVENT_IS_DS_TAKE ",Tcontrol_t ,_param->_nb_context ); |
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[97] | 100 | ALLOC1_SC_SIGNAL(out_EVENT_TYPE ,"out_EVENT_TYPE ",Tevent_type_t,_param->_nb_context ); |
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| 101 | ALLOC1_SC_SIGNAL(out_EVENT_DEPTH ,"out_EVENT_DEPTH ",Tdepth_t ,_param->_nb_context ); |
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| 102 | |
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[88] | 103 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_VAL ,"out_SPR_EVENT_VAL ",Tcontrol_t ,_param->_nb_context ); |
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| 104 | ALLOC1_SC_SIGNAL( in_SPR_EVENT_ACK ," in_SPR_EVENT_ACK ",Tcontrol_t ,_param->_nb_context ); |
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| 105 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_EPCR ,"out_SPR_EVENT_EPCR ",Taddress_t ,_param->_nb_context ); |
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| 106 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_EEAR ,"out_SPR_EVENT_EEAR ",Taddress_t ,_param->_nb_context ); |
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| 107 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_EEAR_WEN ,"out_SPR_EVENT_EEAR_WEN ",Tcontrol_t ,_param->_nb_context ); |
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| 108 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_SR_DSX ,"out_SPR_EVENT_SR_DSX ",Tcontrol_t ,_param->_nb_context ); |
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| 109 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_SR_TO_ESR ,"out_SPR_EVENT_SR_TO_ESR ",Tcontrol_t ,_param->_nb_context ); |
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[83] | 110 | |
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| 111 | ALLOC1_SC_SIGNAL(out_CONTEXT_DECOD_ENABLE ,"out_CONTEXT_DECOD_ENABLE ",Tcontrol_t ,_param->_nb_context ); |
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| 112 | |
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[88] | 113 | ALLOC1_SC_SIGNAL( in_DEPTH_MIN ," in_DEPTH_MIN ",Tdepth_t ,_param->_nb_context ); |
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[83] | 114 | |
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[88] | 115 | ALLOC1_SC_SIGNAL( in_SPR_SR_IEE ," in_SPR_SR_IEE ",Tcontrol_t ,_param->_nb_context ); |
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| 116 | ALLOC1_SC_SIGNAL( in_SPR_SR_EPH ," in_SPR_SR_EPH ",Tcontrol_t ,_param->_nb_context ); |
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| 117 | |
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| 118 | ALLOC1_SC_SIGNAL( in_INTERRUPT_ENABLE ," in_INTERRUPT_ENABLE ",Tcontrol_t ,_param->_nb_context ); |
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| 119 | |
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[83] | 120 | /******************************************************** |
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| 121 | * Instanciation |
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| 122 | ********************************************************/ |
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| 123 | |
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| 124 | msg(_("<%s> : Instanciation of _Context_State.\n"),name.c_str()); |
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| 125 | |
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| 126 | (*(_Context_State->in_CLOCK)) (*(in_CLOCK)); |
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| 127 | (*(_Context_State->in_NRESET)) (*(in_NRESET)); |
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| 128 | |
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[88] | 129 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_VAL ,_param->_nb_context); |
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| 130 | INSTANCE1_SC_SIGNAL(_Context_State,out_BRANCH_EVENT_ACK ,_param->_nb_context); |
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| 131 | //INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_CONTEXT_ID ,_param->_nb_context); |
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[98] | 132 | if (_param->_have_port_depth) |
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| 133 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_DEPTH ,_param->_nb_context); |
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[88] | 134 | //INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_MISS_PREDICTION ,_param->_nb_context); |
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| 135 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_SRC ,_param->_nb_context); |
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[95] | 136 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context); |
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[88] | 137 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context); |
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[83] | 138 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_VAL ,_param->_nb_decod_unit); |
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| 139 | INSTANCE1_SC_SIGNAL(_Context_State,out_DECOD_EVENT_ACK ,_param->_nb_decod_unit); |
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| 140 | if (_param->_have_port_context_id) |
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| 141 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_CONTEXT_ID ,_param->_nb_decod_unit); |
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[88] | 142 | if (_param->_have_port_depth) |
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[83] | 143 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_DEPTH ,_param->_nb_decod_unit); |
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| 144 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_TYPE ,_param->_nb_decod_unit); |
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| 145 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_IS_DELAY_SLOT ,_param->_nb_decod_unit); |
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| 146 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_ADDRESS ,_param->_nb_decod_unit); |
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| 147 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_ADDRESS_EPCR ,_param->_nb_decod_unit); |
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| 148 | |
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[112] | 149 | INSTANCE0_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_VAL ); |
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| 150 | INSTANCE0_SC_SIGNAL(_Context_State,out_COMMIT_EVENT_ACK ); |
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[83] | 151 | if (_param->_have_port_context_id) |
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[112] | 152 | INSTANCE0_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_CONTEXT_ID ); |
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[88] | 153 | if (_param->_have_port_depth) |
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[112] | 154 | INSTANCE0_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_DEPTH ); |
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| 155 | INSTANCE0_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_TYPE ); |
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| 156 | INSTANCE0_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_IS_DELAY_SLOT ); |
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| 157 | INSTANCE0_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_ADDRESS ); |
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| 158 | INSTANCE0_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_ADDRESS_EPCR_VAL ); |
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| 159 | INSTANCE0_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_ADDRESS_EPCR ); |
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| 160 | INSTANCE0_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_ADDRESS_EEAR_VAL ); |
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| 161 | INSTANCE0_SC_SIGNAL(_Context_State, in_COMMIT_EVENT_ADDRESS_EEAR ); |
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[83] | 162 | |
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| 163 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_VAL ,_param->_nb_inst_branch_complete); |
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| 164 | INSTANCE1_SC_SIGNAL(_Context_State,out_BRANCH_COMPLETE_ACK ,_param->_nb_inst_branch_complete); |
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| 165 | if (_param->_have_port_context_id) |
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| 166 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_CONTEXT_ID ,_param->_nb_inst_branch_complete); |
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[88] | 167 | if (_param->_have_port_depth) |
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[83] | 168 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete); |
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| 169 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete); |
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[111] | 170 | //INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); |
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| 171 | //INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); |
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| 172 | //INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); |
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[83] | 173 | |
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[88] | 174 | INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_DECOD_ALL ,_param->_nb_context ); |
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| 175 | INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_COMMIT_ALL ,_param->_nb_context ); |
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| 176 | INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_COMMIT_MEM ,_param->_nb_context ); |
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[83] | 177 | |
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| 178 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_VAL ,_param->_nb_context ); |
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| 179 | INSTANCE1_SC_SIGNAL(_Context_State, in_EVENT_ACK ,_param->_nb_context ); |
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| 180 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_ADDRESS ,_param->_nb_context ); |
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| 181 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_ADDRESS_NEXT ,_param->_nb_context ); |
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| 182 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_ADDRESS_NEXT_VAL ,_param->_nb_context ); |
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| 183 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_IS_DS_TAKE ,_param->_nb_context ); |
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[97] | 184 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_TYPE ,_param->_nb_context ); |
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| 185 | if (_param->_have_port_depth) |
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| 186 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_DEPTH ,_param->_nb_context ); |
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[83] | 187 | |
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[88] | 188 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_VAL ,_param->_nb_context ); |
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| 189 | INSTANCE1_SC_SIGNAL(_Context_State, in_SPR_EVENT_ACK ,_param->_nb_context ); |
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| 190 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_EPCR ,_param->_nb_context ); |
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| 191 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_EEAR ,_param->_nb_context ); |
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| 192 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_EEAR_WEN ,_param->_nb_context ); |
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| 193 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_SR_DSX ,_param->_nb_context ); |
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| 194 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_SR_TO_ESR ,_param->_nb_context ); |
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[83] | 195 | |
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| 196 | INSTANCE1_SC_SIGNAL(_Context_State,out_CONTEXT_DECOD_ENABLE ,_param->_nb_context ); |
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| 197 | |
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[112] | 198 | if (_param->_have_port_depth) |
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| 199 | INSTANCE1_SC_SIGNAL(_Context_State, in_DEPTH_MIN ,_param->_nb_context ); |
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[83] | 200 | |
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[88] | 201 | INSTANCE1_SC_SIGNAL(_Context_State, in_SPR_SR_IEE ,_param->_nb_context ); |
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| 202 | INSTANCE1_SC_SIGNAL(_Context_State, in_SPR_SR_EPH ,_param->_nb_context ); |
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| 203 | |
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| 204 | INSTANCE1_SC_SIGNAL(_Context_State, in_INTERRUPT_ENABLE ,_param->_nb_context ); |
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| 205 | |
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[83] | 206 | msg(_("<%s> : Start Simulation ............\n"),name.c_str()); |
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| 207 | |
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| 208 | Time * _time = new Time(); |
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| 209 | |
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| 210 | /******************************************************** |
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| 211 | * Simulation - Begin |
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| 212 | ********************************************************/ |
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| 213 | |
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| 214 | // Initialisation |
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| 215 | |
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[101] | 216 | const bool test1 = true; |
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[105] | 217 | const bool test2 = false; |
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[101] | 218 | const bool test3 = true; |
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| 219 | const bool test4 = true; |
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| 220 | const bool test5 = true; |
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| 221 | const bool test6 = true; |
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| 222 | const bool test7 = true; |
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| 223 | const bool test8 = true; |
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| 224 | const bool test9 = true; |
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| 225 | const bool test10 = true; |
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| 226 | const bool test11 = true; |
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| 227 | const bool test12 = true; |
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| 228 | |
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[83] | 229 | const uint32_t seed = 0; |
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| 230 | //const uint32_t seed = static_cast<uint32_t>(time(NULL)); |
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| 231 | |
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| 232 | srand(seed); |
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| 233 | |
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[98] | 234 | const int32_t percent_transaction_branch_event = 75; |
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[83] | 235 | const int32_t percent_transaction_decod_event = 75; |
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| 236 | const int32_t percent_transaction_commit_event = 75; |
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[98] | 237 | //const int32_t percent_transaction_branch_complete = 75; |
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[83] | 238 | const int32_t percent_transaction_event = 75; |
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| 239 | const int32_t percent_transaction_spr = 75; |
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| 240 | |
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| 241 | SC_START(0); |
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| 242 | LABEL("Initialisation"); |
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| 243 | |
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| 244 | LABEL("Reset"); |
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| 245 | in_NRESET->write(0); |
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| 246 | SC_START(5); |
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| 247 | in_NRESET->write(1); |
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| 248 | |
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| 249 | LABEL("Loop of Test"); |
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| 250 | |
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| 251 | for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) |
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| 252 | { |
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| 253 | LABEL("Iteration %d",iteration); |
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| 254 | for (uint32_t i=0; i<_param->_nb_decod_unit; i++) |
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| 255 | in_DECOD_EVENT_VAL [i]->write(0); |
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[88] | 256 | in_COMMIT_EVENT_VAL ->write(0); |
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[98] | 257 | // for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) |
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| 258 | // in_BRANCH_COMPLETE_VAL [i]->write(0); |
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| 259 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 260 | in_BRANCH_EVENT_VAL [i]->write(0); |
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[83] | 261 | |
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| 262 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 263 | { |
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[88] | 264 | in_BRANCH_EVENT_VAL [i]->write(0); |
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| 265 | in_EVENT_ACK [i]->write(0); |
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| 266 | in_SPR_EVENT_ACK [i]->write(0); |
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| 267 | in_SPR_SR_IEE [i]->write(0); |
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| 268 | in_SPR_SR_EPH [i]->write(0); |
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| 269 | in_INTERRUPT_ENABLE [i]->write(0); |
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[83] | 270 | |
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| 271 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[i]->read(), 1); |
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| 272 | } |
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| 273 | |
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| 274 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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[88] | 275 | if (_param->_have_port_depth) |
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[106] | 276 | in_DEPTH_MIN [i]->write((log2(_param->_nb_inst_branch_speculated[i])==0)?0:(i%log2(_param->_nb_inst_branch_speculated[i]))); |
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[83] | 277 | |
---|
| 278 | uint32_t context = rand()%_param->_nb_context; |
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| 279 | |
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[101] | 280 | if (test1) |
---|
[83] | 281 | { |
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| 282 | SC_START(3); |
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| 283 | |
---|
| 284 | LABEL("msync (begin)"); |
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[88] | 285 | in_NB_INST_DECOD_ALL [context]->write(1); |
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| 286 | in_NB_INST_COMMIT_ALL [context]->write(1); |
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| 287 | in_NB_INST_COMMIT_MEM [context]->write(1); |
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[83] | 288 | |
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| 289 | uint32_t port = rand()%_param->_nb_decod_unit; |
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| 290 | |
---|
| 291 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
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| 292 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
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| 293 | in_DECOD_EVENT_ADDRESS [port]->write(0x100); |
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| 294 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdeadbeef); |
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[88] | 295 | if (_param->_have_port_depth) |
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[106] | 296 | in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); |
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[83] | 297 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_MSYNC); |
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| 298 | |
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| 299 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
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| 300 | |
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[101] | 301 | in_DECOD_EVENT_VAL [port]->write(1); |
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| 302 | |
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| 303 | SC_START(0); |
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| 304 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
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| 305 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 0); |
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| 306 | |
---|
| 307 | SC_START(1); |
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| 308 | |
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[88] | 309 | in_NB_INST_DECOD_ALL [context]->write(0); |
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[101] | 310 | in_NB_INST_COMMIT_ALL [context]->write(0); |
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[88] | 311 | in_NB_INST_COMMIT_MEM [context]->write(0); |
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[101] | 312 | |
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| 313 | LABEL("msync (send decod)"); |
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| 314 | SC_START(0); |
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[83] | 315 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
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[101] | 316 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 1); |
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| 317 | |
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[83] | 318 | SC_START(1); |
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[101] | 319 | |
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| 320 | in_DECOD_EVENT_VAL [port]->write(0); |
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| 321 | in_NB_INST_COMMIT_ALL [context]->write(1); |
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[83] | 322 | |
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| 323 | LABEL("msync (wait end)"); |
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| 324 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
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| 325 | |
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| 326 | SC_START(3); |
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| 327 | |
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[101] | 328 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
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| 329 | in_NB_INST_COMMIT_ALL [context]->write(0); |
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| 330 | |
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[83] | 331 | SC_START(1); |
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| 332 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
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| 333 | } |
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| 334 | |
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[101] | 335 | if (test2) |
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[83] | 336 | { |
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| 337 | SC_START(3); |
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[101] | 338 | |
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[83] | 339 | LABEL("psync (begin)"); |
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[88] | 340 | in_NB_INST_DECOD_ALL [context]->write(1); |
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| 341 | in_NB_INST_COMMIT_ALL [context]->write(1); |
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| 342 | in_NB_INST_COMMIT_MEM [context]->write(1); |
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[83] | 343 | |
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| 344 | uint32_t port = rand()%_param->_nb_decod_unit; |
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| 345 | |
---|
| 346 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
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| 347 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
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| 348 | in_DECOD_EVENT_ADDRESS [port]->write(0x200); |
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| 349 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdeadbebe); |
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[88] | 350 | if (_param->_have_port_depth) |
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[106] | 351 | in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); |
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[83] | 352 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_PSYNC); |
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| 353 | |
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| 354 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
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| 355 | |
---|
[101] | 356 | in_DECOD_EVENT_VAL [port]->write(1); |
---|
| 357 | |
---|
| 358 | SC_START(0); |
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| 359 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
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| 360 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 0); |
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| 361 | |
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| 362 | SC_START(1); |
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| 363 | |
---|
| 364 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 365 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 366 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
| 367 | |
---|
| 368 | LABEL("psync (send decod)"); |
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| 369 | SC_START(0); |
---|
| 370 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 371 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 1); |
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| 372 | |
---|
| 373 | SC_START(1); |
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| 374 | |
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| 375 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 376 | in_NB_INST_COMMIT_ALL [context]->write(1); |
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[83] | 377 | |
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| 378 | LABEL("psync (wait end)"); |
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| 379 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 380 | |
---|
| 381 | SC_START(3); |
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| 382 | |
---|
[101] | 383 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
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[88] | 384 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
[101] | 385 | |
---|
[83] | 386 | SC_START(1); |
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| 387 | |
---|
| 388 | bool find = false; |
---|
| 389 | do |
---|
| 390 | { |
---|
| 391 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 392 | |
---|
| 393 | SC_START(0); |
---|
| 394 | |
---|
| 395 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 396 | { |
---|
| 397 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x201); |
---|
| 398 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xdeadbebe); |
---|
| 399 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 400 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 401 | |
---|
| 402 | find = true; |
---|
| 403 | } |
---|
| 404 | |
---|
| 405 | SC_START(1); |
---|
| 406 | } |
---|
| 407 | while (not find); |
---|
| 408 | |
---|
| 409 | in_EVENT_ACK [context]->write(0); |
---|
| 410 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 411 | } |
---|
| 412 | |
---|
[101] | 413 | if (test3) |
---|
[83] | 414 | { |
---|
| 415 | SC_START(3); |
---|
[101] | 416 | |
---|
[83] | 417 | LABEL("csync (begin)"); |
---|
[88] | 418 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 419 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 420 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 421 | |
---|
| 422 | uint32_t port = rand()%_param->_nb_decod_unit; |
---|
| 423 | |
---|
| 424 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
| 425 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
---|
[101] | 426 | in_DECOD_EVENT_ADDRESS [port]->write(0x300); |
---|
| 427 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdead0300); |
---|
[88] | 428 | if (_param->_have_port_depth) |
---|
[106] | 429 | in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[83] | 430 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_CSYNC); |
---|
| 431 | |
---|
| 432 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 433 | |
---|
[101] | 434 | in_DECOD_EVENT_VAL [port]->write(1); |
---|
| 435 | |
---|
| 436 | SC_START(0); |
---|
| 437 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 438 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 0); |
---|
| 439 | |
---|
| 440 | SC_START(1); |
---|
| 441 | |
---|
| 442 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 443 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 444 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
| 445 | |
---|
| 446 | LABEL("csync (send decod)"); |
---|
| 447 | SC_START(0); |
---|
| 448 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 449 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 1); |
---|
| 450 | |
---|
| 451 | SC_START(1); |
---|
| 452 | |
---|
| 453 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 454 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
[83] | 455 | |
---|
| 456 | LABEL("csync (wait end)"); |
---|
| 457 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 458 | |
---|
| 459 | SC_START(3); |
---|
| 460 | |
---|
[101] | 461 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
[88] | 462 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
[101] | 463 | |
---|
[83] | 464 | SC_START(1); |
---|
| 465 | |
---|
| 466 | bool find = false; |
---|
| 467 | do |
---|
| 468 | { |
---|
| 469 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 470 | |
---|
| 471 | SC_START(0); |
---|
| 472 | |
---|
| 473 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 474 | { |
---|
[101] | 475 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x301); |
---|
| 476 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xdead0300); |
---|
[83] | 477 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 478 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
[101] | 479 | |
---|
[83] | 480 | find = true; |
---|
| 481 | } |
---|
| 482 | |
---|
| 483 | SC_START(1); |
---|
| 484 | } |
---|
| 485 | while (not find); |
---|
[101] | 486 | |
---|
[83] | 487 | in_EVENT_ACK [context]->write(0); |
---|
[101] | 488 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 489 | |
---|
[83] | 490 | } |
---|
| 491 | |
---|
[101] | 492 | if (test4) |
---|
[83] | 493 | { |
---|
| 494 | SC_START(3); |
---|
| 495 | |
---|
[101] | 496 | LABEL("spr_access (begin)"); |
---|
[88] | 497 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 498 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 499 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 500 | |
---|
| 501 | uint32_t port = rand()%_param->_nb_decod_unit; |
---|
| 502 | |
---|
| 503 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
| 504 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
---|
[101] | 505 | in_DECOD_EVENT_ADDRESS [port]->write(0x400); |
---|
| 506 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdead0400); |
---|
[88] | 507 | if (_param->_have_port_depth) |
---|
[106] | 508 | in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[83] | 509 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_SPR_ACCESS); |
---|
| 510 | |
---|
| 511 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 512 | |
---|
[101] | 513 | in_DECOD_EVENT_VAL [port]->write(1); |
---|
| 514 | |
---|
| 515 | SC_START(0); |
---|
| 516 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 517 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 0); |
---|
| 518 | |
---|
| 519 | SC_START(1); |
---|
| 520 | |
---|
[88] | 521 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 522 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 523 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[101] | 524 | |
---|
| 525 | LABEL("spr_access (send decod)"); |
---|
| 526 | SC_START(0); |
---|
[83] | 527 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
[101] | 528 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 1); |
---|
| 529 | |
---|
[83] | 530 | SC_START(1); |
---|
[101] | 531 | |
---|
| 532 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 533 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
[83] | 534 | |
---|
[101] | 535 | LABEL("spr_access (wait end)"); |
---|
[83] | 536 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 537 | |
---|
| 538 | SC_START(3); |
---|
| 539 | |
---|
[101] | 540 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
[88] | 541 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
[101] | 542 | |
---|
[83] | 543 | SC_START(1); |
---|
| 544 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 545 | } |
---|
| 546 | |
---|
[101] | 547 | if (test5) |
---|
[83] | 548 | { |
---|
| 549 | SC_START(3); |
---|
| 550 | |
---|
| 551 | LABEL("miss (begin)"); |
---|
[88] | 552 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 553 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 554 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 555 | |
---|
[98] | 556 | // uint32_t port = rand()%_param->_nb_inst_branch_complete; |
---|
[83] | 557 | |
---|
[98] | 558 | // in_BRANCH_COMPLETE_CONTEXT_ID [port]->write(context); |
---|
| 559 | // if (_param->_have_port_depth) |
---|
[106] | 560 | // in_BRANCH_COMPLETE_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[98] | 561 | // in_BRANCH_COMPLETE_ADDRESS_SRC [port]->write(0x400); |
---|
| 562 | // in_BRANCH_COMPLETE_ADDRESS_DEST [port]->write(0x500); |
---|
| 563 | // in_BRANCH_COMPLETE_MISS_PREDICTION [port]->write(1); |
---|
| 564 | // in_BRANCH_COMPLETE_TAKE [port]->write(0); |
---|
| 565 | |
---|
| 566 | // TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 567 | |
---|
| 568 | // do |
---|
| 569 | // { |
---|
| 570 | // in_BRANCH_COMPLETE_VAL [port]->write(rand()%percent_transaction_branch_complete); |
---|
| 571 | |
---|
| 572 | // SC_START(1); |
---|
| 573 | // } |
---|
| 574 | // while (not ( in_BRANCH_COMPLETE_VAL [port]->read() and |
---|
| 575 | // out_BRANCH_COMPLETE_ACK [port]->read())); |
---|
| 576 | // in_BRANCH_COMPLETE_VAL [port]->write(0); |
---|
| 577 | |
---|
| 578 | uint32_t port = context; |
---|
| 579 | |
---|
[88] | 580 | if (_param->_have_port_depth) |
---|
[106] | 581 | in_BRANCH_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[98] | 582 | in_BRANCH_EVENT_ADDRESS_SRC [port]->write(0x400); |
---|
| 583 | in_BRANCH_EVENT_ADDRESS_DEST [port]->write(0x500); |
---|
| 584 | in_BRANCH_EVENT_ADDRESS_DEST_VAL [port]->write(0); |
---|
[83] | 585 | |
---|
| 586 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 587 | |
---|
| 588 | do |
---|
| 589 | { |
---|
[98] | 590 | in_BRANCH_EVENT_VAL [port]->write(rand()%percent_transaction_branch_event); |
---|
[83] | 591 | |
---|
| 592 | SC_START(1); |
---|
| 593 | } |
---|
[98] | 594 | while (not ( in_BRANCH_EVENT_VAL [port]->read() and |
---|
| 595 | out_BRANCH_EVENT_ACK [port]->read())); |
---|
| 596 | in_BRANCH_EVENT_VAL [port]->write(0); |
---|
[83] | 597 | |
---|
| 598 | LABEL("miss (wait end)"); |
---|
| 599 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 600 | |
---|
| 601 | SC_START(3); |
---|
| 602 | |
---|
[88] | 603 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 604 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 605 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 606 | |
---|
| 607 | SC_START(1); |
---|
| 608 | |
---|
| 609 | LABEL("miss (wait event)"); |
---|
| 610 | |
---|
| 611 | |
---|
| 612 | bool find = false; |
---|
| 613 | do |
---|
| 614 | { |
---|
| 615 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 616 | |
---|
| 617 | SC_START(0); |
---|
| 618 | |
---|
| 619 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 620 | { |
---|
| 621 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x401); |
---|
| 622 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0x500); |
---|
| 623 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 624 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 625 | |
---|
| 626 | find = true; |
---|
| 627 | } |
---|
| 628 | |
---|
| 629 | SC_START(1); |
---|
| 630 | } |
---|
| 631 | while (not find); |
---|
| 632 | |
---|
| 633 | in_EVENT_ACK [context]->write(0); |
---|
| 634 | |
---|
| 635 | } |
---|
| 636 | |
---|
[101] | 637 | if (test6) |
---|
[83] | 638 | { |
---|
| 639 | SC_START(3); |
---|
| 640 | |
---|
| 641 | LABEL("miss (begin)"); |
---|
[88] | 642 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 643 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 644 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 645 | |
---|
[98] | 646 | // uint32_t port = rand()%_param->_nb_inst_branch_complete; |
---|
[83] | 647 | |
---|
[98] | 648 | // in_BRANCH_COMPLETE_CONTEXT_ID [port]->write(context); |
---|
| 649 | // if (_param->_have_port_depth) |
---|
[106] | 650 | // in_BRANCH_COMPLETE_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[98] | 651 | // in_BRANCH_COMPLETE_ADDRESS_SRC [port]->write(0x600); |
---|
| 652 | // in_BRANCH_COMPLETE_ADDRESS_DEST [port]->write(0x700); |
---|
| 653 | // in_BRANCH_COMPLETE_MISS_PREDICTION [port]->write(1); |
---|
| 654 | // in_BRANCH_COMPLETE_TAKE [port]->write(1); |
---|
[83] | 655 | |
---|
[98] | 656 | // TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 657 | |
---|
| 658 | // do |
---|
| 659 | // { |
---|
| 660 | // in_BRANCH_COMPLETE_VAL [port]->write(rand()%percent_transaction_branch_complete); |
---|
| 661 | |
---|
| 662 | // SC_START(1); |
---|
| 663 | // } |
---|
| 664 | // while (not ( in_BRANCH_COMPLETE_VAL [port]->read() and |
---|
| 665 | // out_BRANCH_COMPLETE_ACK [port]->read())); |
---|
| 666 | // in_BRANCH_COMPLETE_VAL [port]->write(0); |
---|
| 667 | |
---|
| 668 | uint32_t port = context; |
---|
| 669 | |
---|
[106] | 670 | in_BRANCH_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[98] | 671 | in_BRANCH_EVENT_ADDRESS_SRC [port]->write(0x600); |
---|
| 672 | in_BRANCH_EVENT_ADDRESS_DEST [port]->write(0x700); |
---|
| 673 | in_BRANCH_EVENT_ADDRESS_DEST_VAL [port]->write(1); |
---|
| 674 | |
---|
[83] | 675 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 676 | |
---|
| 677 | do |
---|
| 678 | { |
---|
[98] | 679 | in_BRANCH_EVENT_VAL [port]->write(rand()%percent_transaction_branch_event); |
---|
[83] | 680 | |
---|
| 681 | SC_START(1); |
---|
| 682 | } |
---|
[98] | 683 | while (not ( in_BRANCH_EVENT_VAL [port]->read() and |
---|
| 684 | out_BRANCH_EVENT_ACK [port]->read())); |
---|
| 685 | in_BRANCH_EVENT_VAL [port]->write(0); |
---|
[83] | 686 | |
---|
| 687 | LABEL("miss (wait end)"); |
---|
| 688 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 689 | |
---|
| 690 | SC_START(3); |
---|
| 691 | |
---|
[88] | 692 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 693 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 694 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 695 | |
---|
| 696 | SC_START(1); |
---|
| 697 | |
---|
| 698 | LABEL("miss (wait event)"); |
---|
| 699 | |
---|
| 700 | bool find = false; |
---|
| 701 | do |
---|
| 702 | { |
---|
| 703 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 704 | |
---|
| 705 | SC_START(0); |
---|
| 706 | |
---|
| 707 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 708 | { |
---|
| 709 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x601); |
---|
| 710 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0x700); |
---|
| 711 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),1); |
---|
| 712 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),1); |
---|
| 713 | |
---|
| 714 | find = true; |
---|
| 715 | } |
---|
| 716 | |
---|
| 717 | SC_START(1); |
---|
| 718 | } |
---|
| 719 | while (not find); |
---|
| 720 | |
---|
| 721 | in_EVENT_ACK [context]->write(0); |
---|
| 722 | } |
---|
| 723 | |
---|
[101] | 724 | if (test7) |
---|
[83] | 725 | { |
---|
| 726 | SC_START(3); |
---|
| 727 | |
---|
| 728 | LABEL("exception (begin)"); |
---|
[88] | 729 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 730 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 731 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 732 | |
---|
[88] | 733 | uint32_t port = rand()%_param->_nb_decod_unit; |
---|
[83] | 734 | |
---|
| 735 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
[88] | 736 | if (_param->_have_port_depth) |
---|
[106] | 737 | in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[83] | 738 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_EXCEPTION); |
---|
| 739 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
---|
| 740 | in_DECOD_EVENT_ADDRESS [port]->write(0x800); |
---|
| 741 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0x900); |
---|
| 742 | |
---|
| 743 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 744 | |
---|
| 745 | do |
---|
| 746 | { |
---|
| 747 | in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event); |
---|
| 748 | |
---|
| 749 | SC_START(1); |
---|
| 750 | } |
---|
| 751 | while (not ( in_DECOD_EVENT_VAL [port]->read() and |
---|
| 752 | out_DECOD_EVENT_ACK [port]->read())); |
---|
| 753 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 754 | |
---|
| 755 | LABEL("exception (wait end)"); |
---|
| 756 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 757 | |
---|
| 758 | SC_START(3); |
---|
| 759 | |
---|
[88] | 760 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 761 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 762 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 763 | |
---|
| 764 | SC_START(1); |
---|
| 765 | |
---|
| 766 | LABEL("exception (wait event)"); |
---|
| 767 | |
---|
| 768 | bool find = false; |
---|
| 769 | do |
---|
| 770 | { |
---|
| 771 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 772 | |
---|
| 773 | SC_START(0); |
---|
| 774 | |
---|
| 775 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 776 | { |
---|
| 777 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x800); |
---|
| 778 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0x900); |
---|
| 779 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 780 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 781 | |
---|
| 782 | find = true; |
---|
| 783 | } |
---|
| 784 | |
---|
| 785 | SC_START(1); |
---|
| 786 | } |
---|
| 787 | while (not find); |
---|
| 788 | |
---|
| 789 | in_EVENT_ACK [context]->write(0); |
---|
| 790 | |
---|
| 791 | LABEL("exception (wait spr)"); |
---|
| 792 | |
---|
| 793 | find = false; |
---|
| 794 | do |
---|
| 795 | { |
---|
[88] | 796 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 797 | |
---|
| 798 | SC_START(0); |
---|
| 799 | |
---|
[88] | 800 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 801 | { |
---|
[88] | 802 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0x900); |
---|
| 803 | //TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),); |
---|
| 804 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),0); |
---|
| 805 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),0); |
---|
| 806 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 807 | |
---|
| 808 | find = true; |
---|
| 809 | } |
---|
| 810 | |
---|
| 811 | SC_START(1); |
---|
| 812 | } |
---|
| 813 | while (not find); |
---|
| 814 | |
---|
[88] | 815 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 816 | } |
---|
| 817 | |
---|
[101] | 818 | if (test8) |
---|
[83] | 819 | { |
---|
| 820 | SC_START(3); |
---|
| 821 | |
---|
| 822 | LABEL("exception (begin)"); |
---|
[88] | 823 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 824 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 825 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 826 | |
---|
[88] | 827 | uint32_t port = rand()%_param->_nb_decod_unit; |
---|
[83] | 828 | |
---|
| 829 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
[88] | 830 | if (_param->_have_port_depth) |
---|
[106] | 831 | in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[83] | 832 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_EXCEPTION); |
---|
| 833 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(1); |
---|
| 834 | in_DECOD_EVENT_ADDRESS [port]->write(0x800); |
---|
| 835 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0x900); |
---|
| 836 | |
---|
| 837 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 838 | |
---|
| 839 | do |
---|
| 840 | { |
---|
| 841 | in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event); |
---|
| 842 | |
---|
| 843 | SC_START(1); |
---|
| 844 | } |
---|
| 845 | while (not ( in_DECOD_EVENT_VAL [port]->read() and |
---|
| 846 | out_DECOD_EVENT_ACK [port]->read())); |
---|
| 847 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 848 | |
---|
| 849 | LABEL("exception (wait end)"); |
---|
| 850 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 851 | |
---|
| 852 | SC_START(3); |
---|
| 853 | |
---|
[88] | 854 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 855 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 856 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 857 | |
---|
| 858 | SC_START(1); |
---|
| 859 | |
---|
| 860 | LABEL("exception (wait event)"); |
---|
| 861 | |
---|
| 862 | bool find = false; |
---|
| 863 | do |
---|
| 864 | { |
---|
| 865 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 866 | |
---|
| 867 | SC_START(0); |
---|
| 868 | |
---|
| 869 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 870 | { |
---|
| 871 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x800); |
---|
| 872 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0x900); |
---|
| 873 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 874 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 875 | |
---|
| 876 | find = true; |
---|
| 877 | } |
---|
| 878 | |
---|
| 879 | SC_START(1); |
---|
| 880 | } |
---|
| 881 | while (not find); |
---|
| 882 | |
---|
| 883 | in_EVENT_ACK [context]->write(0); |
---|
| 884 | |
---|
| 885 | LABEL("exception (wait spr)"); |
---|
| 886 | |
---|
| 887 | find = false; |
---|
| 888 | do |
---|
| 889 | { |
---|
[88] | 890 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 891 | |
---|
| 892 | SC_START(0); |
---|
| 893 | |
---|
[88] | 894 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 895 | { |
---|
[88] | 896 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0x900); |
---|
| 897 | //TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),); |
---|
| 898 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),0); |
---|
| 899 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),1); |
---|
| 900 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 901 | |
---|
| 902 | find = true; |
---|
| 903 | } |
---|
| 904 | |
---|
| 905 | SC_START(1); |
---|
| 906 | } |
---|
| 907 | while (not find); |
---|
| 908 | |
---|
[88] | 909 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 910 | } |
---|
| 911 | |
---|
[101] | 912 | if (test9) |
---|
[83] | 913 | { |
---|
| 914 | SC_START(3); |
---|
| 915 | |
---|
| 916 | LABEL("exception (begin)"); |
---|
[88] | 917 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 918 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 919 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 920 | |
---|
[88] | 921 | in_COMMIT_EVENT_CONTEXT_ID ->write(context); |
---|
| 922 | if (_param->_have_port_depth) |
---|
[106] | 923 | in_COMMIT_EVENT_DEPTH ->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[88] | 924 | in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); |
---|
| 925 | in_COMMIT_EVENT_IS_DELAY_SLOT ->write(0); |
---|
| 926 | in_COMMIT_EVENT_ADDRESS ->write(0xa00); |
---|
| 927 | in_COMMIT_EVENT_ADDRESS_EPCR ->write(0xb00); |
---|
[105] | 928 | in_COMMIT_EVENT_ADDRESS_EPCR_VAL ->write(0); |
---|
[88] | 929 | in_COMMIT_EVENT_ADDRESS_EEAR ->write(0xc00); |
---|
| 930 | in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(0); |
---|
[83] | 931 | |
---|
| 932 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 933 | |
---|
| 934 | do |
---|
| 935 | { |
---|
[88] | 936 | in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event); |
---|
[83] | 937 | |
---|
| 938 | SC_START(1); |
---|
| 939 | } |
---|
[88] | 940 | while (not ( in_COMMIT_EVENT_VAL ->read() and |
---|
| 941 | out_COMMIT_EVENT_ACK ->read())); |
---|
| 942 | in_COMMIT_EVENT_VAL ->write(0); |
---|
[83] | 943 | |
---|
| 944 | LABEL("exception (wait end)"); |
---|
| 945 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 946 | |
---|
| 947 | SC_START(3); |
---|
| 948 | |
---|
[88] | 949 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 950 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 951 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 952 | |
---|
| 953 | SC_START(1); |
---|
| 954 | |
---|
| 955 | LABEL("exception (wait event)"); |
---|
| 956 | |
---|
| 957 | bool find = false; |
---|
| 958 | do |
---|
| 959 | { |
---|
| 960 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 961 | |
---|
| 962 | SC_START(0); |
---|
| 963 | |
---|
| 964 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 965 | { |
---|
| 966 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0xa00); |
---|
| 967 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xb00); |
---|
| 968 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 969 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 970 | |
---|
| 971 | find = true; |
---|
| 972 | } |
---|
| 973 | |
---|
| 974 | SC_START(1); |
---|
| 975 | } |
---|
| 976 | while (not find); |
---|
| 977 | |
---|
| 978 | in_EVENT_ACK [context]->write(0); |
---|
| 979 | |
---|
| 980 | LABEL("exception (wait spr)"); |
---|
| 981 | |
---|
| 982 | find = false; |
---|
| 983 | do |
---|
| 984 | { |
---|
[88] | 985 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 986 | |
---|
| 987 | SC_START(0); |
---|
| 988 | |
---|
[88] | 989 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 990 | { |
---|
[88] | 991 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0xb00); |
---|
| 992 | TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),0xc00); |
---|
| 993 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),0); |
---|
| 994 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),0); |
---|
| 995 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 996 | |
---|
| 997 | find = true; |
---|
| 998 | } |
---|
| 999 | |
---|
| 1000 | SC_START(1); |
---|
| 1001 | } |
---|
| 1002 | while (not find); |
---|
| 1003 | |
---|
[88] | 1004 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 1005 | } |
---|
| 1006 | |
---|
[101] | 1007 | if (test10) |
---|
[83] | 1008 | { |
---|
| 1009 | SC_START(3); |
---|
| 1010 | |
---|
| 1011 | LABEL("exception (begin)"); |
---|
[88] | 1012 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 1013 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 1014 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 1015 | |
---|
[88] | 1016 | in_COMMIT_EVENT_CONTEXT_ID ->write(context); |
---|
| 1017 | if (_param->_have_port_depth) |
---|
[106] | 1018 | in_COMMIT_EVENT_DEPTH ->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[88] | 1019 | in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); |
---|
| 1020 | in_COMMIT_EVENT_IS_DELAY_SLOT ->write(1); |
---|
| 1021 | in_COMMIT_EVENT_ADDRESS ->write(0xd00); |
---|
| 1022 | in_COMMIT_EVENT_ADDRESS_EPCR ->write(0xe00); |
---|
[105] | 1023 | in_COMMIT_EVENT_ADDRESS_EPCR_VAL ->write(0); |
---|
[88] | 1024 | in_COMMIT_EVENT_ADDRESS_EEAR ->write(0xf00); |
---|
| 1025 | in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(0); |
---|
[83] | 1026 | |
---|
| 1027 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 1028 | |
---|
| 1029 | do |
---|
| 1030 | { |
---|
[88] | 1031 | in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event); |
---|
[83] | 1032 | |
---|
| 1033 | SC_START(1); |
---|
| 1034 | } |
---|
[88] | 1035 | while (not ( in_COMMIT_EVENT_VAL ->read() and |
---|
| 1036 | out_COMMIT_EVENT_ACK ->read())); |
---|
| 1037 | in_COMMIT_EVENT_VAL ->write(0); |
---|
[83] | 1038 | |
---|
| 1039 | LABEL("exception (wait end)"); |
---|
| 1040 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 1041 | |
---|
| 1042 | SC_START(3); |
---|
| 1043 | |
---|
[88] | 1044 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 1045 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 1046 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 1047 | |
---|
| 1048 | SC_START(1); |
---|
| 1049 | |
---|
| 1050 | LABEL("exception (wait event)"); |
---|
| 1051 | |
---|
| 1052 | bool find = false; |
---|
| 1053 | do |
---|
| 1054 | { |
---|
| 1055 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 1056 | |
---|
| 1057 | SC_START(0); |
---|
| 1058 | |
---|
| 1059 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 1060 | { |
---|
| 1061 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0xd00); |
---|
| 1062 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xe00); |
---|
| 1063 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 1064 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 1065 | |
---|
| 1066 | find = true; |
---|
| 1067 | } |
---|
| 1068 | |
---|
| 1069 | SC_START(1); |
---|
| 1070 | } |
---|
| 1071 | while (not find); |
---|
| 1072 | |
---|
| 1073 | in_EVENT_ACK [context]->write(0); |
---|
| 1074 | |
---|
| 1075 | LABEL("exception (wait spr)"); |
---|
| 1076 | |
---|
| 1077 | find = false; |
---|
| 1078 | do |
---|
| 1079 | { |
---|
[88] | 1080 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 1081 | |
---|
| 1082 | SC_START(0); |
---|
| 1083 | |
---|
[88] | 1084 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 1085 | { |
---|
[88] | 1086 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0xe00); |
---|
| 1087 | TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),0xf00); |
---|
| 1088 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),0); |
---|
| 1089 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),1); |
---|
| 1090 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 1091 | |
---|
| 1092 | find = true; |
---|
| 1093 | } |
---|
| 1094 | |
---|
| 1095 | SC_START(1); |
---|
| 1096 | } |
---|
| 1097 | while (not find); |
---|
| 1098 | |
---|
[88] | 1099 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 1100 | } |
---|
| 1101 | |
---|
[101] | 1102 | if (test11) |
---|
[83] | 1103 | { |
---|
| 1104 | SC_START(3); |
---|
| 1105 | |
---|
| 1106 | LABEL("exception (begin)"); |
---|
[88] | 1107 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 1108 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 1109 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 1110 | |
---|
[88] | 1111 | in_COMMIT_EVENT_CONTEXT_ID ->write(context); |
---|
| 1112 | if (_param->_have_port_depth) |
---|
[106] | 1113 | in_COMMIT_EVENT_DEPTH ->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[88] | 1114 | in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); |
---|
| 1115 | in_COMMIT_EVENT_IS_DELAY_SLOT ->write(0); |
---|
| 1116 | in_COMMIT_EVENT_ADDRESS ->write(0xa00); |
---|
| 1117 | in_COMMIT_EVENT_ADDRESS_EPCR ->write(0xb00); |
---|
[105] | 1118 | in_COMMIT_EVENT_ADDRESS_EPCR_VAL ->write(1); |
---|
[88] | 1119 | in_COMMIT_EVENT_ADDRESS_EEAR ->write(0xc00); |
---|
| 1120 | in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(1); |
---|
[83] | 1121 | |
---|
| 1122 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 1123 | |
---|
| 1124 | do |
---|
| 1125 | { |
---|
[88] | 1126 | in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event); |
---|
[83] | 1127 | |
---|
| 1128 | SC_START(1); |
---|
| 1129 | } |
---|
[88] | 1130 | while (not ( in_COMMIT_EVENT_VAL ->read() and |
---|
| 1131 | out_COMMIT_EVENT_ACK ->read())); |
---|
| 1132 | in_COMMIT_EVENT_VAL ->write(0); |
---|
[83] | 1133 | |
---|
| 1134 | LABEL("exception (wait end)"); |
---|
| 1135 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 1136 | |
---|
| 1137 | SC_START(3); |
---|
| 1138 | |
---|
[88] | 1139 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 1140 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 1141 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 1142 | |
---|
| 1143 | SC_START(1); |
---|
| 1144 | |
---|
| 1145 | LABEL("exception (wait event)"); |
---|
| 1146 | |
---|
| 1147 | bool find = false; |
---|
| 1148 | do |
---|
| 1149 | { |
---|
| 1150 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 1151 | |
---|
| 1152 | SC_START(0); |
---|
| 1153 | |
---|
| 1154 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 1155 | { |
---|
| 1156 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0xa00); |
---|
| 1157 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xb00); |
---|
| 1158 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 1159 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 1160 | |
---|
| 1161 | find = true; |
---|
| 1162 | } |
---|
| 1163 | |
---|
| 1164 | SC_START(1); |
---|
| 1165 | } |
---|
| 1166 | while (not find); |
---|
| 1167 | |
---|
| 1168 | in_EVENT_ACK [context]->write(0); |
---|
| 1169 | |
---|
| 1170 | LABEL("exception (wait spr)"); |
---|
| 1171 | |
---|
| 1172 | find = false; |
---|
| 1173 | do |
---|
| 1174 | { |
---|
[88] | 1175 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 1176 | |
---|
| 1177 | SC_START(0); |
---|
| 1178 | |
---|
[88] | 1179 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 1180 | { |
---|
[88] | 1181 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0xb00); |
---|
| 1182 | TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),0xc00); |
---|
| 1183 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),1); |
---|
| 1184 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),0); |
---|
| 1185 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 1186 | |
---|
| 1187 | find = true; |
---|
| 1188 | } |
---|
| 1189 | |
---|
| 1190 | SC_START(1); |
---|
| 1191 | } |
---|
| 1192 | while (not find); |
---|
| 1193 | |
---|
[88] | 1194 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 1195 | } |
---|
| 1196 | |
---|
[101] | 1197 | if (test12) |
---|
[83] | 1198 | { |
---|
| 1199 | SC_START(3); |
---|
| 1200 | |
---|
| 1201 | LABEL("exception (begin)"); |
---|
[88] | 1202 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 1203 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 1204 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 1205 | |
---|
[88] | 1206 | in_COMMIT_EVENT_CONTEXT_ID ->write(context); |
---|
| 1207 | if (_param->_have_port_depth) |
---|
[106] | 1208 | in_COMMIT_EVENT_DEPTH ->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); |
---|
[88] | 1209 | in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); |
---|
| 1210 | in_COMMIT_EVENT_IS_DELAY_SLOT ->write(1); |
---|
| 1211 | in_COMMIT_EVENT_ADDRESS ->write(0xd00); |
---|
| 1212 | in_COMMIT_EVENT_ADDRESS_EPCR ->write(0xe00); |
---|
[105] | 1213 | in_COMMIT_EVENT_ADDRESS_EPCR_VAL ->write(1); |
---|
[88] | 1214 | in_COMMIT_EVENT_ADDRESS_EEAR ->write(0xf00); |
---|
| 1215 | in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(1); |
---|
[83] | 1216 | |
---|
| 1217 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 1218 | |
---|
| 1219 | do |
---|
| 1220 | { |
---|
[88] | 1221 | in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event); |
---|
[83] | 1222 | |
---|
| 1223 | SC_START(1); |
---|
| 1224 | } |
---|
[88] | 1225 | while (not ( in_COMMIT_EVENT_VAL ->read() and |
---|
| 1226 | out_COMMIT_EVENT_ACK ->read())); |
---|
| 1227 | in_COMMIT_EVENT_VAL ->write(0); |
---|
[83] | 1228 | |
---|
| 1229 | LABEL("exception (wait end)"); |
---|
| 1230 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 1231 | |
---|
| 1232 | SC_START(3); |
---|
| 1233 | |
---|
[88] | 1234 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 1235 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 1236 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 1237 | |
---|
| 1238 | SC_START(1); |
---|
| 1239 | |
---|
| 1240 | LABEL("exception (wait event)"); |
---|
| 1241 | |
---|
| 1242 | bool find = false; |
---|
| 1243 | do |
---|
| 1244 | { |
---|
| 1245 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 1246 | |
---|
| 1247 | SC_START(0); |
---|
| 1248 | |
---|
| 1249 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 1250 | { |
---|
| 1251 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0xd00); |
---|
| 1252 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xe00); |
---|
| 1253 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 1254 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 1255 | |
---|
| 1256 | find = true; |
---|
| 1257 | } |
---|
| 1258 | |
---|
| 1259 | SC_START(1); |
---|
| 1260 | } |
---|
| 1261 | while (not find); |
---|
| 1262 | |
---|
| 1263 | in_EVENT_ACK [context]->write(0); |
---|
| 1264 | |
---|
| 1265 | LABEL("exception (wait spr)"); |
---|
| 1266 | |
---|
| 1267 | find = false; |
---|
| 1268 | do |
---|
| 1269 | { |
---|
[88] | 1270 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 1271 | |
---|
| 1272 | SC_START(0); |
---|
| 1273 | |
---|
[88] | 1274 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 1275 | { |
---|
[88] | 1276 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0xe00); |
---|
| 1277 | TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),0xf00); |
---|
| 1278 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),1); |
---|
| 1279 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),1); |
---|
| 1280 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 1281 | |
---|
| 1282 | find = true; |
---|
| 1283 | } |
---|
| 1284 | |
---|
| 1285 | SC_START(1); |
---|
| 1286 | } |
---|
| 1287 | while (not find); |
---|
| 1288 | |
---|
[88] | 1289 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 1290 | } |
---|
| 1291 | |
---|
| 1292 | |
---|
| 1293 | SC_START(1); |
---|
| 1294 | } |
---|
| 1295 | |
---|
| 1296 | |
---|
| 1297 | /******************************************************** |
---|
| 1298 | * Simulation - End |
---|
| 1299 | ********************************************************/ |
---|
| 1300 | |
---|
| 1301 | TEST_OK ("End of Simulation"); |
---|
| 1302 | delete _time; |
---|
| 1303 | |
---|
| 1304 | msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); |
---|
| 1305 | |
---|
| 1306 | delete in_CLOCK; |
---|
| 1307 | delete in_NRESET; |
---|
| 1308 | |
---|
[88] | 1309 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_VAL ,_param->_nb_context); |
---|
| 1310 | DELETE1_SC_SIGNAL(out_BRANCH_EVENT_ACK ,_param->_nb_context); |
---|
| 1311 | //DELETE1_SC_SIGNAL( in_BRANCH_EVENT_CONTEXT_ID ,_param->_nb_context); |
---|
[98] | 1312 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_DEPTH ,_param->_nb_context); |
---|
[88] | 1313 | //DELETE1_SC_SIGNAL( in_BRANCH_EVENT_MISS_PREDICTION ,_param->_nb_context); |
---|
| 1314 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_SRC ,_param->_nb_context); |
---|
[95] | 1315 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context); |
---|
[88] | 1316 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context); |
---|
[83] | 1317 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_VAL ,_param->_nb_decod_unit); |
---|
| 1318 | DELETE1_SC_SIGNAL(out_DECOD_EVENT_ACK ,_param->_nb_decod_unit); |
---|
| 1319 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_CONTEXT_ID ,_param->_nb_decod_unit); |
---|
| 1320 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_DEPTH ,_param->_nb_decod_unit); |
---|
| 1321 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_TYPE ,_param->_nb_decod_unit); |
---|
| 1322 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_IS_DELAY_SLOT ,_param->_nb_decod_unit); |
---|
| 1323 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS ,_param->_nb_decod_unit); |
---|
| 1324 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS_EPCR ,_param->_nb_decod_unit); |
---|
[112] | 1325 | DELETE0_SC_SIGNAL( in_COMMIT_EVENT_VAL ); |
---|
| 1326 | DELETE0_SC_SIGNAL(out_COMMIT_EVENT_ACK ); |
---|
| 1327 | DELETE0_SC_SIGNAL( in_COMMIT_EVENT_CONTEXT_ID ); |
---|
| 1328 | DELETE0_SC_SIGNAL( in_COMMIT_EVENT_DEPTH ); |
---|
| 1329 | DELETE0_SC_SIGNAL( in_COMMIT_EVENT_TYPE ); |
---|
| 1330 | DELETE0_SC_SIGNAL( in_COMMIT_EVENT_IS_DELAY_SLOT ); |
---|
| 1331 | DELETE0_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS ); |
---|
| 1332 | DELETE0_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EPCR_VAL ); |
---|
| 1333 | DELETE0_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EPCR ); |
---|
| 1334 | DELETE0_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EEAR_VAL ); |
---|
| 1335 | DELETE0_SC_SIGNAL( in_COMMIT_EVENT_ADDRESS_EEAR ); |
---|
[83] | 1336 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL ,_param->_nb_inst_branch_complete); |
---|
| 1337 | DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ACK ,_param->_nb_inst_branch_complete); |
---|
| 1338 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_CONTEXT_ID ,_param->_nb_inst_branch_complete); |
---|
| 1339 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete); |
---|
| 1340 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete); |
---|
[111] | 1341 | //DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); |
---|
| 1342 | //DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); |
---|
| 1343 | //DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); |
---|
[88] | 1344 | DELETE1_SC_SIGNAL( in_NB_INST_DECOD_ALL ,_param->_nb_context ); |
---|
| 1345 | DELETE1_SC_SIGNAL( in_NB_INST_COMMIT_ALL ,_param->_nb_context ); |
---|
| 1346 | DELETE1_SC_SIGNAL( in_NB_INST_COMMIT_MEM ,_param->_nb_context ); |
---|
[83] | 1347 | DELETE1_SC_SIGNAL(out_EVENT_VAL ,_param->_nb_context ); |
---|
| 1348 | DELETE1_SC_SIGNAL( in_EVENT_ACK ,_param->_nb_context ); |
---|
| 1349 | DELETE1_SC_SIGNAL(out_EVENT_ADDRESS ,_param->_nb_context ); |
---|
| 1350 | DELETE1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT ,_param->_nb_context ); |
---|
| 1351 | DELETE1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT_VAL ,_param->_nb_context ); |
---|
| 1352 | DELETE1_SC_SIGNAL(out_EVENT_IS_DS_TAKE ,_param->_nb_context ); |
---|
[97] | 1353 | DELETE1_SC_SIGNAL(out_EVENT_TYPE ,_param->_nb_context ); |
---|
| 1354 | DELETE1_SC_SIGNAL(out_EVENT_DEPTH ,_param->_nb_context ); |
---|
[88] | 1355 | DELETE1_SC_SIGNAL(out_SPR_EVENT_VAL ,_param->_nb_context ); |
---|
| 1356 | DELETE1_SC_SIGNAL( in_SPR_EVENT_ACK ,_param->_nb_context ); |
---|
| 1357 | DELETE1_SC_SIGNAL(out_SPR_EVENT_EPCR ,_param->_nb_context ); |
---|
| 1358 | DELETE1_SC_SIGNAL(out_SPR_EVENT_EEAR ,_param->_nb_context ); |
---|
| 1359 | DELETE1_SC_SIGNAL(out_SPR_EVENT_EEAR_WEN ,_param->_nb_context ); |
---|
| 1360 | DELETE1_SC_SIGNAL(out_SPR_EVENT_SR_DSX ,_param->_nb_context ); |
---|
| 1361 | DELETE1_SC_SIGNAL(out_SPR_EVENT_SR_TO_ESR ,_param->_nb_context ); |
---|
[83] | 1362 | DELETE1_SC_SIGNAL(out_CONTEXT_DECOD_ENABLE ,_param->_nb_context ); |
---|
[88] | 1363 | DELETE1_SC_SIGNAL( in_DEPTH_MIN ,_param->_nb_context ); |
---|
| 1364 | DELETE1_SC_SIGNAL( in_SPR_SR_IEE ,_param->_nb_context ); |
---|
| 1365 | DELETE1_SC_SIGNAL( in_SPR_SR_EPH ,_param->_nb_context ); |
---|
| 1366 | |
---|
| 1367 | DELETE1_SC_SIGNAL( in_INTERRUPT_ENABLE ,_param->_nb_context ); |
---|
[83] | 1368 | } |
---|
| 1369 | #endif |
---|
| 1370 | |
---|
| 1371 | delete _Context_State; |
---|
| 1372 | #ifdef STATISTICS |
---|
| 1373 | delete _parameters_statistics; |
---|
| 1374 | #endif |
---|
| 1375 | } |
---|