1 | /* |
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2 | * $Id: Context_State_allocation.cpp 95 2008-12-16 16:24:26Z rosiere $ |
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3 | * |
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4 | * [ Description ] |
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5 | * |
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6 | */ |
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7 | |
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8 | #include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h" |
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9 | #include "Behavioural/include/Allocation.h" |
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10 | #include "Common/include/Max.h" |
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11 | |
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12 | namespace morpheo { |
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13 | namespace behavioural { |
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14 | namespace core { |
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15 | namespace multi_front_end { |
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16 | namespace front_end { |
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17 | namespace context_state { |
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18 | |
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19 | |
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20 | |
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21 | #undef FUNCTION |
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22 | #define FUNCTION "Context_State::allocation" |
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23 | void Context_State::allocation ( |
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24 | #ifdef STATISTICS |
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25 | morpheo::behavioural::Parameters_Statistics * param_statistics |
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26 | #else |
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27 | void |
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28 | #endif |
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29 | ) |
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30 | { |
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31 | log_begin(Context_State,FUNCTION); |
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32 | |
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33 | _component = new Component (_usage); |
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34 | |
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35 | Entity * entity = _component->set_entity (_name |
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36 | ,"Context_State" |
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37 | #ifdef POSITION |
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38 | ,COMBINATORY |
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39 | #endif |
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40 | ); |
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41 | |
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42 | _interfaces = entity->set_interfaces(); |
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43 | |
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44 | // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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45 | { |
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46 | Interface * interface = _interfaces->set_interface("" |
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47 | #ifdef POSITION |
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48 | ,IN |
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49 | ,SOUTH, |
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50 | _("Generalist interface") |
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51 | #endif |
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52 | ); |
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53 | |
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54 | in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); |
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55 | in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES); |
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56 | } |
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57 | |
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58 | // ~~~~~[ Interface : "branch_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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59 | { |
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60 | ALLOC1_INTERFACE("branch_event", IN,SOUTH, "branch_event", _param->_nb_context); |
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61 | |
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62 | ALLOC1_VALACK_IN ( in_BRANCH_EVENT_VAL ,VAL); |
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63 | ALLOC1_VALACK_OUT(out_BRANCH_EVENT_ACK ,ACK); |
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64 | // ALLOC1_SIGNAL_IN ( in_BRANCH_EVENT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); |
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65 | // ALLOC1_SIGNAL_IN ( in_BRANCH_EVENT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth); |
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66 | // ALLOC1_SIGNAL_IN ( in_BRANCH_EVENT_MISS_PREDICTION ,"miss_prediction" ,Tcontrol_t ,1); |
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67 | ALLOC1_SIGNAL_IN ( in_BRANCH_EVENT_ADDRESS_SRC ,"address_src" ,Taddress_t ,_param->_size_instruction_address); |
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68 | ALLOC1_SIGNAL_IN ( in_BRANCH_EVENT_ADDRESS_DEST_VAL ,"address_dest_val" ,Tcontrol_t ,1); |
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69 | ALLOC1_SIGNAL_IN ( in_BRANCH_EVENT_ADDRESS_DEST ,"address_dest" ,Taddress_t ,_param->_size_instruction_address); |
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70 | } |
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71 | |
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72 | // ~~~~~[ Interface : "decod_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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73 | { |
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74 | ALLOC1_INTERFACE("decod_event",IN ,SOUTH, _("Decod Interface"), _param->_nb_decod_unit); |
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75 | |
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76 | ALLOC1_VALACK_IN ( in_DECOD_EVENT_VAL ,VAL); |
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77 | ALLOC1_VALACK_OUT(out_DECOD_EVENT_ACK ,ACK); |
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78 | ALLOC1_SIGNAL_IN ( in_DECOD_EVENT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); |
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79 | ALLOC1_SIGNAL_IN ( in_DECOD_EVENT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth); |
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80 | ALLOC1_SIGNAL_IN ( in_DECOD_EVENT_TYPE ,"type" ,Tevent_type_t ,_param->_size_event_type); |
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81 | ALLOC1_SIGNAL_IN ( in_DECOD_EVENT_IS_DELAY_SLOT ,"is_delay_slot" ,Tcontrol_t ,1); |
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82 | ALLOC1_SIGNAL_IN ( in_DECOD_EVENT_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address); |
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83 | ALLOC1_SIGNAL_IN ( in_DECOD_EVENT_ADDRESS_EPCR ,"address_epcr" ,Taddress_t ,_param->_size_instruction_address); |
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84 | } |
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85 | |
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86 | // ~~~~~[ Interface : "commit_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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87 | { |
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88 | ALLOC_INTERFACE("commit_event",IN ,EAST, _("Interface with the Re Order Buffer")); |
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89 | |
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90 | ALLOC_VALACK_IN ( in_COMMIT_EVENT_VAL ,VAL); |
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91 | ALLOC_VALACK_OUT (out_COMMIT_EVENT_ACK ,ACK); |
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92 | ALLOC_SIGNAL_IN ( in_COMMIT_EVENT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); |
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93 | ALLOC_SIGNAL_IN ( in_COMMIT_EVENT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth); |
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94 | ALLOC_SIGNAL_IN ( in_COMMIT_EVENT_TYPE ,"type" ,Tevent_type_t ,_param->_size_event_type); |
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95 | ALLOC_SIGNAL_IN ( in_COMMIT_EVENT_IS_DELAY_SLOT ,"is_delay_slot" ,Tcontrol_t ,1); |
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96 | ALLOC_SIGNAL_IN ( in_COMMIT_EVENT_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address); |
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97 | ALLOC_SIGNAL_IN ( in_COMMIT_EVENT_ADDRESS_EPCR ,"address_epcr" ,Taddress_t ,_param->_size_instruction_address); |
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98 | ALLOC_SIGNAL_IN ( in_COMMIT_EVENT_ADDRESS_EEAR_VAL ,"address_eear_val",Tcontrol_t ,1); |
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99 | ALLOC_SIGNAL_IN ( in_COMMIT_EVENT_ADDRESS_EEAR ,"address_eear" ,Taddress_t ,_param->_size_instruction_address); |
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100 | } |
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101 | |
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102 | // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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103 | { |
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104 | ALLOC1_INTERFACE("branch_complete",IN ,NORTH, _("Interface with the prediction_unit."), _param->_nb_inst_branch_complete); |
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105 | |
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106 | ALLOC1_VALACK_IN ( in_BRANCH_COMPLETE_VAL ,VAL); |
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107 | ALLOC1_VALACK_OUT(out_BRANCH_COMPLETE_ACK ,ACK); |
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108 | ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); |
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109 | ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth); |
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110 | ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_MISS_PREDICTION ,"miss_prediction",Tcontrol_t ,1); |
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111 | ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_TAKE ,"take" ,Tcontrol_t ,1); |
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112 | ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_ADDRESS_SRC ,"address_src" ,Taddress_t ,_param->_size_instruction_address); |
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113 | ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_ADDRESS_DEST ,"address_dest" ,Taddress_t ,_param->_size_instruction_address); |
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114 | } |
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115 | |
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116 | // ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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117 | { |
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118 | ALLOC1_INTERFACE("nb_inst",IN ,EAST, _("Interface to count in fligt present instruction."),_param->_nb_context); |
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119 | |
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120 | ALLOC1_SIGNAL_IN ( in_NB_INST_DECOD_ALL ,"decod_all" ,Tcounter_t ,_param->_size_nb_inst_decod); |
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121 | ALLOC1_SIGNAL_IN ( in_NB_INST_COMMIT_ALL ,"commit_all",Tcounter_t ,_param->_size_nb_inst_commit); |
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122 | ALLOC1_SIGNAL_IN ( in_NB_INST_COMMIT_MEM ,"commit_mem",Tcounter_t ,_param->_size_nb_inst_commit); |
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123 | } |
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124 | |
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125 | // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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126 | { |
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127 | ALLOC1_INTERFACE("event",OUT,WEST, _("An event occure : change PC address."), _param->_nb_context); |
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128 | |
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129 | ALLOC1_VALACK_OUT(out_EVENT_VAL ,VAL); |
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130 | ALLOC1_VALACK_IN ( in_EVENT_ACK ,ACK); |
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131 | ALLOC1_SIGNAL_OUT(out_EVENT_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address); |
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132 | ALLOC1_SIGNAL_OUT(out_EVENT_ADDRESS_NEXT ,"address_next" ,Taddress_t ,_param->_size_instruction_address); |
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133 | ALLOC1_SIGNAL_OUT(out_EVENT_ADDRESS_NEXT_VAL ,"address_next_val",Tcontrol_t ,1); |
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134 | ALLOC1_SIGNAL_OUT(out_EVENT_IS_DS_TAKE ,"is_ds_take" ,Tcontrol_t ,1); |
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135 | } |
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136 | |
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137 | // ~~~~~[ Interface "spr_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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138 | { |
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139 | ALLOC1_INTERFACE("spr_event",OUT,WEST, _("An exception occure : write \"exception PC\"."), _param->_nb_context); |
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140 | |
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141 | ALLOC1_VALACK_OUT(out_SPR_EVENT_VAL ,VAL); |
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142 | ALLOC1_VALACK_IN ( in_SPR_EVENT_ACK ,ACK); |
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143 | ALLOC1_SIGNAL_OUT(out_SPR_EVENT_EPCR ,"epcr" ,Taddress_t, _param->_size_instruction_address); |
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144 | ALLOC1_SIGNAL_OUT(out_SPR_EVENT_EEAR ,"eear" ,Taddress_t, _param->_size_instruction_address); |
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145 | ALLOC1_SIGNAL_OUT(out_SPR_EVENT_EEAR_WEN ,"eear_wen" ,Tcontrol_t,1); |
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146 | ALLOC1_SIGNAL_OUT(out_SPR_EVENT_SR_DSX ,"sr_dsx" ,Tcontrol_t,1); |
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147 | ALLOC1_SIGNAL_OUT(out_SPR_EVENT_SR_TO_ESR ,"sr_to_esr",Tcontrol_t,1); |
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148 | } |
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149 | |
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150 | // ~~~~~[ Interface : "context" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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151 | { |
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152 | ALLOC1_INTERFACE("context",OUT,SOUTH, _("To decod."), _param->_nb_context); |
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153 | |
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154 | ALLOC1_SIGNAL_OUT(out_CONTEXT_DECOD_ENABLE ,"decod_enable",Tcontrol_t,1); |
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155 | } |
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156 | |
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157 | // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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158 | { |
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159 | ALLOC1_INTERFACE("depth",IN ,NORTH, _("From prediction_unit."), _param->_nb_context); |
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160 | |
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161 | ALLOC1_SIGNAL_IN ( in_DEPTH_MIN ,"min" ,Tdepth_t,_param->_size_depth); |
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162 | } |
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163 | |
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164 | |
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165 | // ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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166 | { |
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167 | ALLOC1_INTERFACE("spr",IN,EAST,_("Interface with the special registerFile"),_param->_nb_context); |
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168 | |
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169 | ALLOC1_SIGNAL_IN ( in_SPR_SR_IEE ,"SR_IEE",Tcontrol_t,1); |
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170 | ALLOC1_SIGNAL_IN ( in_SPR_SR_EPH ,"SR_EPH",Tcontrol_t,1); |
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171 | } |
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172 | |
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173 | // ~~~~~[ Interface : "interrupt" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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174 | { |
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175 | ALLOC1_INTERFACE("interrupt",IN,NORTH,_("Interrupt Exception"),_param->_nb_context); |
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176 | |
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177 | ALLOC1_SIGNAL_IN ( in_INTERRUPT_ENABLE ,"ENABLE",Tcontrol_t,1); |
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178 | } |
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179 | |
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180 | if (usage_is_set(_usage,USE_SYSTEMC)) |
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181 | { |
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182 | // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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183 | |
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184 | reg_STATE = new context_state_t [_param->_nb_context]; |
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185 | reg_EVENT_ADDRESS = new Taddress_t [_param->_nb_context]; |
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186 | reg_EVENT_ADDRESS_EPCR = new Taddress_t [_param->_nb_context]; |
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187 | reg_EVENT_ADDRESS_EPCR_VAL = new Tcontrol_t [_param->_nb_context]; |
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188 | reg_EVENT_ADDRESS_EEAR = new Taddress_t [_param->_nb_context]; |
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189 | reg_EVENT_ADDRESS_EEAR_VAL = new Tcontrol_t [_param->_nb_context]; |
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190 | reg_EVENT_IS_DELAY_SLOT = new Tcontrol_t [_param->_nb_context]; |
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191 | reg_EVENT_IS_DS_TAKE = new Tcontrol_t [_param->_nb_context]; |
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192 | reg_EVENT_DEPTH = new Tdepth_t [_param->_nb_context]; |
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193 | reg_INTERRUPT_ENABLE = new Tcontrol_t [_param->_nb_context]; |
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194 | |
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195 | // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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196 | internal_BRANCH_EVENT_ACK = new Tcontrol_t [_param->_nb_context]; |
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197 | internal_DECOD_EVENT_ACK = new Tcontrol_t [_param->_nb_decod_unit]; |
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198 | internal_BRANCH_COMPLETE_ACK = new Tcontrol_t [_param->_nb_inst_branch_complete]; |
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199 | internal_EVENT_VAL = new Tcontrol_t [_param->_nb_context]; |
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200 | internal_SPR_EVENT_VAL = new Tcontrol_t [_param->_nb_context]; |
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201 | } |
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202 | |
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203 | // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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204 | |
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205 | #ifdef POSITION |
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206 | if (usage_is_set(_usage,USE_POSITION)) |
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207 | _component->generate_file(); |
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208 | #endif |
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209 | |
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210 | log_end(Context_State,FUNCTION); |
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211 | }; |
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212 | |
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213 | }; // end namespace context_state |
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214 | }; // end namespace front_end |
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215 | }; // end namespace multi_front_end |
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216 | }; // end namespace core |
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217 | |
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218 | }; // end namespace behavioural |
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219 | }; // end namespace morpheo |
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