1 | #ifdef SYSTEMC |
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2 | /* |
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3 | * $Id: Context_State_genMoore.cpp 83 2008-05-09 18:00:21Z rosiere $ |
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4 | * |
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5 | * [ Description ] |
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6 | * |
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7 | */ |
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8 | |
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9 | #include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h" |
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10 | |
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11 | namespace morpheo { |
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12 | namespace behavioural { |
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13 | namespace core { |
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14 | namespace multi_front_end { |
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15 | namespace front_end { |
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16 | namespace context_state { |
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17 | |
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18 | |
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19 | #undef FUNCTION |
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20 | #define FUNCTION "Context_State::genMoore" |
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21 | void Context_State::genMoore (void) |
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22 | { |
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23 | log_begin(Context_State,FUNCTION); |
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24 | |
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25 | // ------------------------------------------------------------------- |
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26 | // -----[ EVENT ]----------------------------------------------------- |
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27 | // ------------------------------------------------------------------- |
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28 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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29 | { |
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30 | context_state_t state = reg_STATE [i]; |
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31 | |
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32 | internal_EVENT_VAL [i] = ((state == CONTEXT_STATE_KO_EXCEP_ADDR) or |
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33 | (state == CONTEXT_STATE_KO_MISS_ADDR ) or |
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34 | (state == CONTEXT_STATE_KO_PSYNC_ADDR) or |
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35 | (state == CONTEXT_STATE_KO_CSYNC_ADDR)); |
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36 | |
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37 | // excep : address exception |
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38 | // miss : address delay_slot, and address dest |
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39 | // psync : address next |
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40 | // csync : address next |
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41 | PORT_WRITE(out_EVENT_VAL [i], internal_EVENT_VAL [i]); |
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42 | PORT_WRITE(out_EVENT_ADDRESS [i], reg_EVENT_ADDRESS [i]); |
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43 | PORT_WRITE(out_EVENT_ADDRESS_NEXT [i], reg_EVENT_ADDRESS_EPCR [i]); |
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44 | PORT_WRITE(out_EVENT_ADDRESS_NEXT_VAL [i], (state == CONTEXT_STATE_KO_MISS_ADDR) and (reg_EVENT_ADDRESS_EPCR_VAL [i])); |
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45 | PORT_WRITE(out_EVENT_IS_DS_TAKE [i], (state == CONTEXT_STATE_KO_MISS_ADDR) and (reg_EVENT_IS_DS_TAKE [i])); |
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46 | } |
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47 | |
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48 | // ------------------------------------------------------------------- |
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49 | // -----[ SPR ]------------------------------------------------------- |
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50 | // ------------------------------------------------------------------- |
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51 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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52 | { |
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53 | context_state_t state = reg_STATE [i]; |
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54 | |
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55 | internal_SPR_VAL [i] = (state == CONTEXT_STATE_KO_EXCEP_SPR ); |
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56 | |
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57 | PORT_WRITE(out_SPR_VAL [i], internal_SPR_VAL [i]); |
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58 | PORT_WRITE(out_SPR_EPCR [i], reg_EVENT_ADDRESS_EPCR [i]); |
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59 | PORT_WRITE(out_SPR_EEAR [i], reg_EVENT_ADDRESS_EEAR [i]); |
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60 | PORT_WRITE(out_SPR_EEAR_WEN [i], reg_EVENT_ADDRESS_EEAR_VAL [i]); |
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61 | PORT_WRITE(out_SPR_SR_DSX [i], reg_EVENT_IS_DELAY_SLOT [i]); |
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62 | PORT_WRITE(out_SPR_SR_TO_ESR [i], 1); |
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63 | } |
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64 | |
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65 | // ------------------------------------------------------------------- |
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66 | // -----[ CONTEXT ]--------------------------------------------------- |
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67 | // ------------------------------------------------------------------- |
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68 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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69 | { |
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70 | context_state_t state = reg_STATE [i]; |
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71 | |
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72 | PORT_WRITE(out_CONTEXT_DECOD_ENABLE [i], ((state==CONTEXT_STATE_OK ) or |
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73 | (state==CONTEXT_STATE_KO_MSYNC_ISSUE) or |
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74 | (state==CONTEXT_STATE_KO_SPR_ISSUE ))); |
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75 | } |
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76 | |
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77 | log_end(Context_State,FUNCTION); |
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78 | }; |
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79 | |
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80 | }; // end namespace context_state |
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81 | }; // end namespace front_end |
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82 | }; // end namespace multi_front_end |
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83 | }; // end namespace core |
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84 | |
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85 | }; // end namespace behavioural |
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86 | }; // end namespace morpheo |
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87 | #endif |
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