[78] | 1 | #ifdef VHDL |
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| 2 | /* |
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| 3 | * $Id: Decod_vhdl_body.cpp 137 2010-02-16 12:35:48Z rosiere $ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace core { |
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| 14 | namespace multi_front_end { |
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| 15 | namespace front_end { |
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| 16 | namespace decod_unit { |
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| 17 | namespace decod { |
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| 18 | |
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[135] | 19 | #define instruction_illegale(tab,num_inst) vhdl->set_comment(tab," ILLEGAL INSTRUCTION --");\ |
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| 20 | vhdl->set_body(tab,"internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_ILLEGAL_INSTRUCTION)+"; "); \ |
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| 21 | vhdl->set_body(tab,"internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_ILLEGAL_INSTRUCTION)+"; "); \ |
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| 22 | vhdl->set_body(tab,"if internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_IS_DELAY_SLOT = '1' then "); \ |
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| 23 | vhdl->set_body(tab + 1,"internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_ADDRESS_NEXT <= internal_CONTEXT_0_ADDRESS_PREVIOUS; "); \ |
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| 24 | vhdl->set_body(tab,"else "); \ |
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| 25 | vhdl->set_body(tab + 1,"internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_ADDRESS_NEXT <= internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_ADDRESS; "); \ |
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| 26 | vhdl->set_body(tab,"end if;"); \ |
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| 27 | vhdl->set_body(tab,"internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_EXCEPTION)+"; "); |
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[78] | 28 | |
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| 29 | #undef FUNCTION |
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| 30 | #define FUNCTION "Decod::vhdl_body" |
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| 31 | void Decod::vhdl_body (Vhdl * & vhdl) |
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| 32 | { |
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| 33 | log_printf(FUNC,Decod,FUNCTION,"Begin"); |
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[135] | 34 | |
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| 35 | std::string extend_signal; |
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| 36 | |
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| 37 | for(uint32_t i = 0;i < _param->_nb_inst_decod;i++){ |
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[137] | 38 | vhdl->set_body(0,"internal_DECOD_INSTRUCTION_"+toString(i)+" <= in_IFETCH_0_"+toString(i)+"_INSTRUCTION WHEN in_IFETCH_0_"+toString(i)+"_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" ELSE "+std_logic_cst(6,OPCOD_10)+" & "+std_logic_cst(2,OPCOD_L_NOP)+" & X\"000000\" ;"); |
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[135] | 39 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_VAL <= internal_DECOD_"+toString(i)+"_VAL; "); |
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| 40 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_TYPE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE; "); |
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| 41 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_OPERATION <= internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION; "); |
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| 42 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_HAS_IMMEDIAT <= internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT; "); |
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| 43 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_IMMEDIAT <= internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT; "); |
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| 44 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_READ_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA; "); |
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| 45 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA; "); |
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| 46 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_READ_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB; "); |
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| 47 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB; "); |
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| 48 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_READ_RC <= internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC; "); |
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| 49 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NUM_REG_RC <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC; "); |
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| 50 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_WRITE_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD; "); |
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| 51 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD; "); |
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| 52 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_WRITE_RE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE; "); |
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| 53 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NUM_REG_RE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE; "); |
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| 54 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_EXCEPTION_USE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE; "); |
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[137] | 55 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_EXCEPTION <= internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION WHEN in_IFETCH_0_"+toString(i)+"_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" ELSE "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
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[135] | 56 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NO_EXECUTE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE; "); |
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| 57 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_IS_DELAY_SLOT <= internal_DECOD_INSTRUCTION_"+toString(i)+"_IS_DELAY_SLOT; "); |
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| 58 | #ifdef DEBUG |
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| 59 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_ADDRESS <= internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS; "); |
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| 60 | #endif |
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[137] | 61 | vhdl->set_body(0,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS <= in_IFETCH_0_"+toString(i)+"_ADDRESS + "+std_logic_cst(_param->_size_instruction_address,i)+" ;"); |
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[135] | 62 | vhdl->set_body(0,"out_DECOD_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
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[137] | 63 | vhdl->set_body(0,"internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_0_"+toString(i)+"_ADDRESS + '1'; "); |
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[135] | 64 | vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_CONDITION <= internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION; "); |
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| 65 | vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_DIRECTION <= internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION; "); |
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| 66 | vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_ADDRESS_SRC <= internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS; "); |
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| 67 | vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_ADDRESS_DEST <= internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
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[137] | 68 | vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_STATE <= in_IFETCH_0_"+toString(i)+"_BRANCH_STATE; "); |
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[135] | 69 | vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_VAL <= internal_PREDICT_"+toString(i)+"_VAL; "); |
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| 70 | |
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[137] | 71 | if(_param->_have_port_depth) vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID <= in_IFETCH_0_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID; "); |
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| 72 | if(_param->_have_port_inst_ifetch_ptr) vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_MATCH_INST_IFETCH_PTR <= '1' WHEN in_IFETCH_0_"+toString(i)+"_INST_IFETCH_PTR = "+std_logic_cst(_param->_size_inst_ifetch_ptr,i)+" ELSE '0'; "); |
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[135] | 73 | else vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_MATCH_INST_IFETCH_PTR <= '1' WHEN internal_DECOD_INSTRUCTION_0_TYPE = "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" ELSE '0' ; "); |
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| 74 | } |
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| 75 | |
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[78] | 76 | vhdl->set_body (""); |
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[135] | 77 | |
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| 78 | if(_param->_have_port_context_id){ |
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| 79 | |
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| 80 | } |
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| 81 | else{ |
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| 82 | |
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| 83 | vhdl->set_body(0,"internal_DECOD_INSTRUCTION_0_IS_DELAY_SLOT <= reg_CONTEXT_0_IS_DELAY_SLOT; "); |
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| 84 | for(uint32_t i = 1;i < _param->_nb_inst_decod;i++){ |
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| 85 | |
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| 86 | vhdl->set_body(0,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IS_DELAY_SLOT <= internal_HAVE_DECOD_BRANCH"+toString(i-1)+"; "); |
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| 87 | } |
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| 88 | |
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| 89 | vhdl->set_body(0,"out_CONTEXT_EVENT_VAL <= internal_CONTEXT_EVENT_VAL; "); |
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[137] | 90 | vhdl->set_body(0,"out_CONTEXT_EVENT_TYPE <= internal_DECOD_INSTRUCTION_0_EVENT_TYPE WHEN in_IFETCH_0_0_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" ELSE "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_EXCEPTION)+"; "); |
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[135] | 91 | vhdl->set_body(0,"out_CONTEXT_EVENT_ADDRESS <= internal_DECOD_INSTRUCTION_0_ADDRESS; "); |
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| 92 | vhdl->set_body(0,"out_CONTEXT_EVENT_ADDRESS_EPCR <= internal_DECOD_INSTRUCTION_0_ADDRESS_NEXT; "); |
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| 93 | vhdl->set_body(0,"out_CONTEXT_EVENT_IS_DELAY_SLOT <= reg_CONTEXT_0_IS_DELAY_SLOT; "); |
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| 94 | for(uint32_t i = 0;i < _param->_nb_inst_decod;i++) vhdl->set_body(0,"out_IFETCH_0_"+toString(i)+"_ACK <= internal_IFETCH_0_"+toString(i)+"_ACK; "); |
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| 95 | } |
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| 96 | |
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| 97 | vhdl->set_body(0,""); |
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| 98 | |
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| 99 | vhdl->set_body(0,"internal_CONTEXT_EVENT_VAL <= internal_DECOD_0_VAL AND internal_IFETCH_0_0_ACK WHEN internal_DECOD_INSTRUCTION_0_EVENT_TYPE /= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+" ELSE '0'; "); |
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| 100 | |
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| 101 | for(uint32_t x = 0;x < _param->_nb_context;x++){ |
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| 102 | if(_param->_nb_inst_decod <= 1){ |
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| 103 | vhdl->set_body(0,"internal_HAVE_DECOD_BRANCH_0 <= '0'; "); |
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| 104 | vhdl->set_body(0,"internal_CAN_CONTINUE_"+toString(x)+" <= in_CONTEXT_"+toString(x)+"_DECOD_ENABLE; "); |
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| 105 | } |
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| 106 | else{ |
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| 107 | vhdl->set_body(0,"internal_CAN_CONTINUE_"+toString(x)+" <= in_CONTEXT_"+toString(x)+"_DECOD_ENABLE WHEN internal_DECOD_INSTRUCTION_0_TYPE /= "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" ELSE ( in_CONTEXT_"+toString(x)+"_DECOD_ENABLE AND in_PREDICT_0_CAN_CONTINUE ); "); |
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| 108 | for(uint32_t i = 1;i < _param->_nb_inst_decod;i++) vhdl->set_body(0,"internal_HAVE_DECOD_BRANCH_"+toString(i)+" <= internal_DECOD_BRANCH_"+toString(i-1)+"_VAL; "); |
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| 109 | } |
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| 110 | vhdl->set_body(0,"internal_CONTEXT_"+toString(x)+"_HAVE_TRANSACTION <= internal_IFETCH_"+toString(x)+"_0_ACK "); |
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| 111 | for (uint32_t y = 1; y < _param->_nb_inst_fetch[x]; y++) vhdl->set_body(1,"OR internal_IFETCH_"+toString(x)+"_"+toString(y)+"_ACK "); |
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| 112 | vhdl->set_body(0,";"); |
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| 113 | } |
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| 114 | |
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| 115 | if(_param->_nb_inst_decod <= 1){ |
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| 116 | |
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| 117 | vhdl->set_body(0,"internal_DECOD_BRANCH_0_VAL <= in_PREDICT_0_ACK WHEN internal_DECOD_INSTRUCTION_0_TYPE = "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" ELSE '1'; "); |
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| 118 | vhdl->set_body(0,"internal_DECOD_CONTEXT_EVENT_0_VAL <= in_CONTEXT_EVENT_ACK WHEN internal_DECOD_INSTRUCTION_0_EVENT_TYPE /= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+" ELSE '1'; "); |
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| 119 | vhdl->set_body(0,"internal_DECOD_0_VAL <= (( in_IFETCH_0_0_VAL AND internal_CAN_CONTINUE_0 ) AND in_CONTEXT_0_DEPTH_VAL ) AND internal_DECOD_BRANCH_0_VAL AND internal_DECOD_CONTEXT_EVENT_0_VAL; "); |
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| 120 | vhdl->set_body(0,"internal_IFETCH_0_0_ACK <= ((( in_IFETCH_0_0_VAL AND internal_CAN_CONTINUE_0 ) AND in_DECOD_0_ACK ) AND in_CONTEXT_0_DEPTH_VAL ) AND internal_DECOD_BRANCH_0_VAL AND internal_DECOD_CONTEXT_EVENT_0_VAL; "); |
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| 121 | |
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| 122 | vhdl->set_body(0,"internal_PREDICT_0_VAL <= NOT( internal_HAVE_DECOD_BRANCH_0 ) AND in_IFETCH_0_0_VAL AND internal_CAN_CONTINUE_0 AND in_CONTEXT_0_DEPTH_VAL AND in_DECOD_0_ACK WHEN internal_DECOD_INSTRUCTION_0_TYPE = "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" ELSE '0'; "); |
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| 123 | } |
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| 124 | else{ // TO DO |
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| 125 | for(uint32_t i = 0;i < _param->_nb_inst_decod;i++){ |
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| 126 | vhdl->set_body(0,"internal_PREDICT_"+toString(i)+"_VAL <= NOT( internal_HAVE_DECOD_BRANCH_0 ) AND in_DECOD_"+toString(i)+"_ACK AND in_CONTEXT_0_DEPTH_VAL WHEN ( in_IFETCH_0_0_VAL AND internal_CAN_CONTINUE_0 ) = '1' ELSE '0'; "); |
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| 127 | |
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| 128 | vhdl->set_body(0,"internal_DECOD_BRANCH_"+toString(i)+"_VAL <= ( in_PREDICT_"+toString(i)+"_ACK AND NOT internal_HAVE_DECOD_BRANCH_0 ) OR NOT( internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE = "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" ); "); |
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| 129 | vhdl->set_body(0,"internal_DECOD_CONTEXT_EVENT_"+toString(i)+"_VAL <= in_CONTEXT_EVENT_ACK OR NOT( internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE = "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+" ); "); |
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| 130 | vhdl->set_body(0,"internal_DECOD_"+toString(i)+"_VAL <= (( in_IFETCH_0_0_VAL AND internal_CAN_CONTINUE_0 ) AND in_CONTEXT_0_DEPTH_VAL ) AND internal_DECOD_BRANCH_"+toString(i)+"_VAL AND internal_DECOD_CONTEXT_EVENT_"+toString(i)+"_VAL; "); |
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| 131 | } |
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| 132 | } |
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| 133 | |
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| 134 | vhdl->set_body(0,""); |
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| 135 | vhdl->set_comment(0,"-----------------------------------"); |
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| 136 | vhdl->set_comment(0,"-- Case process "); |
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| 137 | vhdl->set_comment(0,"-----------------------------------"); |
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| 138 | vhdl->set_body(0,""); |
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| 139 | |
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| 140 | for(uint32_t i = 0;i < _param->_nb_inst_decod;i++){ |
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| 141 | vhdl->set_body(0,"case_DECOD_INST_"+toString(i)+": process (internal_DECOD_INSTRUCTION_"+toString(i)+")"); |
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| 142 | vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_0 : "+std_logic(6)+";"); |
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| 143 | vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_1 : "+std_logic(8)+";"); |
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| 144 | vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_2 : "+std_logic(8)+";"); |
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| 145 | vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_3 : "+std_logic(6)+";"); |
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| 146 | vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_4 : "+std_logic(5)+";"); |
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| 147 | vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_5 : "+std_logic(5)+";"); |
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| 148 | vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_6 : "+std_logic(2)+";"); |
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| 149 | vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_7 : "+std_logic(4)+";"); |
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| 150 | vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_8 : "+std_logic(1)+";"); |
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| 151 | vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_9 : "+std_logic(3)+";"); |
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| 152 | vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_10 : "+std_logic(2)+";"); |
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| 153 | vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_11 : "+std_logic(2)+";"); |
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| 154 | vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_12 : "+std_logic(4)+";"); |
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| 155 | vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_13 : "+std_logic(4)+";"); |
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| 156 | |
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| 157 | vhdl->set_body(0,"begin"); |
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| 158 | |
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| 159 | //vhdl->set_body(1,"if in_IFETCH_0_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" then"); |
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| 160 | //vhdl->set_body(2,"internal_DECOD_INSTRUCTION_"+toString(i)+" <= in_IFETCH_0_"+toString(i)+"_INSTRUCTION ;"); |
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| 161 | //vhdl->set_body(1,"else"); |
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| 162 | //vhdl->set_body(2,"internal_DECOD_INSTRUCTION_"+toString(i)+" <= "+std_logic_cst(6,OPCOD_10)+" & "+std_logic_cst(2,OPCOD_L_NOP)+" & X\"000000\" ;"); |
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| 163 | //vhdl->set_body(1,"end if;"); |
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| 164 | |
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| 165 | |
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| 166 | #ifdef SYSTEMC_VHDL_COMPATIBILITY |
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| 167 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= "+std_logic_cst(1,0)+";"); |
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| 168 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,0)+";"); |
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| 169 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,0)+";"); |
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| 170 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= "+std_logic_cst(1,0)+";"); |
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| 171 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,0)+";"); |
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| 172 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= "+std_logic_cst(1,0)+";"); |
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| 173 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= "+std_logic_cst(_param->_size_general_register_logic,0)+";"); |
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| 174 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= "+std_logic_cst(1,0)+";"); |
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| 175 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= "+std_logic_cst(_param->_size_general_register_logic,0)+";"); |
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| 176 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= "+std_logic_cst(1,0)+";"); |
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| 177 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC <= "+std_logic_cst(_param->_size_special_register_logic,0)+";"); |
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| 178 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= "+std_logic_cst(1,0)+";"); |
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| 179 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= "+std_logic_cst(_param->_size_general_register_logic,0)+";"); |
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| 180 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= "+std_logic_cst(1,0)+";"); |
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| 181 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,0)+";"); |
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| 182 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,0)+";"); |
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| 183 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,0)+";"); |
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| 184 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,0)+";"); |
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| 185 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= "+std_logic_cst(1,0)+";"); |
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| 186 | #endif |
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| 187 | |
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| 188 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_0 := internal_DECOD_INSTRUCTION_"+toString(i)+"(31 downto 26); "); |
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| 189 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_1 := internal_DECOD_INSTRUCTION_"+toString(i)+"(7 downto 0); "); |
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| 190 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_2 := internal_DECOD_INSTRUCTION_"+toString(i)+"(7 downto 0); "); |
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| 191 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_3 := internal_DECOD_INSTRUCTION_"+toString(i)+"(9 downto 8) & internal_DECOD_INSTRUCTION_"+toString(i)+"(3 downto 0); "); |
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| 192 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_4 := internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
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| 193 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_5 := internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
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| 194 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_6 := internal_DECOD_INSTRUCTION_"+toString(i)+"(7 downto 6); "); |
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| 195 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_7 := internal_DECOD_INSTRUCTION_"+toString(i)+"(3 downto 0); "); |
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| 196 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_8 := internal_DECOD_INSTRUCTION_"+toString(i)+"(16); "); |
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| 197 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_9 := internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 23); "); |
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| 198 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_10 := internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 24); "); |
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| 199 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_11 := internal_DECOD_INSTRUCTION_"+toString(i)+"(7 downto 6); "); |
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| 200 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_12 := internal_DECOD_INSTRUCTION_"+toString(i)+"(9 downto 6); "); |
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| 201 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_13 := internal_DECOD_INSTRUCTION_"+toString(i)+"(9 downto 6); "); |
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| 202 | |
---|
| 203 | vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT;"); |
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| 204 | |
---|
| 205 | vhdl->set_body(1,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_0 is"); |
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| 206 | |
---|
| 207 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_J)+" => "); |
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| 208 | vhdl->set_comment(2," OPCOD_L_J --"); |
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| 209 | |
---|
| 210 | // TYPE_0 IMMEDIAT |
---|
| 211 | // OPCOD_L_J |
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| 212 | |
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| 213 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_J)._type)+"; "); |
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| 214 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_J)._operation)+"; "); |
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| 215 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
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| 216 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); |
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| 217 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
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| 218 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
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| 219 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
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| 220 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
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| 221 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
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| 222 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
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| 223 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK)+"; "); |
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| 224 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= '1'; "); |
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| 225 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '1'; "); |
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| 226 | extend_signal = ""; |
---|
| 227 | for(uint32_t cp = 0;cp < _param->_size_instruction_address - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; |
---|
[137] | 228 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_0_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); |
---|
[135] | 229 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 230 | |
---|
| 231 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_JAL)+" => "); |
---|
| 232 | vhdl->set_comment(2," OPCOD_L_JAL --"); |
---|
| 233 | |
---|
| 234 | // TYPE_0 IMMEDIAT |
---|
| 235 | // OPCOD_L_JAL |
---|
| 236 | |
---|
| 237 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_JAL)._type)+"; "); |
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| 238 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_JAL)._operation)+"; "); |
---|
| 239 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 240 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \"00\" & internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT + '1'; "); |
---|
| 241 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); |
---|
| 242 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 243 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 244 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 245 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= "+std_logic_cst(_param->_size_general_register_logic,9)+"; "); |
---|
| 246 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 247 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 248 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 249 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_NONE_WITH_WRITE_STACK)+"; "); |
---|
| 250 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= '1'; "); |
---|
| 251 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 252 | extend_signal = ""; |
---|
| 253 | for(uint32_t cp = 0;cp < _param->_size_instruction_address - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; |
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[137] | 254 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_0_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); |
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[135] | 255 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 256 | |
---|
| 257 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_BNF)+" => "); |
---|
| 258 | vhdl->set_comment(2," OPCOD_L_BNF --"); |
---|
| 259 | |
---|
| 260 | // TYPE_0 IMMEDIAT |
---|
| 261 | // OPCOD_L_BNF |
---|
| 262 | |
---|
| 263 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_BNF)._type)+"; "); |
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| 264 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_BNF)._operation)+"; "); |
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| 265 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 266 | extend_signal = ""; |
---|
| 267 | for(uint32_t cp = 0;cp < _param->_size_general_data - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; |
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[137] | 268 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \"00\" & in_IFETCH_0_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); |
---|
[135] | 269 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); |
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| 270 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 271 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '1'; "); |
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| 272 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
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| 273 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 274 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 275 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 276 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 277 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_FLAG_UNSET)+"; "); |
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| 278 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25); "); |
---|
| 279 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 280 | extend_signal = ""; |
---|
| 281 | for(uint32_t cp = 0;cp < _param->_size_instruction_address - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; |
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[137] | 282 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_0_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); |
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[135] | 283 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
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| 284 | |
---|
| 285 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_BF)+" => "); |
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| 286 | vhdl->set_comment(2," OPCOD_L_BF --"); |
---|
| 287 | |
---|
| 288 | // TYPE_0 IMMEDIAT |
---|
| 289 | // OPCOD_L_BF |
---|
| 290 | |
---|
| 291 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_BF)._type)+"; "); |
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| 292 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_BF)._operation)+"; "); |
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| 293 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
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| 294 | extend_signal = ""; |
---|
| 295 | for(uint32_t cp = 0;cp < _param->_size_general_data - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; |
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[137] | 296 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \"00\" & in_IFETCH_0_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); |
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[135] | 297 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); |
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| 298 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
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| 299 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '1'; "); |
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| 300 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
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| 301 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
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| 302 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 303 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 304 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 305 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_FLAG_SET)+"; "); |
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| 306 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25); "); |
---|
| 307 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 308 | extend_signal = ""; |
---|
| 309 | for(uint32_t cp = 0;cp < _param->_size_instruction_address - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; |
---|
[137] | 310 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_0_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); "); |
---|
[135] | 311 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 312 | |
---|
| 313 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_RFE)+" => "); |
---|
| 314 | vhdl->set_comment(2," OPCOD_L_RFE --"); |
---|
| 315 | |
---|
| 316 | // TYPE_0 IMMEDIAT |
---|
| 317 | // OPCOD_L_RFE |
---|
| 318 | |
---|
| 319 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_RFE)._type)+"; "); |
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| 320 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_RFE)._operation)+"; "); |
---|
| 321 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 322 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); |
---|
| 323 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 324 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 325 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 326 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 327 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 328 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 329 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '1'; "); |
---|
| 330 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 331 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 332 | |
---|
| 333 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_JR)+" => "); |
---|
| 334 | vhdl->set_comment(2," OPCOD_L_JR --"); |
---|
| 335 | |
---|
| 336 | // TYPE_0 IMMEDIAT |
---|
| 337 | // OPCOD_L_JR |
---|
| 338 | |
---|
| 339 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_JR)._type)+"; "); |
---|
| 340 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_JR)._operation)+"; "); |
---|
| 341 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 342 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); |
---|
| 343 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 344 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 345 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 346 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 347 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 348 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 349 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 350 | vhdl->set_body(3,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11) = "+std_logic_cst(_param->_size_general_register_logic,9)+" then "); |
---|
| 351 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_READ_STACK)+"; "); |
---|
| 352 | vhdl->set_body(3,"else "); |
---|
| 353 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK)+"; "); |
---|
| 354 | vhdl->set_body(3,"end if; "); |
---|
| 355 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= '1'; "); |
---|
| 356 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 357 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 358 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 359 | |
---|
| 360 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_JALR)+" => "); |
---|
| 361 | vhdl->set_comment(2," OPCOD_L_JALR --"); |
---|
| 362 | |
---|
| 363 | // TYPE_0 IMMEDIAT |
---|
| 364 | // OPCOD_L_JALR |
---|
| 365 | |
---|
| 366 | vhdl->set_body(3,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11) = "+std_logic_cst(_param->_size_general_register_logic,9)+" then "); |
---|
| 367 | instruction_illegale(3,i) |
---|
| 368 | // illegal instruction |
---|
| 369 | vhdl->set_body(3,"else "); |
---|
| 370 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_JALR)._type)+"; "); |
---|
| 371 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_JALR)._operation)+"; "); |
---|
| 372 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 373 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \"00\" & internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT + '1'; "); |
---|
| 374 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); |
---|
| 375 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 376 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 377 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 378 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 379 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= "+std_logic_cst(_param->_size_general_register_logic,9)+"; "); |
---|
| 380 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 381 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 382 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 383 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK)+"; "); |
---|
| 384 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= '1'; "); |
---|
| 385 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 386 | //vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 387 | vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 388 | vhdl->set_body(3,"end if; "); |
---|
| 389 | |
---|
| 390 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_MACI)+" => "); |
---|
| 391 | vhdl->set_comment(2," OPCOD_L_MACI --"); |
---|
| 392 | |
---|
| 393 | // TYPE_0 IMMEDIAT |
---|
| 394 | // OPCOD_L_MACI |
---|
| 395 | |
---|
| 396 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MACI)._type)+"; "); |
---|
| 397 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MACI)._operation)+"; "); |
---|
| 398 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 399 | extend_signal = ""; |
---|
| 400 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; |
---|
| 401 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); "); |
---|
| 402 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 403 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 404 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 405 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 406 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 407 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 408 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 409 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 410 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 411 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 412 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; "); |
---|
| 413 | |
---|
| 414 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST1)+" => "); |
---|
| 415 | vhdl->set_comment(2," OPCOD_L_CUST1 --"); |
---|
| 416 | |
---|
| 417 | // TYPE_0 IMMEDIAT |
---|
| 418 | // OPCOD_L_CUST1 |
---|
| 419 | |
---|
| 420 | instruction_illegale(2,i) |
---|
| 421 | // illegal instruction |
---|
| 422 | |
---|
| 423 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST2)+" => "); |
---|
| 424 | vhdl->set_comment(2," OPCOD_L_CUST2 --"); |
---|
| 425 | |
---|
| 426 | // TYPE_0 IMMEDIAT |
---|
| 427 | // OPCOD_L_CUST2 |
---|
| 428 | |
---|
| 429 | instruction_illegale(2,i) |
---|
| 430 | // illegal instruction |
---|
| 431 | |
---|
| 432 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST3)+" => "); |
---|
| 433 | vhdl->set_comment(2," OPCOD_L_CUST3 --"); |
---|
| 434 | |
---|
| 435 | // TYPE_0 IMMEDIAT |
---|
| 436 | // OPCOD_L_CUST3 |
---|
| 437 | |
---|
| 438 | instruction_illegale(2,i) |
---|
| 439 | // illegal instruction |
---|
| 440 | |
---|
| 441 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST4)+" => "); |
---|
| 442 | vhdl->set_comment(2," OPCOD_L_CUST4 --"); |
---|
| 443 | |
---|
| 444 | // TYPE_0 IMMEDIAT |
---|
| 445 | // OPCOD_L_CUST4 |
---|
| 446 | |
---|
| 447 | instruction_illegale(2,i) |
---|
| 448 | // illegal instruction |
---|
| 449 | |
---|
| 450 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST5)+" => "); |
---|
| 451 | vhdl->set_comment(2," OPCOD_L_CUST5 --"); |
---|
| 452 | |
---|
| 453 | // TYPE_0 IMMEDIAT |
---|
| 454 | // OPCOD_L_CUST5 |
---|
| 455 | |
---|
| 456 | instruction_illegale(2,i) |
---|
| 457 | // illegal instruction |
---|
| 458 | |
---|
| 459 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST6)+" => "); |
---|
| 460 | vhdl->set_comment(2," OPCOD_L_CUST6 --"); |
---|
| 461 | |
---|
| 462 | // TYPE_0 IMMEDIAT |
---|
| 463 | // OPCOD_L_CUST6 |
---|
| 464 | |
---|
| 465 | instruction_illegale(2,i) |
---|
| 466 | // illegal instruction |
---|
| 467 | |
---|
| 468 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST7)+" => "); |
---|
| 469 | vhdl->set_comment(2," OPCOD_L_CUST7 --"); |
---|
| 470 | |
---|
| 471 | // TYPE_0 IMMEDIAT |
---|
| 472 | // OPCOD_L_CUST7 |
---|
| 473 | |
---|
| 474 | instruction_illegale(2,i) |
---|
| 475 | // illegal instruction |
---|
| 476 | |
---|
| 477 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST8)+" => "); |
---|
| 478 | vhdl->set_comment(2," OPCOD_L_CUST8 --"); |
---|
| 479 | |
---|
| 480 | // TYPE_0 IMMEDIAT |
---|
| 481 | // OPCOD_L_CUST8 |
---|
| 482 | |
---|
| 483 | instruction_illegale(2,i) |
---|
| 484 | // illegal instruction |
---|
| 485 | |
---|
| 486 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LD)+" => "); |
---|
| 487 | vhdl->set_comment(2," OPCOD_L_LD --"); |
---|
| 488 | |
---|
| 489 | // TYPE_0 IMMEDIAT |
---|
| 490 | // OPCOD_L_LD |
---|
| 491 | |
---|
| 492 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LD)._type)+"; "); |
---|
| 493 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LD)._operation)+"; "); |
---|
| 494 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 495 | extend_signal = ""; |
---|
| 496 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 497 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 498 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 499 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 500 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 501 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 502 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 503 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 504 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 505 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; "); |
---|
| 506 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 507 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 508 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 509 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 510 | |
---|
| 511 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LWS)+" => "); |
---|
| 512 | vhdl->set_comment(2," OPCOD_L_LWS --"); |
---|
| 513 | |
---|
| 514 | // TYPE_0 IMMEDIAT |
---|
| 515 | // OPCOD_L_LWS |
---|
| 516 | |
---|
| 517 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LWS)._type)+"; "); |
---|
| 518 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LWS)._operation)+"; "); |
---|
| 519 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 520 | extend_signal = ""; |
---|
| 521 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 522 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 523 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 524 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 525 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 526 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 527 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 528 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 529 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 530 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; "); |
---|
| 531 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 532 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 533 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 534 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 535 | |
---|
| 536 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LWZ)+" => "); |
---|
| 537 | vhdl->set_comment(2," OPCOD_L_LWZ --"); |
---|
| 538 | |
---|
| 539 | // TYPE_0 IMMEDIAT |
---|
| 540 | // OPCOD_L_LWZ |
---|
| 541 | |
---|
| 542 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LWZ)._type)+"; "); |
---|
| 543 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LWZ)._operation)+"; "); |
---|
| 544 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 545 | extend_signal = ""; |
---|
| 546 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 547 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 548 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 549 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 550 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 551 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 552 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 553 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 554 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 555 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; "); |
---|
| 556 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 557 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 558 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 559 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 560 | |
---|
| 561 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LBS)+" => "); |
---|
| 562 | vhdl->set_comment(2," OPCOD_L_LBS --"); |
---|
| 563 | |
---|
| 564 | // TYPE_0 IMMEDIAT |
---|
| 565 | // OPCOD_L_LBS |
---|
| 566 | |
---|
| 567 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LBS)._type)+"; "); |
---|
| 568 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LBS)._operation)+"; "); |
---|
| 569 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 570 | extend_signal = ""; |
---|
| 571 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 572 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 573 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 574 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 575 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 576 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 577 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 578 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 579 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 580 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT)+"; "); |
---|
| 581 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 582 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 583 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 584 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 585 | |
---|
| 586 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LBZ)+" => "); |
---|
| 587 | vhdl->set_comment(2," OPCOD_L_LBZ --"); |
---|
| 588 | |
---|
| 589 | // TYPE_0 IMMEDIAT |
---|
| 590 | // OPCOD_L_LBZ |
---|
| 591 | |
---|
| 592 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LBZ)._type)+"; "); |
---|
| 593 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LBZ)._operation)+"; "); |
---|
| 594 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 595 | extend_signal = ""; |
---|
| 596 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 597 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 598 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 599 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 600 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 601 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 602 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 603 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 604 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 605 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT)+"; "); |
---|
| 606 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 607 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 608 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 609 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 610 | |
---|
| 611 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LHS)+" => "); |
---|
| 612 | vhdl->set_comment(2," OPCOD_L_LHS --"); |
---|
| 613 | |
---|
| 614 | // TYPE_0 IMMEDIAT |
---|
| 615 | // OPCOD_L_LHS |
---|
| 616 | |
---|
| 617 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LHS)._type)+"; "); |
---|
| 618 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LHS)._operation)+"; "); |
---|
| 619 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 620 | extend_signal = ""; |
---|
| 621 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 622 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 623 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 624 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 625 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 626 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 627 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 628 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 629 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 630 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; "); |
---|
| 631 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 632 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 633 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 634 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 635 | |
---|
| 636 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LHZ)+" => "); |
---|
| 637 | vhdl->set_comment(2," OPCOD_L_LHZ --"); |
---|
| 638 | |
---|
| 639 | // TYPE_0 IMMEDIAT |
---|
| 640 | // OPCOD_L_LHZ |
---|
| 641 | |
---|
| 642 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LHZ)._type)+"; "); |
---|
| 643 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LHZ)._operation)+"; "); |
---|
| 644 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 645 | extend_signal = ""; |
---|
| 646 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 647 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 648 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 649 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 650 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 651 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 652 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 653 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 654 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 655 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; "); |
---|
| 656 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 657 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 658 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 659 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 660 | |
---|
| 661 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_ADDI)+" => "); |
---|
| 662 | vhdl->set_comment(2," OPCOD_L_ADDI --"); |
---|
| 663 | |
---|
| 664 | // TYPE_0 IMMEDIAT |
---|
| 665 | // OPCOD_L_ADDI |
---|
| 666 | |
---|
| 667 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ADDI)._type)+"; "); |
---|
| 668 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ADDI)._operation)+"; "); |
---|
| 669 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 670 | extend_signal = ""; |
---|
| 671 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 672 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 673 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 674 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 675 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 676 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 677 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 678 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 679 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 680 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); |
---|
| 681 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); |
---|
| 682 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 683 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 684 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 685 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 686 | |
---|
| 687 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_ADDIC)+" => "); |
---|
| 688 | vhdl->set_comment(2," OPCOD_L_ADDIC --"); |
---|
| 689 | |
---|
| 690 | // TYPE_0 IMMEDIAT |
---|
| 691 | // OPCOD_L_ADDIC |
---|
| 692 | |
---|
| 693 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ADDIC)._type)+"; "); |
---|
| 694 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ADDIC)._operation)+"; "); |
---|
| 695 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 696 | extend_signal = ""; |
---|
| 697 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 698 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 699 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 700 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 701 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 702 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '1'; "); |
---|
| 703 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); |
---|
| 704 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 705 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 706 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 707 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); |
---|
| 708 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); |
---|
| 709 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 710 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 711 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 712 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 713 | |
---|
| 714 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_ANDI)+" => "); |
---|
| 715 | vhdl->set_comment(2," OPCOD_L_ANDI --"); |
---|
| 716 | |
---|
| 717 | // TYPE_0 IMMEDIAT |
---|
| 718 | // OPCOD_L_ANDI |
---|
| 719 | |
---|
| 720 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ANDI)._type)+"; "); |
---|
| 721 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ANDI)._operation)+"; "); |
---|
| 722 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 723 | extend_signal = ""; |
---|
| 724 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0"; |
---|
| 725 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 726 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 727 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 728 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 729 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 730 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 731 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 732 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 733 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 734 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 735 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 736 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 737 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 738 | |
---|
| 739 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_ORI)+" => "); |
---|
| 740 | vhdl->set_comment(2," OPCOD_L_ORI --"); |
---|
| 741 | |
---|
| 742 | // TYPE_0 IMMEDIAT |
---|
| 743 | // OPCOD_L_ORI |
---|
| 744 | |
---|
| 745 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ORI)._type)+"; "); |
---|
| 746 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ORI)._operation)+"; "); |
---|
| 747 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 748 | extend_signal = ""; |
---|
| 749 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0"; |
---|
| 750 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 751 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 752 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 753 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 754 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 755 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 756 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 757 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 758 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 759 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 760 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 761 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 762 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 763 | |
---|
| 764 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_XORI)+" => "); |
---|
| 765 | vhdl->set_comment(2," OPCOD_L_XORI --"); |
---|
| 766 | |
---|
| 767 | // TYPE_0 IMMEDIAT |
---|
| 768 | // OPCOD_L_XORI |
---|
| 769 | |
---|
| 770 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_XORI)._type)+"; "); |
---|
| 771 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_XORI)._operation)+"; "); |
---|
| 772 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 773 | extend_signal = ""; |
---|
| 774 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 775 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 776 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 777 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 778 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 779 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 780 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 781 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 782 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 783 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 784 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 785 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 786 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 787 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 788 | |
---|
| 789 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_MULI)+" => "); |
---|
| 790 | vhdl->set_comment(2," OPCOD_L_MULI --"); |
---|
| 791 | |
---|
| 792 | // TYPE_0 IMMEDIAT |
---|
| 793 | // OPCOD_L_MULI |
---|
| 794 | |
---|
| 795 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MULI)._type)+"; "); |
---|
| 796 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MULI)._operation)+"; "); |
---|
| 797 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 798 | extend_signal = ""; |
---|
| 799 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 800 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 801 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 802 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 803 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 804 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 805 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 806 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 807 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 808 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); |
---|
| 809 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); |
---|
| 810 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 811 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 812 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 813 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 814 | |
---|
| 815 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_MFSPR)+" => "); |
---|
| 816 | vhdl->set_comment(2," OPCOD_L_MFSPR --"); |
---|
| 817 | |
---|
| 818 | // TYPE_0 IMMEDIAT |
---|
| 819 | // OPCOD_L_MFSPR |
---|
| 820 | |
---|
| 821 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MFSPR)._type)+"; "); |
---|
| 822 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MFSPR)._operation)+"; "); |
---|
| 823 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 824 | extend_signal = ""; |
---|
| 825 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0"; |
---|
| 826 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 827 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 828 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 829 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 830 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 831 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 832 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 833 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 834 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 835 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 836 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 837 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 838 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; "); |
---|
| 839 | |
---|
| 840 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_MTSPR)+" => "); |
---|
| 841 | vhdl->set_comment(2," OPCOD_L_MTSPR --"); |
---|
| 842 | |
---|
| 843 | // TYPE_0 IMMEDIAT |
---|
| 844 | // OPCOD_L_MTSPR |
---|
| 845 | |
---|
| 846 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MTSPR)._type)+"; "); |
---|
| 847 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MTSPR)._operation)+"; "); |
---|
| 848 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 849 | extend_signal = ""; |
---|
| 850 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0"; |
---|
| 851 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); "); |
---|
| 852 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 853 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 854 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 855 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 856 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 857 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 858 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 859 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 860 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 861 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 862 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 863 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; "); |
---|
| 864 | |
---|
| 865 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_SD)+" => "); |
---|
| 866 | vhdl->set_comment(2," OPCOD_L_SD --"); |
---|
| 867 | |
---|
| 868 | // TYPE_0 IMMEDIAT |
---|
| 869 | // OPCOD_L_SD |
---|
| 870 | |
---|
| 871 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SD)._type)+"; "); |
---|
| 872 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SD)._operation)+"; "); |
---|
| 873 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 874 | extend_signal = ""; |
---|
| 875 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; |
---|
| 876 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); "); |
---|
| 877 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 878 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 879 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 880 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 881 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 882 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 883 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 884 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; "); |
---|
| 885 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 886 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 887 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 888 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 889 | |
---|
| 890 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_SW)+" => "); |
---|
| 891 | vhdl->set_comment(2," OPCOD_L_SW --"); |
---|
| 892 | |
---|
| 893 | // TYPE_0 IMMEDIAT |
---|
| 894 | // OPCOD_L_SW |
---|
| 895 | |
---|
| 896 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SW)._type)+"; "); |
---|
| 897 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SW)._operation)+"; "); |
---|
| 898 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 899 | extend_signal = ""; |
---|
| 900 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; |
---|
| 901 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); "); |
---|
| 902 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 903 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 904 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 905 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 906 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 907 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 908 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 909 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; "); |
---|
| 910 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 911 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 912 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 913 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 914 | |
---|
| 915 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_SB)+" => "); |
---|
| 916 | vhdl->set_comment(2," OPCOD_L_SB --"); |
---|
| 917 | |
---|
| 918 | // TYPE_0 IMMEDIAT |
---|
| 919 | // OPCOD_L_SB |
---|
| 920 | |
---|
| 921 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SB)._type)+"; "); |
---|
| 922 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SB)._operation)+"; "); |
---|
| 923 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 924 | extend_signal = ""; |
---|
| 925 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; |
---|
| 926 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); "); |
---|
| 927 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 928 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 929 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 930 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 931 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 932 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 933 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 934 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT)+"; "); |
---|
| 935 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 936 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 937 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 938 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 939 | |
---|
| 940 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_SH)+" => "); |
---|
| 941 | vhdl->set_comment(2," OPCOD_L_SH --"); |
---|
| 942 | |
---|
| 943 | // TYPE_0 IMMEDIAT |
---|
| 944 | // OPCOD_L_SH |
---|
| 945 | |
---|
| 946 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SH)._type)+"; "); |
---|
| 947 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SH)._operation)+"; "); |
---|
| 948 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 949 | extend_signal = ""; |
---|
| 950 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & "; |
---|
| 951 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); "); |
---|
| 952 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 953 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 954 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 955 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 956 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 957 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 958 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 959 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; "); |
---|
| 960 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 961 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 962 | //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 963 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 964 | |
---|
| 965 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_1)+" => "); |
---|
| 966 | vhdl->set_comment(2," OPCOD_1 ORFPX32/64 --"); |
---|
| 967 | |
---|
| 968 | // TYPE_1 ORFPX32/64 |
---|
| 969 | |
---|
| 970 | vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_1 is"); |
---|
| 971 | |
---|
| 972 | vhdl->set_body(4,"WHEN others => "); |
---|
| 973 | instruction_illegale(4,i) |
---|
| 974 | |
---|
| 975 | // illegal instruction |
---|
| 976 | |
---|
| 977 | vhdl->set_body(3,"end case;"); |
---|
| 978 | |
---|
| 979 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_2)+" => "); |
---|
| 980 | vhdl->set_comment(2," OPCOD_2 ORVDX64 --"); |
---|
| 981 | |
---|
| 982 | // TYPE_2 ORVDX64 |
---|
| 983 | |
---|
| 984 | vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_2 is"); |
---|
| 985 | |
---|
| 986 | vhdl->set_body(4,"WHEN others => "); |
---|
| 987 | instruction_illegale(4,i) |
---|
| 988 | |
---|
| 989 | // illegal instruction |
---|
| 990 | |
---|
| 991 | vhdl->set_body(3,"end case;"); |
---|
| 992 | |
---|
| 993 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_3)+" => "); |
---|
| 994 | vhdl->set_comment(2," OPCOD_3 Register-Register --"); |
---|
| 995 | |
---|
| 996 | // TYPE_3 Register-Register |
---|
| 997 | |
---|
| 998 | vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_3 is"); |
---|
| 999 | |
---|
| 1000 | vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_ADD)+" => "); |
---|
| 1001 | vhdl->set_comment(4," OPCOD_L_ADD --"); |
---|
| 1002 | |
---|
| 1003 | // TYPE_3 Register-Register |
---|
| 1004 | // OPCOD_L_ADD |
---|
| 1005 | |
---|
| 1006 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ADD)._type)+"; "); |
---|
| 1007 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ADD)._operation)+"; "); |
---|
| 1008 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1009 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1010 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1011 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1012 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1013 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1014 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1015 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1016 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1017 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); |
---|
| 1018 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); |
---|
| 1019 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1020 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1021 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1022 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1023 | |
---|
| 1024 | vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_ADDC)+" => "); |
---|
| 1025 | vhdl->set_comment(4," OPCOD_L_ADDC --"); |
---|
| 1026 | |
---|
| 1027 | // TYPE_3 Register-Register |
---|
| 1028 | // OPCOD_L_ADDC |
---|
| 1029 | |
---|
| 1030 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ADDC)._type)+"; "); |
---|
| 1031 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ADDC)._operation)+"; "); |
---|
| 1032 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1033 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1034 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1035 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1036 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1037 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '1'; "); |
---|
| 1038 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); |
---|
| 1039 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1040 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1041 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1042 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); |
---|
| 1043 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); |
---|
| 1044 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1045 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1046 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1047 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1048 | |
---|
| 1049 | vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_SUB)+" => "); |
---|
| 1050 | vhdl->set_comment(4," OPCOD_L_SUB --"); |
---|
| 1051 | |
---|
| 1052 | // TYPE_3 Register-Register |
---|
| 1053 | // OPCOD_L_SUB |
---|
| 1054 | |
---|
| 1055 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SUB)._type)+"; "); |
---|
| 1056 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SUB)._operation)+"; "); |
---|
| 1057 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1058 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1059 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1060 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1061 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1062 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1063 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1064 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1065 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1066 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); |
---|
| 1067 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); |
---|
| 1068 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1069 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1070 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1071 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1072 | |
---|
| 1073 | vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_AND)+" => "); |
---|
| 1074 | vhdl->set_comment(4," OPCOD_L_AND --"); |
---|
| 1075 | |
---|
| 1076 | // TYPE_3 Register-Register |
---|
| 1077 | // OPCOD_L_AND |
---|
| 1078 | |
---|
| 1079 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_AND)._type)+"; "); |
---|
| 1080 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_AND)._operation)+"; "); |
---|
| 1081 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1082 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1083 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1084 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1085 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1086 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1087 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1088 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1089 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 1090 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1091 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1092 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1093 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1094 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1095 | |
---|
| 1096 | vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_OR)+" => "); |
---|
| 1097 | vhdl->set_comment(4," OPCOD_L_OR --"); |
---|
| 1098 | |
---|
| 1099 | // TYPE_3 Register-Register |
---|
| 1100 | // OPCOD_L_OR |
---|
| 1101 | |
---|
| 1102 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_OR)._type)+"; "); |
---|
| 1103 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_OR)._operation)+"; "); |
---|
| 1104 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1105 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1106 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1107 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1108 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1109 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1110 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1111 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1112 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 1113 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1114 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1115 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1116 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1117 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1118 | |
---|
| 1119 | vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_XOR)+" => "); |
---|
| 1120 | vhdl->set_comment(4," OPCOD_L_XOR --"); |
---|
| 1121 | |
---|
| 1122 | // TYPE_3 Register-Register |
---|
| 1123 | // OPCOD_L_XOR |
---|
| 1124 | |
---|
| 1125 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_XOR)._type)+"; "); |
---|
| 1126 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_XOR)._operation)+"; "); |
---|
| 1127 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1128 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1129 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1130 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1131 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1132 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1133 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1134 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1135 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 1136 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1137 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1138 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1139 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1140 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1141 | |
---|
| 1142 | vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_CMOV)+" => "); |
---|
| 1143 | vhdl->set_comment(4," OPCOD_L_CMOV --"); |
---|
| 1144 | |
---|
| 1145 | // TYPE_3 Register-Register |
---|
| 1146 | // OPCOD_L_CMOV |
---|
| 1147 | |
---|
| 1148 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_CMOV)._type)+"; "); |
---|
| 1149 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_CMOV)._operation)+"; "); |
---|
| 1150 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1151 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1152 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1153 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1154 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1155 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '1'; "); |
---|
| 1156 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 1157 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1158 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1159 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 1160 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1161 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1162 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1163 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1164 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1165 | |
---|
| 1166 | vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_FF1)+" => "); |
---|
| 1167 | vhdl->set_comment(4," OPCOD_L_FF1 --"); |
---|
| 1168 | |
---|
| 1169 | // TYPE_3 Register-Register |
---|
| 1170 | // OPCOD_L_FF1 |
---|
| 1171 | |
---|
| 1172 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_FF1)._type)+"; "); |
---|
| 1173 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_FF1)._operation)+"; "); |
---|
| 1174 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1175 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1176 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1177 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 1178 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1179 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1180 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1181 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 1182 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1183 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1184 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1185 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1186 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1187 | |
---|
| 1188 | vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_FL1)+" => "); |
---|
| 1189 | vhdl->set_comment(4," OPCOD_L_FL1 --"); |
---|
| 1190 | |
---|
| 1191 | // TYPE_3 Register-Register |
---|
| 1192 | // OPCOD_L_FL1 |
---|
| 1193 | |
---|
| 1194 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_FL1)._type)+"; "); |
---|
| 1195 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_FL1)._operation)+"; "); |
---|
| 1196 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1197 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1198 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1199 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 1200 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1201 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1202 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1203 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 1204 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1205 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1206 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1207 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1208 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1209 | |
---|
| 1210 | vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_MUL)+" => "); |
---|
| 1211 | vhdl->set_comment(4," OPCOD_L_MUL --"); |
---|
| 1212 | |
---|
| 1213 | // TYPE_3 Register-Register |
---|
| 1214 | // OPCOD_L_MUL |
---|
| 1215 | |
---|
| 1216 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MUL)._type)+"; "); |
---|
| 1217 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MUL)._operation)+"; "); |
---|
| 1218 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1219 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1220 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1221 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1222 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1223 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1224 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1225 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1226 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1227 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); |
---|
| 1228 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); |
---|
| 1229 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1230 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1231 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1232 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1233 | |
---|
| 1234 | vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_DIV)+" => "); |
---|
| 1235 | vhdl->set_comment(4," OPCOD_L_DIV --"); |
---|
| 1236 | |
---|
| 1237 | // TYPE_3 Register-Register |
---|
| 1238 | // OPCOD_L_DIV |
---|
| 1239 | |
---|
| 1240 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_DIV)._type)+"; "); |
---|
| 1241 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_DIV)._operation)+"; "); |
---|
| 1242 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1243 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1244 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1245 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1246 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1247 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1248 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1249 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1250 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1251 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); |
---|
| 1252 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); |
---|
| 1253 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1254 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1255 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1256 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1257 | |
---|
| 1258 | vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_DIVU)+" => "); |
---|
| 1259 | vhdl->set_comment(4," OPCOD_L_DIVU --"); |
---|
| 1260 | |
---|
| 1261 | // TYPE_3 Register-Register |
---|
| 1262 | // OPCOD_L_DIVU |
---|
| 1263 | |
---|
| 1264 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_DIVU)._type)+"; "); |
---|
| 1265 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_DIVU)._operation)+"; "); |
---|
| 1266 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1267 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1268 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1269 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1270 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1271 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1272 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1273 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1274 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1275 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); |
---|
| 1276 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); |
---|
| 1277 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1278 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1279 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1280 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1281 | |
---|
| 1282 | vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_MULU)+" => "); |
---|
| 1283 | vhdl->set_comment(4," OPCOD_L_MULU --"); |
---|
| 1284 | |
---|
| 1285 | // TYPE_3 Register-Register |
---|
| 1286 | // OPCOD_L_MULU |
---|
| 1287 | |
---|
| 1288 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MULU)._type)+"; "); |
---|
| 1289 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MULU)._operation)+"; "); |
---|
| 1290 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1291 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1292 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1293 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1294 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1295 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1296 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1297 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1298 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1299 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; "); |
---|
| 1300 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; "); |
---|
| 1301 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1302 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1303 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1304 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1305 | |
---|
| 1306 | vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_11)+" => "); |
---|
| 1307 | vhdl->set_comment(4," OPCOD_11 Shift/Rotate with register --"); |
---|
| 1308 | |
---|
| 1309 | // TYPE_11 Shift/Rotate with register |
---|
| 1310 | |
---|
| 1311 | vhdl->set_body(5,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_11 is"); |
---|
| 1312 | |
---|
| 1313 | vhdl->set_body(6,"WHEN "+std_logic_cst(2,OPCOD_L_SLL)+" => "); |
---|
| 1314 | vhdl->set_comment(6," OPCOD_L_SLL --"); |
---|
| 1315 | |
---|
| 1316 | // TYPE_11 Shift/Rotate with register |
---|
| 1317 | // OPCOD_L_SLL |
---|
| 1318 | |
---|
| 1319 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SLL)._type)+"; "); |
---|
| 1320 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SLL)._operation)+"; "); |
---|
| 1321 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1322 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1323 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1324 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1325 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1326 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1327 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1328 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1329 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 1330 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1331 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1332 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1333 | //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1334 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1335 | |
---|
| 1336 | vhdl->set_body(6,"WHEN "+std_logic_cst(2,OPCOD_L_SRL)+" => "); |
---|
| 1337 | vhdl->set_comment(6," OPCOD_L_SRL --"); |
---|
| 1338 | |
---|
| 1339 | // TYPE_11 Shift/Rotate with register |
---|
| 1340 | // OPCOD_L_SRL |
---|
| 1341 | |
---|
| 1342 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SRL)._type)+"; "); |
---|
| 1343 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SRL)._operation)+"; "); |
---|
| 1344 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1345 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1346 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1347 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1348 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1349 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1350 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1351 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1352 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 1353 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1354 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1355 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1356 | //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1357 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1358 | |
---|
| 1359 | vhdl->set_body(6,"WHEN "+std_logic_cst(2,OPCOD_L_SRA)+" => "); |
---|
| 1360 | vhdl->set_comment(6," OPCOD_L_SRA --"); |
---|
| 1361 | |
---|
| 1362 | // TYPE_11 Shift/Rotate with register |
---|
| 1363 | // OPCOD_L_SRA |
---|
| 1364 | |
---|
| 1365 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SRA)._type)+"; "); |
---|
| 1366 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SRA)._operation)+"; "); |
---|
| 1367 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1368 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1369 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1370 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1371 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1372 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1373 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1374 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1375 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 1376 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1377 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1378 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1379 | //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1380 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1381 | |
---|
| 1382 | vhdl->set_body(6,"WHEN "+std_logic_cst(2,OPCOD_L_ROR)+" => "); |
---|
| 1383 | vhdl->set_comment(6," OPCOD_L_ROR --"); |
---|
| 1384 | |
---|
| 1385 | // TYPE_11 Shift/Rotate with register |
---|
| 1386 | // OPCOD_L_ROR |
---|
| 1387 | |
---|
| 1388 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ROR)._type)+"; "); |
---|
| 1389 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ROR)._operation)+"; "); |
---|
| 1390 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1391 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1392 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1393 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1394 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1395 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1396 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1397 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1398 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 1399 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1400 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1401 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1402 | //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1403 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1404 | |
---|
| 1405 | vhdl->set_body(6,"WHEN others => "); |
---|
| 1406 | instruction_illegale(6,i) |
---|
| 1407 | |
---|
| 1408 | // TYPE_11 Shift/Rotate with register |
---|
| 1409 | // illegal instruction |
---|
| 1410 | |
---|
| 1411 | vhdl->set_body(5,"end case;"); |
---|
| 1412 | |
---|
| 1413 | vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_12)+" => "); |
---|
| 1414 | vhdl->set_comment(4," OPCOD_12 extend --"); |
---|
| 1415 | |
---|
| 1416 | // TYPE_12 extend |
---|
| 1417 | |
---|
| 1418 | vhdl->set_body(5,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_12 is"); |
---|
| 1419 | |
---|
| 1420 | vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTHS)+" => "); |
---|
| 1421 | vhdl->set_comment(6," OPCOD_L_EXTHS --"); |
---|
| 1422 | |
---|
| 1423 | // TYPE_12 extend |
---|
| 1424 | // OPCOD_L_EXTHS |
---|
| 1425 | |
---|
| 1426 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTHS)._type)+"; "); |
---|
| 1427 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTHS)._operation)+"; "); |
---|
| 1428 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 1429 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,16)+"; "); |
---|
| 1430 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1431 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1432 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 1433 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1434 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1435 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1436 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 1437 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1438 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1439 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1440 | //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1441 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1442 | |
---|
| 1443 | vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTHZ)+" => "); |
---|
| 1444 | vhdl->set_comment(6," OPCOD_L_EXTHZ --"); |
---|
| 1445 | |
---|
| 1446 | // TYPE_12 extend |
---|
| 1447 | // OPCOD_L_EXTHZ |
---|
| 1448 | |
---|
| 1449 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTHZ)._type)+"; "); |
---|
| 1450 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTHZ)._operation)+"; "); |
---|
| 1451 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 1452 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,16)+"; "); |
---|
| 1453 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1454 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1455 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 1456 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1457 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1458 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1459 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 1460 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1461 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1462 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1463 | //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1464 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1465 | |
---|
| 1466 | vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTBS)+" => "); |
---|
| 1467 | vhdl->set_comment(6," OPCOD_L_EXTBS --"); |
---|
| 1468 | |
---|
| 1469 | // TYPE_12 extend |
---|
| 1470 | // OPCOD_L_EXTBS |
---|
| 1471 | |
---|
| 1472 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTBS)._type)+"; "); |
---|
| 1473 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTBS)._operation)+"; "); |
---|
| 1474 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 1475 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,8)+"; "); |
---|
| 1476 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1477 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1478 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 1479 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1480 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1481 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1482 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 1483 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1484 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1485 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1486 | //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1487 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1488 | |
---|
| 1489 | vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTBZ)+" => "); |
---|
| 1490 | vhdl->set_comment(6," OPCOD_L_EXTBZ --"); |
---|
| 1491 | |
---|
| 1492 | // TYPE_12 extend |
---|
| 1493 | // OPCOD_L_EXTBZ |
---|
| 1494 | |
---|
| 1495 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTBZ)._type)+"; "); |
---|
| 1496 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTBZ)._operation)+"; "); |
---|
| 1497 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 1498 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,8)+"; "); |
---|
| 1499 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1500 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1501 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 1502 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1503 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1504 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1505 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 1506 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1507 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1508 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1509 | //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1510 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1511 | |
---|
| 1512 | vhdl->set_body(6,"WHEN others => "); |
---|
| 1513 | instruction_illegale(6,i) |
---|
| 1514 | |
---|
| 1515 | // TYPE_12 extend |
---|
| 1516 | // illegal instruction |
---|
| 1517 | |
---|
| 1518 | vhdl->set_body(5,"end case;"); |
---|
| 1519 | |
---|
| 1520 | vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_13)+" => "); |
---|
| 1521 | vhdl->set_comment(4," OPCOD_13 extend (64b) --"); |
---|
| 1522 | |
---|
| 1523 | // TYPE_13 extend (64b) |
---|
| 1524 | |
---|
| 1525 | vhdl->set_body(5,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_13 is"); |
---|
| 1526 | |
---|
| 1527 | vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTWS)+" => "); |
---|
| 1528 | vhdl->set_comment(6," OPCOD_L_EXTWS --"); |
---|
| 1529 | |
---|
| 1530 | // TYPE_13 extend (64b) |
---|
| 1531 | // OPCOD_L_EXTWS |
---|
| 1532 | |
---|
| 1533 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTWS)._type)+"; "); |
---|
| 1534 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTWS)._operation)+"; "); |
---|
| 1535 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 1536 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,32)+"; "); |
---|
| 1537 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1538 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1539 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 1540 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1541 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1542 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1543 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 1544 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1545 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1546 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1547 | //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1548 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1549 | |
---|
| 1550 | vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTWZ)+" => "); |
---|
| 1551 | vhdl->set_comment(6," OPCOD_L_EXTWZ --"); |
---|
| 1552 | |
---|
| 1553 | // TYPE_13 extend (64b) |
---|
| 1554 | // OPCOD_L_EXTWZ |
---|
| 1555 | |
---|
| 1556 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTWZ)._type)+"; "); |
---|
| 1557 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTWZ)._operation)+"; "); |
---|
| 1558 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 1559 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,32)+"; "); |
---|
| 1560 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1561 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1562 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 1563 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1564 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 1565 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 1566 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 1567 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1568 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1569 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1570 | //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1571 | vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1572 | |
---|
| 1573 | vhdl->set_body(6,"WHEN others => "); |
---|
| 1574 | instruction_illegale(6,i) |
---|
| 1575 | |
---|
| 1576 | // TYPE_13 extend (64b) |
---|
| 1577 | // illegal instruction |
---|
| 1578 | |
---|
| 1579 | vhdl->set_body(5,"end case;"); |
---|
| 1580 | |
---|
| 1581 | vhdl->set_body(4,"WHEN others => "); |
---|
| 1582 | instruction_illegale(4,i) |
---|
| 1583 | |
---|
| 1584 | // TYPE_3 Register-Register |
---|
| 1585 | // illegal instruction |
---|
| 1586 | |
---|
| 1587 | vhdl->set_body(3,"end case;"); |
---|
| 1588 | |
---|
| 1589 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_4)+" => "); |
---|
| 1590 | vhdl->set_comment(2," OPCOD_4 Set flag with register --"); |
---|
| 1591 | |
---|
| 1592 | // TYPE_4 Set flag with register |
---|
| 1593 | |
---|
| 1594 | vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_4 is"); |
---|
| 1595 | |
---|
| 1596 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFEQ)+" => "); |
---|
| 1597 | vhdl->set_comment(4," OPCOD_L_SFEQ --"); |
---|
| 1598 | |
---|
| 1599 | // TYPE_4 Set flag with register |
---|
| 1600 | // OPCOD_L_SFEQ |
---|
| 1601 | |
---|
| 1602 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFEQ)._type)+"; "); |
---|
| 1603 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFEQ)._operation)+"; "); |
---|
| 1604 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1605 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1606 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1607 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1608 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1609 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1610 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 1611 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1612 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 1613 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1614 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1615 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1616 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1617 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1618 | |
---|
| 1619 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFNE)+" => "); |
---|
| 1620 | vhdl->set_comment(4," OPCOD_L_SFNE --"); |
---|
| 1621 | |
---|
| 1622 | // TYPE_4 Set flag with register |
---|
| 1623 | // OPCOD_L_SFNE |
---|
| 1624 | |
---|
| 1625 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFNE)._type)+"; "); |
---|
| 1626 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFNE)._operation)+"; "); |
---|
| 1627 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1628 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1629 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1630 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1631 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1632 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1633 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 1634 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1635 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 1636 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1637 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1638 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1639 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1640 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1641 | |
---|
| 1642 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGTU)+" => "); |
---|
| 1643 | vhdl->set_comment(4," OPCOD_L_SFGTU --"); |
---|
| 1644 | |
---|
| 1645 | // TYPE_4 Set flag with register |
---|
| 1646 | // OPCOD_L_SFGTU |
---|
| 1647 | |
---|
| 1648 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGTU)._type)+"; "); |
---|
| 1649 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGTU)._operation)+"; "); |
---|
| 1650 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1651 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1652 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1653 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1654 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1655 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1656 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 1657 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1658 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 1659 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1660 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1661 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1662 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1663 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1664 | |
---|
| 1665 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGEU)+" => "); |
---|
| 1666 | vhdl->set_comment(4," OPCOD_L_SFGEU --"); |
---|
| 1667 | |
---|
| 1668 | // TYPE_4 Set flag with register |
---|
| 1669 | // OPCOD_L_SFGEU |
---|
| 1670 | |
---|
| 1671 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGEU)._type)+"; "); |
---|
| 1672 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGEU)._operation)+"; "); |
---|
| 1673 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1674 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1675 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1676 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1677 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1678 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1679 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 1680 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1681 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 1682 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1683 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1684 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1685 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1686 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1687 | |
---|
| 1688 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLTU)+" => "); |
---|
| 1689 | vhdl->set_comment(4," OPCOD_L_SFLTU --"); |
---|
| 1690 | |
---|
| 1691 | // TYPE_4 Set flag with register |
---|
| 1692 | // OPCOD_L_SFLTU |
---|
| 1693 | |
---|
| 1694 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLTU)._type)+"; "); |
---|
| 1695 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLTU)._operation)+"; "); |
---|
| 1696 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1697 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1698 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1699 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1700 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1701 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1702 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 1703 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1704 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 1705 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1706 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1707 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1708 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1709 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1710 | |
---|
| 1711 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLEU)+" => "); |
---|
| 1712 | vhdl->set_comment(4," OPCOD_L_SFLEU --"); |
---|
| 1713 | |
---|
| 1714 | // TYPE_4 Set flag with register |
---|
| 1715 | // OPCOD_L_SFLEU |
---|
| 1716 | |
---|
| 1717 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLEU)._type)+"; "); |
---|
| 1718 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLEU)._operation)+"; "); |
---|
| 1719 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1720 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1721 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1722 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1723 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1724 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1725 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 1726 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1727 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 1728 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1729 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1730 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1731 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1732 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1733 | |
---|
| 1734 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGTS)+" => "); |
---|
| 1735 | vhdl->set_comment(4," OPCOD_L_SFGTS --"); |
---|
| 1736 | |
---|
| 1737 | // TYPE_4 Set flag with register |
---|
| 1738 | // OPCOD_L_SFGTS |
---|
| 1739 | |
---|
| 1740 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGTS)._type)+"; "); |
---|
| 1741 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGTS)._operation)+"; "); |
---|
| 1742 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1743 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1744 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1745 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1746 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1747 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1748 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 1749 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1750 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 1751 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1752 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1753 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1754 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1755 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1756 | |
---|
| 1757 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGES)+" => "); |
---|
| 1758 | vhdl->set_comment(4," OPCOD_L_SFGES --"); |
---|
| 1759 | |
---|
| 1760 | // TYPE_4 Set flag with register |
---|
| 1761 | // OPCOD_L_SFGES |
---|
| 1762 | |
---|
| 1763 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGES)._type)+"; "); |
---|
| 1764 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGES)._operation)+"; "); |
---|
| 1765 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1766 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1767 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1768 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1769 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1770 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1771 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 1772 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1773 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 1774 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1775 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1776 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1777 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1778 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1779 | |
---|
| 1780 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLTS)+" => "); |
---|
| 1781 | vhdl->set_comment(4," OPCOD_L_SFLTS --"); |
---|
| 1782 | |
---|
| 1783 | // TYPE_4 Set flag with register |
---|
| 1784 | // OPCOD_L_SFLTS |
---|
| 1785 | |
---|
| 1786 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLTS)._type)+"; "); |
---|
| 1787 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLTS)._operation)+"; "); |
---|
| 1788 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1789 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1790 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1791 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1792 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1793 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1794 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 1795 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1796 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 1797 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1798 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1799 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1800 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1801 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1802 | |
---|
| 1803 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLES)+" => "); |
---|
| 1804 | vhdl->set_comment(4," OPCOD_L_SFLES --"); |
---|
| 1805 | |
---|
| 1806 | // TYPE_4 Set flag with register |
---|
| 1807 | // OPCOD_L_SFLES |
---|
| 1808 | |
---|
| 1809 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLES)._type)+"; "); |
---|
| 1810 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLES)._operation)+"; "); |
---|
| 1811 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 1812 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1813 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1814 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 1815 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 1816 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1817 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 1818 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1819 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 1820 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1821 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1822 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1823 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1824 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1825 | |
---|
| 1826 | vhdl->set_body(4,"WHEN others => "); |
---|
| 1827 | instruction_illegale(4,i) |
---|
| 1828 | |
---|
| 1829 | // TYPE_4 Set flag with register |
---|
| 1830 | // illegal instruction |
---|
| 1831 | |
---|
| 1832 | vhdl->set_body(3,"end case;"); |
---|
| 1833 | |
---|
| 1834 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_5)+" => "); |
---|
| 1835 | vhdl->set_comment(2," OPCOD_5 Set flag with immediat --"); |
---|
| 1836 | |
---|
| 1837 | // TYPE_5 Set flag with immediat |
---|
| 1838 | |
---|
| 1839 | vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_5 is"); |
---|
| 1840 | |
---|
| 1841 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFEQI)+" => "); |
---|
| 1842 | vhdl->set_comment(4," OPCOD_L_SFEQI --"); |
---|
| 1843 | |
---|
| 1844 | // TYPE_5 Set flag with immediat |
---|
| 1845 | // OPCOD_L_SFEQI |
---|
| 1846 | |
---|
| 1847 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFEQI)._type)+"; "); |
---|
| 1848 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFEQI)._operation)+"; "); |
---|
| 1849 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 1850 | extend_signal = ""; |
---|
| 1851 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 1852 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 1853 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1854 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1855 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 1856 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1857 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 1858 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1859 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 1860 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1861 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1862 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1863 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1864 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1865 | |
---|
| 1866 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFNEI)+" => "); |
---|
| 1867 | vhdl->set_comment(4," OPCOD_L_SFNEI --"); |
---|
| 1868 | |
---|
| 1869 | // TYPE_5 Set flag with immediat |
---|
| 1870 | // OPCOD_L_SFNEI |
---|
| 1871 | |
---|
| 1872 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFNEI)._type)+"; "); |
---|
| 1873 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFNEI)._operation)+"; "); |
---|
| 1874 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 1875 | extend_signal = ""; |
---|
| 1876 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 1877 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 1878 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1879 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1880 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 1881 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1882 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 1883 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1884 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 1885 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1886 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1887 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1888 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1889 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1890 | |
---|
| 1891 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGTUI)+" => "); |
---|
| 1892 | vhdl->set_comment(4," OPCOD_L_SFGTUI --"); |
---|
| 1893 | |
---|
| 1894 | // TYPE_5 Set flag with immediat |
---|
| 1895 | // OPCOD_L_SFGTUI |
---|
| 1896 | |
---|
| 1897 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGTUI)._type)+"; "); |
---|
| 1898 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGTUI)._operation)+"; "); |
---|
| 1899 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 1900 | extend_signal = ""; |
---|
| 1901 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 1902 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 1903 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1904 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1905 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 1906 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1907 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 1908 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1909 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 1910 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1911 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1912 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1913 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1914 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1915 | |
---|
| 1916 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGEUI)+" => "); |
---|
| 1917 | vhdl->set_comment(4," OPCOD_L_SFGEUI --"); |
---|
| 1918 | |
---|
| 1919 | // TYPE_5 Set flag with immediat |
---|
| 1920 | // OPCOD_L_SFGEUI |
---|
| 1921 | |
---|
| 1922 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGEUI)._type)+"; "); |
---|
| 1923 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGEUI)._operation)+"; "); |
---|
| 1924 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 1925 | extend_signal = ""; |
---|
| 1926 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 1927 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 1928 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1929 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1930 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 1931 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1932 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 1933 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1934 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 1935 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1936 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1937 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1938 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1939 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1940 | |
---|
| 1941 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLTUI)+" => "); |
---|
| 1942 | vhdl->set_comment(4," OPCOD_L_SFLTUI --"); |
---|
| 1943 | |
---|
| 1944 | // TYPE_5 Set flag with immediat |
---|
| 1945 | // OPCOD_L_SFLTUI |
---|
| 1946 | |
---|
| 1947 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLTUI)._type)+"; "); |
---|
| 1948 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLTUI)._operation)+"; "); |
---|
| 1949 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 1950 | extend_signal = ""; |
---|
| 1951 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 1952 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 1953 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1954 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1955 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 1956 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1957 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 1958 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1959 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 1960 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1961 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1962 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1963 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1964 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1965 | |
---|
| 1966 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLEUI)+" => "); |
---|
| 1967 | vhdl->set_comment(4," OPCOD_L_SFLEUI --"); |
---|
| 1968 | |
---|
| 1969 | // TYPE_5 Set flag with immediat |
---|
| 1970 | // OPCOD_L_SFLEUI |
---|
| 1971 | |
---|
| 1972 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLEUI)._type)+"; "); |
---|
| 1973 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLEUI)._operation)+"; "); |
---|
| 1974 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 1975 | extend_signal = ""; |
---|
| 1976 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 1977 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 1978 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 1979 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 1980 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 1981 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 1982 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 1983 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 1984 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 1985 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 1986 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 1987 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 1988 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 1989 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 1990 | |
---|
| 1991 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGTSI)+" => "); |
---|
| 1992 | vhdl->set_comment(4," OPCOD_L_SFGTSI --"); |
---|
| 1993 | |
---|
| 1994 | // TYPE_5 Set flag with immediat |
---|
| 1995 | // OPCOD_L_SFGTSI |
---|
| 1996 | |
---|
| 1997 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGTSI)._type)+"; "); |
---|
| 1998 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGTSI)._operation)+"; "); |
---|
| 1999 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 2000 | extend_signal = ""; |
---|
| 2001 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 2002 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 2003 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 2004 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 2005 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 2006 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2007 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 2008 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 2009 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 2010 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 2011 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 2012 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 2013 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2014 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 2015 | |
---|
| 2016 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGESI)+" => "); |
---|
| 2017 | vhdl->set_comment(4," OPCOD_L_SFGESI --"); |
---|
| 2018 | |
---|
| 2019 | // TYPE_5 Set flag with immediat |
---|
| 2020 | // OPCOD_L_SFGESI |
---|
| 2021 | |
---|
| 2022 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGESI)._type)+"; "); |
---|
| 2023 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGESI)._operation)+"; "); |
---|
| 2024 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 2025 | extend_signal = ""; |
---|
| 2026 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 2027 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 2028 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 2029 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 2030 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 2031 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2032 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 2033 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 2034 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 2035 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 2036 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 2037 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 2038 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2039 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 2040 | |
---|
| 2041 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLTSI)+" => "); |
---|
| 2042 | vhdl->set_comment(4," OPCOD_L_SFLTSI --"); |
---|
| 2043 | |
---|
| 2044 | // TYPE_5 Set flag with immediat |
---|
| 2045 | // OPCOD_L_SFLTSI |
---|
| 2046 | |
---|
| 2047 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLTSI)._type)+"; "); |
---|
| 2048 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLTSI)._operation)+"; "); |
---|
| 2049 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 2050 | extend_signal = ""; |
---|
| 2051 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 2052 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 2053 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 2054 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 2055 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 2056 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2057 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 2058 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 2059 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 2060 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 2061 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 2062 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 2063 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2064 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 2065 | |
---|
| 2066 | vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLESI)+" => "); |
---|
| 2067 | vhdl->set_comment(4," OPCOD_L_SFLESI --"); |
---|
| 2068 | |
---|
| 2069 | // TYPE_5 Set flag with immediat |
---|
| 2070 | // OPCOD_L_SFLESI |
---|
| 2071 | |
---|
| 2072 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLESI)._type)+"; "); |
---|
| 2073 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLESI)._operation)+"; "); |
---|
| 2074 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 2075 | extend_signal = ""; |
---|
| 2076 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & "; |
---|
| 2077 | vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 2078 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 2079 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 2080 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 2081 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2082 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 2083 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; "); |
---|
| 2084 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; "); |
---|
| 2085 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 2086 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 2087 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 2088 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2089 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 2090 | |
---|
| 2091 | vhdl->set_body(4,"WHEN others => "); |
---|
| 2092 | instruction_illegale(4,i) |
---|
| 2093 | |
---|
| 2094 | // TYPE_5 Set flag with immediat |
---|
| 2095 | // illegal instruction |
---|
| 2096 | |
---|
| 2097 | vhdl->set_body(3,"end case;"); |
---|
| 2098 | |
---|
| 2099 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_6)+" => "); |
---|
| 2100 | vhdl->set_comment(2," OPCOD_6 Shift/Rotate with immediat --"); |
---|
| 2101 | |
---|
| 2102 | // TYPE_6 Shift/Rotate with immediat |
---|
| 2103 | |
---|
| 2104 | vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_6 is"); |
---|
| 2105 | |
---|
| 2106 | vhdl->set_body(4,"WHEN "+std_logic_cst(2,OPCOD_L_SLLI)+" => "); |
---|
| 2107 | vhdl->set_comment(4," OPCOD_L_SLLI --"); |
---|
| 2108 | |
---|
| 2109 | // TYPE_6 Shift/Rotate with immediat |
---|
| 2110 | // OPCOD_L_SLLI |
---|
| 2111 | |
---|
| 2112 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SLLI)._type)+"; "); |
---|
| 2113 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SLLI)._operation)+"; "); |
---|
| 2114 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 2115 | extend_signal = ""; |
---|
| 2116 | for(uint32_t cp = 0;cp < _param->_size_general_data - 6;cp++) extend_signal += "0"; |
---|
| 2117 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (5 downto 0); "); |
---|
| 2118 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 2119 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 2120 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 2121 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2122 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 2123 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 2124 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 2125 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 2126 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 2127 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 2128 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2129 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 2130 | |
---|
| 2131 | vhdl->set_body(4,"WHEN "+std_logic_cst(2,OPCOD_L_SRLI)+" => "); |
---|
| 2132 | vhdl->set_comment(4," OPCOD_L_SRLI --"); |
---|
| 2133 | |
---|
| 2134 | // TYPE_6 Shift/Rotate with immediat |
---|
| 2135 | // OPCOD_L_SRLI |
---|
| 2136 | |
---|
| 2137 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SRLI)._type)+"; "); |
---|
| 2138 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SRLI)._operation)+"; "); |
---|
| 2139 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 2140 | extend_signal = ""; |
---|
| 2141 | for(uint32_t cp = 0;cp < _param->_size_general_data - 6;cp++) extend_signal += "0"; |
---|
| 2142 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (5 downto 0); "); |
---|
| 2143 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 2144 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 2145 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 2146 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2147 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 2148 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 2149 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 2150 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 2151 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 2152 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 2153 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2154 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 2155 | |
---|
| 2156 | vhdl->set_body(4,"WHEN "+std_logic_cst(2,OPCOD_L_SRAI)+" => "); |
---|
| 2157 | vhdl->set_comment(4," OPCOD_L_SRAI --"); |
---|
| 2158 | |
---|
| 2159 | // TYPE_6 Shift/Rotate with immediat |
---|
| 2160 | // OPCOD_L_SRAI |
---|
| 2161 | |
---|
| 2162 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SRAI)._type)+"; "); |
---|
| 2163 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SRAI)._operation)+"; "); |
---|
| 2164 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 2165 | extend_signal = ""; |
---|
| 2166 | for(uint32_t cp = 0;cp < _param->_size_general_data - 6;cp++) extend_signal += "0"; |
---|
| 2167 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (5 downto 0); "); |
---|
| 2168 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 2169 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 2170 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 2171 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2172 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 2173 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 2174 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 2175 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 2176 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 2177 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 2178 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2179 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 2180 | |
---|
| 2181 | vhdl->set_body(4,"WHEN "+std_logic_cst(2,OPCOD_L_RORI)+" => "); |
---|
| 2182 | vhdl->set_comment(4," OPCOD_L_RORI --"); |
---|
| 2183 | |
---|
| 2184 | // TYPE_6 Shift/Rotate with immediat |
---|
| 2185 | // OPCOD_L_RORI |
---|
| 2186 | |
---|
| 2187 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_RORI)._type)+"; "); |
---|
| 2188 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_RORI)._operation)+"; "); |
---|
| 2189 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 2190 | extend_signal = ""; |
---|
| 2191 | for(uint32_t cp = 0;cp < _param->_size_general_data - 6;cp++) extend_signal += "0"; |
---|
| 2192 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (5 downto 0); "); |
---|
| 2193 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 2194 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 2195 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 2196 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2197 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 2198 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 2199 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 2200 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 2201 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 2202 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 2203 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2204 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 2205 | |
---|
| 2206 | vhdl->set_body(4,"WHEN others => "); |
---|
| 2207 | instruction_illegale(4,i) |
---|
| 2208 | |
---|
| 2209 | // TYPE_6 Shift/Rotate with immediat |
---|
| 2210 | // illegal instruction |
---|
| 2211 | |
---|
| 2212 | vhdl->set_body(3,"end case;"); |
---|
| 2213 | |
---|
| 2214 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_7)+" => "); |
---|
| 2215 | vhdl->set_comment(2," OPCOD_7 multiply with HI-LO --"); |
---|
| 2216 | |
---|
| 2217 | // TYPE_7 multiply with HI-LO |
---|
| 2218 | |
---|
| 2219 | vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_7 is"); |
---|
| 2220 | |
---|
| 2221 | vhdl->set_body(4,"WHEN "+std_logic_cst(4,OPCOD_L_MAC)+" => "); |
---|
| 2222 | vhdl->set_comment(4," OPCOD_L_MAC --"); |
---|
| 2223 | |
---|
| 2224 | // TYPE_7 multiply with HI-LO |
---|
| 2225 | // OPCOD_L_MAC |
---|
| 2226 | |
---|
| 2227 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MAC)._type)+"; "); |
---|
| 2228 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MAC)._operation)+"; "); |
---|
| 2229 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 2230 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 2231 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 2232 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 2233 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 2234 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2235 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 2236 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 2237 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 2238 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 2239 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 2240 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2241 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; "); |
---|
| 2242 | |
---|
| 2243 | vhdl->set_body(4,"WHEN "+std_logic_cst(4,OPCOD_L_MSB)+" => "); |
---|
| 2244 | vhdl->set_comment(4," OPCOD_L_MSB --"); |
---|
| 2245 | |
---|
| 2246 | // TYPE_7 multiply with HI-LO |
---|
| 2247 | // OPCOD_L_MSB |
---|
| 2248 | |
---|
| 2249 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MSB)._type)+"; "); |
---|
| 2250 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MSB)._operation)+"; "); |
---|
| 2251 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 2252 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; "); |
---|
| 2253 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); "); |
---|
| 2254 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; "); |
---|
| 2255 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); "); |
---|
| 2256 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2257 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 2258 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 2259 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 2260 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 2261 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 2262 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2263 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; "); |
---|
| 2264 | |
---|
| 2265 | vhdl->set_body(4,"WHEN others => "); |
---|
| 2266 | instruction_illegale(4,i) |
---|
| 2267 | |
---|
| 2268 | // TYPE_7 multiply with HI-LO |
---|
| 2269 | // illegal instruction |
---|
| 2270 | |
---|
| 2271 | vhdl->set_body(3,"end case;"); |
---|
| 2272 | |
---|
| 2273 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_8)+" => "); |
---|
| 2274 | vhdl->set_comment(2," OPCOD_8 acces at HI-LO --"); |
---|
| 2275 | |
---|
| 2276 | // TYPE_8 acces at HI-LO |
---|
| 2277 | |
---|
| 2278 | vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_8 is"); |
---|
| 2279 | |
---|
| 2280 | vhdl->set_body(4,"WHEN "+std_logic_cst(1,OPCOD_L_MOVHI)+" => "); |
---|
| 2281 | vhdl->set_comment(4," OPCOD_L_MOVHI --"); |
---|
| 2282 | |
---|
| 2283 | // TYPE_8 acces at HI-LO |
---|
| 2284 | // OPCOD_L_MOVHI |
---|
| 2285 | |
---|
| 2286 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MOVHI)._type)+"; "); |
---|
| 2287 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MOVHI)._operation)+"; "); |
---|
| 2288 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 2289 | extend_signal = ""; |
---|
| 2290 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0"; |
---|
| 2291 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 2292 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); |
---|
| 2293 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 2294 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2295 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 2296 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 2297 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 2298 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 2299 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 2300 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 2301 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2302 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 2303 | |
---|
| 2304 | vhdl->set_body(4,"WHEN "+std_logic_cst(1,OPCOD_L_MACRC)+" => "); |
---|
| 2305 | vhdl->set_comment(4," OPCOD_L_MACRC --"); |
---|
| 2306 | |
---|
| 2307 | // TYPE_8 acces at HI-LO |
---|
| 2308 | // OPCOD_L_MACRC |
---|
| 2309 | |
---|
| 2310 | vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 0) = \"0000000000000000\" then "); |
---|
| 2311 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MACRC)._type)+"; "); |
---|
| 2312 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MACRC)._operation)+"; "); |
---|
| 2313 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 2314 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); |
---|
| 2315 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 2316 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2317 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; "); |
---|
| 2318 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); "); |
---|
| 2319 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 2320 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 2321 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 2322 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 2323 | //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2324 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; "); |
---|
| 2325 | vhdl->set_body(5,"else "); |
---|
| 2326 | instruction_illegale(6,i) |
---|
| 2327 | // illegal instruction |
---|
| 2328 | vhdl->set_body(5,"end if; "); |
---|
| 2329 | |
---|
| 2330 | vhdl->set_body(4,"WHEN others => "); |
---|
| 2331 | instruction_illegale(4,i) |
---|
| 2332 | |
---|
| 2333 | // TYPE_8 acces at HI-LO |
---|
| 2334 | // illegal instruction |
---|
| 2335 | |
---|
| 2336 | vhdl->set_body(3,"end case;"); |
---|
| 2337 | |
---|
| 2338 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_9)+" => "); |
---|
| 2339 | vhdl->set_comment(2," OPCOD_9 special --"); |
---|
| 2340 | |
---|
| 2341 | // TYPE_9 special |
---|
| 2342 | |
---|
| 2343 | vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_9 is"); |
---|
| 2344 | |
---|
| 2345 | vhdl->set_body(4,"WHEN "+std_logic_cst(3,OPCOD_L_SYS)+" => "); |
---|
| 2346 | vhdl->set_comment(4," OPCOD_L_SYS --"); |
---|
| 2347 | |
---|
| 2348 | // TYPE_9 special |
---|
| 2349 | // OPCOD_L_SYS |
---|
| 2350 | |
---|
| 2351 | vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(22 downto 16) = \"0000000\" then "); |
---|
| 2352 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SYS)._type)+"; "); |
---|
| 2353 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SYS)._operation)+"; "); |
---|
| 2354 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 2355 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); |
---|
| 2356 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 2357 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2358 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 2359 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 2360 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_SYSCALL)+"; "); |
---|
| 2361 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_SYSCALL)+"; "); |
---|
| 2362 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '1'; "); |
---|
| 2363 | //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2364 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_EXCEPTION)+"; "); |
---|
| 2365 | vhdl->set_body(5,"else "); |
---|
| 2366 | instruction_illegale(6,i) |
---|
| 2367 | // illegal instruction |
---|
| 2368 | vhdl->set_body(5,"end if; "); |
---|
| 2369 | |
---|
| 2370 | vhdl->set_body(4,"WHEN "+std_logic_cst(3,OPCOD_L_TRAP)+" => "); |
---|
| 2371 | vhdl->set_comment(4," OPCOD_L_TRAP --"); |
---|
| 2372 | |
---|
| 2373 | // TYPE_9 special |
---|
| 2374 | // OPCOD_L_TRAP |
---|
| 2375 | |
---|
| 2376 | vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(22 downto 16) = \"0000000\" then "); |
---|
| 2377 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_TRAP)._type)+"; "); |
---|
| 2378 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_TRAP)._operation)+"; "); |
---|
| 2379 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; "); |
---|
| 2380 | extend_signal = ""; |
---|
| 2381 | for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0"; |
---|
| 2382 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); "); |
---|
| 2383 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); |
---|
| 2384 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 2385 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2386 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 2387 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 2388 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_TRAP)+"; "); |
---|
| 2389 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 2390 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '1'; "); |
---|
| 2391 | //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2392 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 2393 | vhdl->set_body(5,"else "); |
---|
| 2394 | instruction_illegale(6,i) |
---|
| 2395 | // illegal instruction |
---|
| 2396 | vhdl->set_body(5,"end if; "); |
---|
| 2397 | |
---|
| 2398 | vhdl->set_body(4,"WHEN "+std_logic_cst(3,OPCOD_L_MSYNC)+" => "); |
---|
| 2399 | vhdl->set_comment(4," OPCOD_L_MSYNC --"); |
---|
| 2400 | |
---|
| 2401 | // TYPE_9 special |
---|
| 2402 | // OPCOD_L_MSYNC |
---|
| 2403 | |
---|
| 2404 | vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(22 downto 0) = \"00000000000000000000000\" then "); |
---|
| 2405 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MSYNC)._type)+"; "); |
---|
| 2406 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MSYNC)._operation)+"; "); |
---|
| 2407 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 2408 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); |
---|
| 2409 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 2410 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2411 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 2412 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 2413 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 2414 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 2415 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 2416 | //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2417 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_MSYNC)+"; "); |
---|
| 2418 | vhdl->set_body(5,"else "); |
---|
| 2419 | instruction_illegale(6,i) |
---|
| 2420 | // illegal instruction |
---|
| 2421 | vhdl->set_body(5,"end if; "); |
---|
| 2422 | |
---|
| 2423 | vhdl->set_body(4,"WHEN "+std_logic_cst(3,OPCOD_L_PSYNC)+" => "); |
---|
| 2424 | vhdl->set_comment(4," OPCOD_L_PSYNC --"); |
---|
| 2425 | |
---|
| 2426 | // TYPE_9 special |
---|
| 2427 | // OPCOD_L_PSYNC |
---|
| 2428 | |
---|
| 2429 | vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(22 downto 0) = \"00000000000000000000000\" then "); |
---|
| 2430 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_PSYNC)._type)+"; "); |
---|
| 2431 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_PSYNC)._operation)+"; "); |
---|
| 2432 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 2433 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); |
---|
| 2434 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 2435 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2436 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 2437 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 2438 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 2439 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 2440 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 2441 | //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2442 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_PSYNC)+"; "); |
---|
| 2443 | vhdl->set_body(5,"else "); |
---|
| 2444 | instruction_illegale(6,i) |
---|
| 2445 | // illegal instruction |
---|
| 2446 | vhdl->set_body(5,"end if; "); |
---|
| 2447 | |
---|
| 2448 | vhdl->set_body(4,"WHEN "+std_logic_cst(3,OPCOD_L_CSYNC)+" => "); |
---|
| 2449 | vhdl->set_comment(4," OPCOD_L_CSYNC --"); |
---|
| 2450 | |
---|
| 2451 | // TYPE_9 special |
---|
| 2452 | // OPCOD_L_CSYNC |
---|
| 2453 | |
---|
| 2454 | vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(23) = '0' then "); |
---|
| 2455 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_CSYNC)._type)+"; "); |
---|
| 2456 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_CSYNC)._operation)+"; "); |
---|
| 2457 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 2458 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); |
---|
| 2459 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 2460 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2461 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 2462 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 2463 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 2464 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 2465 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; "); |
---|
| 2466 | //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2467 | vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_CSYNC)+"; "); |
---|
| 2468 | vhdl->set_body(5,"else "); |
---|
| 2469 | instruction_illegale(6,i) |
---|
| 2470 | // illegal instruction |
---|
| 2471 | vhdl->set_body(5,"end if; "); |
---|
| 2472 | |
---|
| 2473 | vhdl->set_body(4,"WHEN others => "); |
---|
| 2474 | instruction_illegale(4,i) |
---|
| 2475 | |
---|
| 2476 | // TYPE_9 special |
---|
| 2477 | // illegal instruction |
---|
| 2478 | |
---|
| 2479 | vhdl->set_body(3,"end case;"); |
---|
| 2480 | |
---|
| 2481 | vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_10)+" => "); |
---|
| 2482 | vhdl->set_comment(2," OPCOD_10 no operation --"); |
---|
| 2483 | |
---|
| 2484 | // TYPE_10 no operation |
---|
| 2485 | |
---|
| 2486 | vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_10 is"); |
---|
| 2487 | |
---|
| 2488 | vhdl->set_body(4,"WHEN "+std_logic_cst(2,OPCOD_L_NOP)+" => "); |
---|
| 2489 | vhdl->set_comment(4," OPCOD_L_NOP --"); |
---|
| 2490 | |
---|
| 2491 | // TYPE_10 no operation |
---|
| 2492 | // OPCOD_L_NOP |
---|
| 2493 | |
---|
| 2494 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_NOP)._type)+"; "); |
---|
| 2495 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_NOP)._operation)+"; "); |
---|
| 2496 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; "); |
---|
| 2497 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; "); |
---|
| 2498 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; "); |
---|
| 2499 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; "); |
---|
| 2500 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; "); |
---|
| 2501 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; "); |
---|
| 2502 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; "); |
---|
| 2503 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; "); |
---|
| 2504 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '1'; "); |
---|
| 2505 | //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; "); |
---|
| 2506 | vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; "); |
---|
| 2507 | |
---|
| 2508 | vhdl->set_body(4,"WHEN others => "); |
---|
| 2509 | instruction_illegale(4,i) |
---|
| 2510 | |
---|
| 2511 | // TYPE_10 no operation |
---|
| 2512 | // illegal instruction |
---|
| 2513 | |
---|
| 2514 | vhdl->set_body(3,"end case;"); |
---|
| 2515 | |
---|
| 2516 | vhdl->set_body(2,"WHEN others => "); |
---|
| 2517 | instruction_illegale(2,i) |
---|
| 2518 | |
---|
| 2519 | // TYPE_0 IMMEDIAT |
---|
| 2520 | // illegal instruction |
---|
| 2521 | |
---|
| 2522 | vhdl->set_body(1,"end case;"); |
---|
| 2523 | vhdl->set_body(0,"end process case_DECOD_INST_"+toString(i)+";"); |
---|
| 2524 | vhdl->set_body(0,""); |
---|
| 2525 | |
---|
| 2526 | |
---|
| 2527 | } |
---|
| 2528 | |
---|
| 2529 | vhdl->set_body(0,""); |
---|
| 2530 | vhdl->set_comment(0,"-----------------------------------"); |
---|
| 2531 | vhdl->set_comment(0,"-- Registers "); |
---|
| 2532 | vhdl->set_comment(0,"-----------------------------------"); |
---|
| 2533 | vhdl->set_body(0,""); |
---|
| 2534 | |
---|
| 2535 | vhdl->set_body(0,"reg_DECOD : process (in_CLOCK)"); |
---|
| 2536 | vhdl->set_body(0,"begin"); |
---|
| 2537 | vhdl->set_body(1,"if in_CLOCK'event AND in_CLOCK = '1' then"); |
---|
| 2538 | vhdl->set_body(2,"if in_NRESET = '0' then"); |
---|
| 2539 | |
---|
| 2540 | for(uint32_t i = 0;i < _param->_nb_context;i++){ |
---|
| 2541 | vhdl->set_body(3,"reg_CONTEXT_"+toString(i)+"_ADDRESS_PREVIOUS <= "+std_logic_cst(_param->_size_instruction_address,0xfc)+";"); |
---|
| 2542 | vhdl->set_body(3,"reg_CONTEXT_"+toString(i)+"_IS_DELAY_SLOT <= '0';"); |
---|
| 2543 | } |
---|
| 2544 | |
---|
| 2545 | vhdl->set_body(2,"else"); |
---|
| 2546 | |
---|
| 2547 | for(uint32_t i = 0;i < _param->_nb_context;i++){ |
---|
| 2548 | vhdl->set_body(3,"if internal_CONTEXT_"+toString(i)+"_HAVE_TRANSACTION = '1' then"); |
---|
| 2549 | |
---|
| 2550 | vhdl->set_body(4,"reg_CONTEXT_"+toString(i)+"_ADDRESS_PREVIOUS <= internal_CONTEXT_"+toString(i)+"_ADDRESS_PREVIOUS ;"); |
---|
| 2551 | vhdl->set_body(4,"if internal_DECOD_INSTRUCTION_"+toString(_param->_nb_inst_decod - 1)+"_TYPE = "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" then"); |
---|
| 2552 | vhdl->set_body(5,"reg_CONTEXT_"+toString(i)+"_IS_DELAY_SLOT <= '1';"); |
---|
| 2553 | vhdl->set_body(4,"else"); |
---|
| 2554 | vhdl->set_body(5,"reg_CONTEXT_"+toString(i)+"_IS_DELAY_SLOT <= '0';"); |
---|
| 2555 | vhdl->set_body(4,"end if;"); |
---|
| 2556 | |
---|
| 2557 | //vhdl->set_body(3,"else"); |
---|
| 2558 | |
---|
| 2559 | //vhdl->set_body(4,"reg_CONTEXT_"+toString(i)+"_ADDRESS_PREVIOUS <= reg_CONTEXT_"+toString(i)+"_ADDRESS_PREVIOUS ;"); |
---|
| 2560 | //vhdl->set_body(4,"reg_CONTEXT_"+toString(i)+"_IS_DELAY_SLOT <= reg_CONTEXT_"+toString(i)+"_IS_DELAY_SLOT ;"); |
---|
| 2561 | |
---|
| 2562 | vhdl->set_body(3,"end if;"); |
---|
| 2563 | } |
---|
| 2564 | |
---|
| 2565 | vhdl->set_body(2,"end if;"); |
---|
| 2566 | vhdl->set_body(1,"end if;"); |
---|
| 2567 | vhdl->set_body(0,"end process reg_DECOD;"); |
---|
| 2568 | vhdl->set_body(0,""); |
---|
| 2569 | |
---|
[78] | 2570 | log_printf(FUNC,Decod,FUNCTION,"End"); |
---|
| 2571 | }; |
---|
| 2572 | |
---|
| 2573 | }; // end namespace decod |
---|
| 2574 | }; // end namespace decod_unit |
---|
| 2575 | }; // end namespace front_end |
---|
| 2576 | }; // end namespace multi_front_end |
---|
| 2577 | }; // end namespace core |
---|
| 2578 | |
---|
| 2579 | }; // end namespace behavioural |
---|
| 2580 | }; // end namespace morpheo |
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| 2581 | #endif |
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