[111] | 1 | #ifdef SYSTEMC |
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| 2 | /* |
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| 3 | * $Id: Decod_queue_function_multi_fifo_genMoore.cpp 139 2010-07-30 14:47:27Z rosiere $ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace core { |
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| 14 | namespace multi_front_end { |
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| 15 | namespace front_end { |
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| 16 | namespace decod_unit { |
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| 17 | namespace decod_queue { |
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| 18 | |
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| 19 | |
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| 20 | #undef FUNCTION |
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| 21 | #define FUNCTION "Decod_queue::function_multi_fifo_genMoore" |
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| 22 | void Decod_queue::function_multi_fifo_genMoore (void) |
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| 23 | { |
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| 24 | log_begin(Decod_queue,FUNCTION); |
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| 25 | log_function(Decod_queue,FUNCTION,_name.c_str()); |
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| 26 | |
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[123] | 27 | if (PORT_READ(in_NRESET)) |
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| 28 | { |
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[111] | 29 | //-------------------------------------------------------------------- |
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| 30 | //-----[ DECOD_IN ]--------------------------------------------------- |
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| 31 | //-------------------------------------------------------------------- |
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| 32 | { |
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| 33 | uint32_t num_bank = reg_NUM_BANK_TAIL; |
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| 34 | |
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| 35 | for (uint32_t i=0; i<_param->_nb_inst_decod; i++) |
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| 36 | { |
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| 37 | internal_DECOD_IN_ACK [i] = (reg_QUEUE[num_bank].size() < _param->_size_queue); |
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| 38 | |
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| 39 | num_bank = (num_bank+1)%_param->_nb_bank; |
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| 40 | } |
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| 41 | } |
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| 42 | |
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| 43 | //-------------------------------------------------------------------- |
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| 44 | //-----[ DECOD_OUT ]-------------------------------------------------- |
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| 45 | //-------------------------------------------------------------------- |
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| 46 | { |
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| 47 | uint32_t num_bank = reg_NUM_BANK_HEAD%_param->_nb_bank; |
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| 48 | |
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| 49 | for (uint32_t i=0; i<_param->_nb_inst_decod; i++) |
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| 50 | { |
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| 51 | if (not reg_QUEUE[num_bank].empty()) |
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| 52 | { |
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| 53 | if (_param->_have_port_context_id) |
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| 54 | PORT_WRITE(out_DECOD_OUT_CONTEXT_ID [i],reg_QUEUE[num_bank].front()->_context_id [0]); |
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| 55 | if (_param->_have_port_depth) |
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| 56 | PORT_WRITE(out_DECOD_OUT_DEPTH [i],reg_QUEUE[num_bank].front()->_depth [0]); |
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[137] | 57 | #ifdef STATISTICS |
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| 58 | PORT_WRITE(out_DECOD_OUT_INSTRUCTION [i],reg_QUEUE[num_bank].front()->_instruction [0]); |
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| 59 | #endif |
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[111] | 60 | PORT_WRITE(out_DECOD_OUT_TYPE [i],reg_QUEUE[num_bank].front()->_type [0]); |
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| 61 | PORT_WRITE(out_DECOD_OUT_OPERATION [i],reg_QUEUE[num_bank].front()->_operation [0]); |
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| 62 | PORT_WRITE(out_DECOD_OUT_NO_EXECUTE [i],reg_QUEUE[num_bank].front()->_no_execute [0]); |
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[123] | 63 | // PORT_WRITE(out_DECOD_OUT_HAVE_EVENT [i],0); |
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| 64 | PORT_WRITE(out_DECOD_OUT_LAST_EVENT [i],0); |
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[111] | 65 | PORT_WRITE(out_DECOD_OUT_IS_DELAY_SLOT [i],reg_QUEUE[num_bank].front()->_is_delay_slot [0]); |
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[139] | 66 | PORT_WRITE(out_DECOD_OUT_SAVE_RAT [i],reg_QUEUE[num_bank].front()->_save_rat [0]); |
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[111] | 67 | #ifdef DEBUG |
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| 68 | PORT_WRITE(out_DECOD_OUT_ADDRESS [i],reg_QUEUE[num_bank].front()->_address [0]); |
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| 69 | #endif |
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| 70 | PORT_WRITE(out_DECOD_OUT_ADDRESS_NEXT [i],reg_QUEUE[num_bank].front()->_address_next [0]); |
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| 71 | PORT_WRITE(out_DECOD_OUT_HAS_IMMEDIAT [i],reg_QUEUE[num_bank].front()->_has_immediat [0]); |
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| 72 | PORT_WRITE(out_DECOD_OUT_IMMEDIAT [i],reg_QUEUE[num_bank].front()->_immediat [0]); |
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| 73 | PORT_WRITE(out_DECOD_OUT_READ_RA [i],reg_QUEUE[num_bank].front()->_read_ra [0]); |
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| 74 | PORT_WRITE(out_DECOD_OUT_NUM_REG_RA [i],reg_QUEUE[num_bank].front()->_num_reg_ra [0]); |
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| 75 | PORT_WRITE(out_DECOD_OUT_READ_RB [i],reg_QUEUE[num_bank].front()->_read_rb [0]); |
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| 76 | PORT_WRITE(out_DECOD_OUT_NUM_REG_RB [i],reg_QUEUE[num_bank].front()->_num_reg_rb [0]); |
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| 77 | PORT_WRITE(out_DECOD_OUT_READ_RC [i],reg_QUEUE[num_bank].front()->_read_rc [0]); |
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| 78 | PORT_WRITE(out_DECOD_OUT_NUM_REG_RC [i],reg_QUEUE[num_bank].front()->_num_reg_rc [0]); |
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| 79 | PORT_WRITE(out_DECOD_OUT_WRITE_RD [i],reg_QUEUE[num_bank].front()->_write_rd [0]); |
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| 80 | PORT_WRITE(out_DECOD_OUT_NUM_REG_RD [i],reg_QUEUE[num_bank].front()->_num_reg_rd [0]); |
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| 81 | PORT_WRITE(out_DECOD_OUT_WRITE_RE [i],reg_QUEUE[num_bank].front()->_write_re [0]); |
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| 82 | PORT_WRITE(out_DECOD_OUT_NUM_REG_RE [i],reg_QUEUE[num_bank].front()->_num_reg_re [0]); |
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| 83 | PORT_WRITE(out_DECOD_OUT_EXCEPTION_USE [i],reg_QUEUE[num_bank].front()->_exception_use [0]); |
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| 84 | PORT_WRITE(out_DECOD_OUT_EXCEPTION [i],reg_QUEUE[num_bank].front()->_exception [0]); |
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| 85 | } |
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| 86 | num_bank = (num_bank+1)%_param->_nb_bank; |
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| 87 | } |
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| 88 | } |
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| 89 | |
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| 90 | //-------------------------------------------------------------------- |
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| 91 | //-----[ NB_INST ]---------------------------------------------------- |
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| 92 | //-------------------------------------------------------------------- |
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| 93 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 94 | PORT_WRITE(out_NB_INST_ALL [i], reg_NB_INST [i]); |
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[123] | 95 | } |
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| 96 | else |
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| 97 | { |
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| 98 | for (uint32_t i=0; i<_param->_nb_inst_decod; i++) |
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| 99 | { |
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| 100 | internal_DECOD_IN_ACK [i] = 0; |
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| 101 | } |
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| 102 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 103 | PORT_WRITE(out_NB_INST_ALL [i], 0); |
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| 104 | } |
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[111] | 105 | |
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[123] | 106 | |
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| 107 | // Write output |
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| 108 | for (uint32_t i=0; i<_param->_nb_inst_decod; i++) |
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| 109 | { |
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| 110 | PORT_WRITE(out_DECOD_IN_ACK [i],internal_DECOD_IN_ACK [i]); |
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| 111 | } |
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| 112 | |
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| 113 | |
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[111] | 114 | log_end(Decod_queue,FUNCTION); |
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| 115 | }; |
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| 116 | |
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| 117 | }; // end namespace decod_queue |
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| 118 | }; // end namespace decod_unit |
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| 119 | }; // end namespace front_end |
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| 120 | }; // end namespace multi_front_end |
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| 121 | }; // end namespace core |
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| 122 | |
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| 123 | }; // end namespace behavioural |
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| 124 | }; // end namespace morpheo |
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| 125 | #endif |
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