1 | #ifdef SYSTEMC |
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2 | /* |
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3 | * $Id: Decod_queue_function_multi_fifo_transition.cpp 139 2010-07-30 14:47:27Z rosiere $ |
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4 | * |
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5 | * [ Description ] |
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6 | * |
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7 | */ |
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8 | |
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9 | #include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h" |
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10 | |
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11 | namespace morpheo { |
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12 | namespace behavioural { |
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13 | namespace core { |
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14 | namespace multi_front_end { |
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15 | namespace front_end { |
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16 | namespace decod_unit { |
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17 | namespace decod_queue { |
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18 | |
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19 | |
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20 | #undef FUNCTION |
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21 | #define FUNCTION "Decod_queue::function_multi_fifo_transition" |
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22 | void Decod_queue::function_multi_fifo_transition (void) |
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23 | { |
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24 | log_begin(Decod_queue,FUNCTION); |
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25 | log_function(Decod_queue,FUNCTION,_name.c_str()); |
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26 | |
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27 | if (PORT_READ(in_NRESET) == 0) |
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28 | { |
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29 | for (uint32_t i=0; i<_param->_nb_bank; ++i) |
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30 | while (not reg_QUEUE[i].empty()) |
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31 | { |
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32 | delete reg_QUEUE[i].front(); |
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33 | reg_QUEUE[i].pop_front(); |
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34 | } |
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35 | |
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36 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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37 | { |
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38 | reg_NB_INST [i]=0; |
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39 | reg_NB_INST_EVENT [i]=0; |
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40 | } |
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41 | |
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42 | reg_NUM_BANK_HEAD = 0; |
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43 | reg_NUM_BANK_TAIL = 0; |
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44 | } |
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45 | else |
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46 | { |
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47 | //-------------------------------------------------------------------- |
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48 | //-----[ DECOD_IN ]--------------------------------------------------- |
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49 | //-------------------------------------------------------------------- |
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50 | |
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51 | { |
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52 | #ifdef STATISTICS |
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53 | uint32_t nb_decod_in = 0; |
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54 | #endif |
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55 | |
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56 | for (uint32_t i=0; i<_param->_nb_inst_decod; i++) |
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57 | if (PORT_READ(in_DECOD_IN_VAL [i]) and internal_DECOD_IN_ACK[i]) |
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58 | { |
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59 | log_printf(TRACE,Decod_queue,FUNCTION,_(" * DECOD_IN [%d]"),i); |
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60 | |
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61 | #ifdef STATISTICS |
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62 | nb_decod_in ++; |
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63 | #endif |
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64 | |
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65 | // Create entry |
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66 | decod_queue_entry_t * entry = new decod_queue_entry_t (1); |
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67 | reg_QUEUE[reg_NUM_BANK_TAIL].push_back(entry); |
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68 | |
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69 | Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_IN_CONTEXT_ID [i]):0; |
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70 | |
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71 | log_printf(TRACE,Decod_queue,FUNCTION,_(" * context : %d"),context); |
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72 | |
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73 | // entry->_val [0] = 1; |
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74 | entry->_context_id [0] = context; |
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75 | entry->_depth [0] = (_param->_have_port_depth)?PORT_READ(in_DECOD_IN_DEPTH [i]):0; |
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76 | #ifdef STATISTICS |
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77 | entry->_instruction [0] = PORT_READ(in_DECOD_IN_INSTRUCTION [i]); |
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78 | #endif |
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79 | entry->_type [0] = PORT_READ(in_DECOD_IN_TYPE [i]); |
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80 | entry->_operation [0] = PORT_READ(in_DECOD_IN_OPERATION [i]); |
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81 | entry->_no_execute [0] = PORT_READ(in_DECOD_IN_NO_EXECUTE [i]); |
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82 | entry->_is_delay_slot [0] = PORT_READ(in_DECOD_IN_IS_DELAY_SLOT [i]); |
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83 | entry->_save_rat [0] = PORT_READ(in_DECOD_IN_SAVE_RAT [i]); |
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84 | #ifdef DEBUG |
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85 | entry->_address [0] = PORT_READ(in_DECOD_IN_ADDRESS [i]); |
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86 | #endif |
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87 | entry->_address_next [0] = PORT_READ(in_DECOD_IN_ADDRESS_NEXT [i]); |
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88 | entry->_has_immediat [0] = PORT_READ(in_DECOD_IN_HAS_IMMEDIAT [i]); |
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89 | entry->_immediat [0] = PORT_READ(in_DECOD_IN_IMMEDIAT [i]); |
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90 | entry->_read_ra [0] = PORT_READ(in_DECOD_IN_READ_RA [i]); |
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91 | entry->_num_reg_ra [0] = PORT_READ(in_DECOD_IN_NUM_REG_RA [i]); |
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92 | entry->_read_rb [0] = PORT_READ(in_DECOD_IN_READ_RB [i]); |
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93 | entry->_num_reg_rb [0] = PORT_READ(in_DECOD_IN_NUM_REG_RB [i]); |
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94 | entry->_read_rc [0] = PORT_READ(in_DECOD_IN_READ_RC [i]); |
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95 | entry->_num_reg_rc [0] = PORT_READ(in_DECOD_IN_NUM_REG_RC [i]); |
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96 | entry->_write_rd [0] = PORT_READ(in_DECOD_IN_WRITE_RD [i]); |
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97 | entry->_num_reg_rd [0] = PORT_READ(in_DECOD_IN_NUM_REG_RD [i]); |
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98 | entry->_write_re [0] = PORT_READ(in_DECOD_IN_WRITE_RE [i]); |
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99 | entry->_num_reg_re [0] = PORT_READ(in_DECOD_IN_NUM_REG_RE [i]); |
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100 | entry->_exception_use [0] = PORT_READ(in_DECOD_IN_EXCEPTION_USE [i]); |
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101 | entry->_exception [0] = PORT_READ(in_DECOD_IN_EXCEPTION [i]); |
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102 | |
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103 | // Update pointer |
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104 | reg_NUM_BANK_TAIL = (reg_NUM_BANK_TAIL+1)%_param->_nb_bank; |
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105 | reg_NB_INST [context] ++; |
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106 | |
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107 | log_printf(TRACE,Decod_queue,FUNCTION,_(" * nb_inst : %d"),reg_NB_INST [context]); |
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108 | log_printf(TRACE,Decod_queue,FUNCTION,_(" * PUSH queue")); |
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109 | } |
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110 | |
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111 | #ifdef STATISTICS |
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112 | if (usage_is_set(_usage,USE_STATISTICS)) |
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113 | { |
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114 | if (nb_decod_in > 0) |
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115 | { |
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116 | if (nb_decod_in == _param->_nb_inst_decod) |
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117 | (*_stat_decode_in_full) ++; |
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118 | else |
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119 | (*_stat_decode_in_average) += nb_decod_in; |
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120 | } |
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121 | else |
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122 | { |
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123 | (*_stat_decode_in_empty) ++; |
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124 | } |
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125 | } |
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126 | #endif |
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127 | } |
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128 | |
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129 | //-------------------------------------------------------------------- |
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130 | //-----[ DECOD_OUT ]-------------------------------------------------- |
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131 | //-------------------------------------------------------------------- |
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132 | { |
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133 | bool can_continue = true; // in_order |
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134 | |
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135 | for (uint32_t i=0; i<_param->_nb_inst_decod; i++) |
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136 | if (can_continue and (internal_DECOD_OUT_VAL [i] and internal_DECOD_OUT_ACK[i])) |
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137 | { |
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138 | log_printf(TRACE,Decod_queue,FUNCTION,_(" * DECOD_OUT [%d]"),i); |
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139 | |
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140 | uint32_t num_bank = reg_NUM_BANK_HEAD; |
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141 | |
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142 | Tcontext_t context = reg_QUEUE[num_bank].front()->_context_id [0]; |
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143 | |
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144 | log_printf(TRACE,Decod_queue,FUNCTION,_(" * context : %d"),context); |
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145 | |
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146 | // Pop the slot |
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147 | delete reg_QUEUE[num_bank].front(); |
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148 | reg_QUEUE[num_bank].pop_front(); |
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149 | |
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150 | // Update pointer |
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151 | reg_NUM_BANK_HEAD = (reg_NUM_BANK_HEAD+1)%_param->_nb_bank; |
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152 | |
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153 | reg_NB_INST [context] --; |
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154 | if (reg_NB_INST_EVENT [context] > 0) |
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155 | reg_NB_INST_EVENT [context] --; |
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156 | } |
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157 | else |
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158 | can_continue = false; |
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159 | } |
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160 | |
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161 | //-------------------------------------------------------------------- |
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162 | //-----[ CONTEXT_EVENT ]---------------------------------------------- |
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163 | //-------------------------------------------------------------------- |
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164 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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165 | if (PORT_READ(in_CONTEXT_EVENT [i])) |
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166 | reg_NB_INST_EVENT [i] = reg_NB_INST [i]; |
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167 | |
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168 | //-------------------------------------------------------------------- |
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169 | //-----[ OTHERS ]----------------------------------------------------- |
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170 | //-------------------------------------------------------------------- |
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171 | |
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172 | #if defined(DEBUG) and defined(DEBUG_Decod_queue) and (DEBUG >= DEBUG_TRACE) |
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173 | log_printf(TRACE,Decod_queue,FUNCTION," * Dump decod_queue"); |
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174 | log_printf(TRACE,Decod_queue,FUNCTION," * reg_NUM_BANK_HEAD : %d",reg_NUM_BANK_HEAD); |
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175 | log_printf(TRACE,Decod_queue,FUNCTION," * reg_NUM_BANK_TAIL : %d",reg_NUM_BANK_TAIL); |
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176 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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177 | { |
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178 | log_printf(TRACE,Decod_queue,FUNCTION," * reg_NB_INST [%d] : %d",i,reg_NB_INST [i]); |
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179 | log_printf(TRACE,Decod_queue,FUNCTION," * reg_NB_INST_EVENT [%d] : %d",i,reg_NB_INST_EVENT [i]); |
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180 | } |
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181 | for (uint32_t i=0; i<_param->_nb_bank; ++i) |
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182 | { |
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183 | uint32_t x=0; |
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184 | uint32_t num_bank = (reg_NUM_BANK_HEAD+i)%_param->_nb_bank; |
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185 | for (std::list<decod_queue_entry_t*>::iterator it=reg_QUEUE[num_bank].begin(); |
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186 | it!=reg_QUEUE[num_bank].end(); |
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187 | it++) |
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188 | { |
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189 | log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d][%.4d] %.3d %.2d, %.2d %.3d %.1d %.1d %.1d, 0x%.8x (0x%.8x), %.1d 0x%.8x, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d" |
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190 | ,i |
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191 | ,x |
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192 | ,(*it)->_context_id [0] |
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193 | ,(*it)->_depth [0] |
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194 | ,(*it)->_type [0] |
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195 | ,(*it)->_operation [0] |
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196 | ,(*it)->_no_execute [0] |
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197 | ,(*it)->_is_delay_slot [0] |
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198 | ,(*it)->_save_rat [0] |
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199 | ,(*it)->_address [0] |
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200 | ,(*it)->_address [0]<<2 |
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201 | ,(*it)->_has_immediat [0] |
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202 | ,(*it)->_immediat [0] |
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203 | ,(*it)->_read_ra [0] |
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204 | ,(*it)->_num_reg_ra [0] |
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205 | ,(*it)->_read_rb [0] |
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206 | ,(*it)->_num_reg_rb [0] |
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207 | ,(*it)->_read_rc [0] |
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208 | ,(*it)->_num_reg_rc [0] |
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209 | ,(*it)->_write_rd [0] |
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210 | ,(*it)->_num_reg_rd [0] |
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211 | ,(*it)->_write_re [0] |
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212 | ,(*it)->_num_reg_re [0] |
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213 | ,(*it)->_exception_use [0] |
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214 | ,(*it)->_exception [0] |
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215 | ); |
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216 | x++; |
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217 | } |
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218 | } |
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219 | #endif |
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220 | |
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221 | #ifdef STATISTICS |
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222 | if (usage_is_set(_usage,USE_STATISTICS)) |
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223 | { |
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224 | for (uint32_t i=0; i<_param->_nb_bank; ++i) |
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225 | (*_stat_use_queue) += reg_QUEUE[i].size(); |
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226 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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227 | (*_stat_nb_inst [i]) += reg_NB_INST [i]; |
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228 | } |
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229 | #endif |
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230 | } |
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231 | |
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232 | log_end(Decod_queue,FUNCTION); |
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233 | }; |
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234 | |
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235 | }; // end namespace decod_queue |
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236 | }; // end namespace decod_unit |
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237 | }; // end namespace front_end |
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238 | }; // end namespace multi_front_end |
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239 | }; // end namespace core |
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240 | |
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241 | }; // end namespace behavioural |
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242 | }; // end namespace morpheo |
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243 | #endif |
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