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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_transition.cpp @ 111

Last change on this file since 111 was 111, checked in by rosiere, 15 years ago
1) Decod_queue : multi implementation (one_fifo, multi_fifo) 2) Issue_queue : multi implementation (in_order, out_of_order) 3) Direction : Add Meta predictor 4) Context_State : re add Branch_complete, More priority to Load miss (is not speculative) 5) Return_Address_Stack : update reg_PREDICT pointer on decod miss prediction 6) UPT : Fix bug in multi event 7) Prediction_glue : in read_stack case, insert in UPT pc_next 8) Rename select : when rob have an event (need flush), read_r{a,b,c} and write_r{d,e} is set at 0
Property svn:keywords set to `Id`
File size: 7.8 KB

Line
1	#ifdef SYSTEMC
2	/*
3	* $Id: Decod_queue_function_multi_fifo_transition.cpp 111 2009-02-27 18:37:40Z rosiere $
4	*
5	* [ Description ]
6	*
7	*/
8
9	#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h"
10
11	namespace morpheo {
12	namespace behavioural {
13	namespace core {
14	namespace multi_front_end {
15	namespace front_end {
16	namespace decod_unit {
17	namespace decod_queue {
18
19
20	#undef FUNCTION
21	#define FUNCTION "Decod_queue::function_multi_fifo_transition"
22	void Decod_queue::function_multi_fifo_transition (void)
23	{
24	log_begin(Decod_queue,FUNCTION);
25	log_function(Decod_queue,FUNCTION,_name.c_str());
26
27	if (PORT_READ(in_NRESET) == 0)
28	{
29	for (uint32_t i=0; i<_param->_nb_bank; ++i)
30	reg_QUEUE[i].clear();
31
32	for (uint32_t i=0; i<_param->_nb_context; i++)
33	reg_NB_INST [i]=0;
34
35	reg_NUM_BANK_HEAD = 0;
36	reg_NUM_BANK_TAIL = 0;
37	}
38	else
39	{
40	//--------------------------------------------------------------------
41	//-----[ DECOD_IN ]---------------------------------------------------
42	//--------------------------------------------------------------------
43
44	{
45	#ifdef STATISTICS
46	bool find = false;
47	#endif
48	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
49	if (PORT_READ(in_DECOD_IN_VAL [i]) and internal_DECOD_IN_ACK[i])
50	{
51	log_printf(TRACE,Decod_queue,FUNCTION,_(" * DECOD_IN [%d]"),i);
52
53	// Create entry
54	decod_queue_entry_t * entry = new decod_queue_entry_t (1);
55	reg_QUEUE[reg_NUM_BANK_TAIL].push_back(entry);
56
57	#ifdef STATISTICS
58	find = true;
59	if (usage_is_set(_usage,USE_STATISTICS))
60	(*_stat_sum_inst_enable) ++;
61	#endif
62
63	Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_IN_CONTEXT_ID [i]):0;
64
65	log_printf(TRACE,Decod_queue,FUNCTION,_(" * context : %d"),context);
66
67	// entry->_val [0] = 1;
68	entry->_context_id [0] = context;
69	entry->_depth [0] = (_param->_have_port_depth)?PORT_READ(in_DECOD_IN_DEPTH [i]):0;
70	entry->_type [0] = PORT_READ(in_DECOD_IN_TYPE [i]);
71	entry->_operation [0] = PORT_READ(in_DECOD_IN_OPERATION [i]);
72	entry->_no_execute [0] = PORT_READ(in_DECOD_IN_NO_EXECUTE [i]);
73	entry->_is_delay_slot [0] = PORT_READ(in_DECOD_IN_IS_DELAY_SLOT [i]);
74	#ifdef DEBUG
75	entry->_address [0] = PORT_READ(in_DECOD_IN_ADDRESS [i]);
76	#endif
77	entry->_address_next [0] = PORT_READ(in_DECOD_IN_ADDRESS_NEXT [i]);
78	entry->_has_immediat [0] = PORT_READ(in_DECOD_IN_HAS_IMMEDIAT [i]);
79	entry->_immediat [0] = PORT_READ(in_DECOD_IN_IMMEDIAT [i]);
80	entry->_read_ra [0] = PORT_READ(in_DECOD_IN_READ_RA [i]);
81	entry->_num_reg_ra [0] = PORT_READ(in_DECOD_IN_NUM_REG_RA [i]);
82	entry->_read_rb [0] = PORT_READ(in_DECOD_IN_READ_RB [i]);
83	entry->_num_reg_rb [0] = PORT_READ(in_DECOD_IN_NUM_REG_RB [i]);
84	entry->_read_rc [0] = PORT_READ(in_DECOD_IN_READ_RC [i]);
85	entry->_num_reg_rc [0] = PORT_READ(in_DECOD_IN_NUM_REG_RC [i]);
86	entry->_write_rd [0] = PORT_READ(in_DECOD_IN_WRITE_RD [i]);
87	entry->_num_reg_rd [0] = PORT_READ(in_DECOD_IN_NUM_REG_RD [i]);
88	entry->_write_re [0] = PORT_READ(in_DECOD_IN_WRITE_RE [i]);
89	entry->_num_reg_re [0] = PORT_READ(in_DECOD_IN_NUM_REG_RE [i]);
90	entry->_exception_use [0] = PORT_READ(in_DECOD_IN_EXCEPTION_USE [i]);
91	entry->_exception [0] = PORT_READ(in_DECOD_IN_EXCEPTION [i]);
92
93	// Update pointer
94	reg_NUM_BANK_TAIL = (reg_NUM_BANK_TAIL+1)%_param->_nb_bank;
95	reg_NB_INST [context] ++;
96
97	log_printf(TRACE,Decod_queue,FUNCTION,_(" * nb_inst : %d"),reg_NB_INST [context]);
98	log_printf(TRACE,Decod_queue,FUNCTION,_(" * PUSH queue"));
99	}
100
101	#ifdef STATISTICS
102	if (usage_is_set(_usage,USE_STATISTICS))
103	if (find)
104	(*_stat_sum_transaction_decod_in) ++;
105	#endif
106	}
107
108	//--------------------------------------------------------------------
109	//-----[ DECOD_OUT ]--------------------------------------------------
110	//--------------------------------------------------------------------
111	{
112	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
113	if (internal_DECOD_OUT_VAL [i] and internal_DECOD_OUT_ACK[i])
114	{
115	log_printf(TRACE,Decod_queue,FUNCTION,_(" * DECOD_OUT [%d]"),i);
116
117	uint32_t num_bank = reg_NUM_BANK_HEAD;
118
119	Tcontext_t context = reg_QUEUE[num_bank].front()->_context_id [0];
120
121	log_printf(TRACE,Decod_queue,FUNCTION,_(" * context : %d"),context);
122
123	// Pop the slot
124	delete reg_QUEUE[num_bank].front();
125	reg_QUEUE[num_bank].pop_front();
126
127	// Update pointer
128	reg_NUM_BANK_HEAD = (reg_NUM_BANK_HEAD+1)%_param->_nb_bank;
129	reg_NB_INST [context] --;
130	}
131	}
132
133	//--------------------------------------------------------------------
134	//-----[ OTHERS ]-----------------------------------------------------
135	//--------------------------------------------------------------------
136
137	#if defined(DEBUG) and defined(DEBUG_Decod_queue) and (DEBUG >= DEBUG_TRACE)
138	log_printf(TRACE,Decod_queue,FUNCTION," * Dump decod_queue");
139	log_printf(TRACE,Decod_queue,FUNCTION," * reg_NUM_BANK_HEAD : %d",reg_NUM_BANK_HEAD);
140	log_printf(TRACE,Decod_queue,FUNCTION," * reg_NUM_BANK_TAIL : %d",reg_NUM_BANK_TAIL);
141	for (uint32_t i=0; i<_param->_nb_context; i++)
142	log_printf(TRACE,Decod_queue,FUNCTION," * reg_NB_INST [%d] : %d",i,reg_NB_INST [i]);
143
144	for (uint32_t i=0; i<_param->_nb_bank; ++i)
145	{
146	uint32_t x=0;
147	uint32_t num_bank = (reg_NUM_BANK_HEAD+i)%_param->_nb_bank;
148	for (std::list<decod_queue_entry_t*>::iterator it=reg_QUEUE[num_bank].begin();
149	it!=reg_QUEUE[num_bank].end();
150	it++)
151	{
152	log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d][%.4d] %.3d %.2d, %.2d %.3d %.1d %.1d, 0x%.8x (0x%.8x), %.1d 0x%.8x, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d"
153	,i
154	,x
155	,(*it)->_context_id [0]
156	,(*it)->_depth [0]
157	,(*it)->_type [0]
158	,(*it)->_operation [0]
159	,(*it)->_no_execute [0]
160	,(*it)->_is_delay_slot [0]
161	,(*it)->_address [0]
162	,(*it)->_address [0]<<2
163	,(*it)->_has_immediat [0]
164	,(*it)->_immediat [0]
165	,(*it)->_read_ra [0]
166	,(*it)->_num_reg_ra [0]
167	,(*it)->_read_rb [0]
168	,(*it)->_num_reg_rb [0]
169	,(*it)->_read_rc [0]
170	,(*it)->_num_reg_rc [0]
171	,(*it)->_write_rd [0]
172	,(*it)->_num_reg_rd [0]
173	,(*it)->_write_re [0]
174	,(*it)->_num_reg_re [0]
175	,(*it)->_exception_use [0]
176	,(*it)->_exception [0]
177	);
178	x++;
179	}
180	}
181	#endif
182
183	#ifdef STATISTICS
184	if (usage_is_set(_usage,USE_STATISTICS))
185	{
186	for (uint32_t i=0; i<_param->_nb_bank; ++i)
187	*(_stat_use_queue) += reg_QUEUE[i].size();
188	for (uint32_t i=0; i<_param->_nb_context; i++)
189	*(_stat_nb_inst [i]) += reg_NB_INST [i];
190	}
191	#endif
192	}
193
194	log_end(Decod_queue,FUNCTION);
195	};
196
197	}; // end namespace decod_queue
198	}; // end namespace decod_unit
199	}; // end namespace front_end
200	}; // end namespace multi_front_end
201	}; // end namespace core
202
203	}; // end namespace behavioural
204	}; // end namespace morpheo
205	#endif

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