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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_transition.cpp @ 112

Last change on this file since 112 was 112, checked in by rosiere, 15 years ago
1) Stat_list : fix retire old and new register bug 2) Stat_list : remove read_counter and valid flag, because validation of destination is in retire step (not in commit step) 3) Model : add class Model (cf Morpheo.sim) 4) Allocation : alloc_interface_begin and alloc_interface_end to delete temporary array. 5) Script : add distexe.sh 6) Add Comparator, Multiplier, Divider. But this component are not implemented 7) Software : add Dhrystone
Property svn:keywords set to `Id`
File size: 7.4 KB

Line
1	#ifdef SYSTEMC
2	/*
3	* $Id: Decod_queue_function_one_fifo_transition.cpp 112 2009-03-18 22:36:26Z rosiere $
4	*
5	* [ Description ]
6	*
7	*/
8
9	#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h"
10
11	namespace morpheo {
12	namespace behavioural {
13	namespace core {
14	namespace multi_front_end {
15	namespace front_end {
16	namespace decod_unit {
17	namespace decod_queue {
18
19
20	#undef FUNCTION
21	#define FUNCTION "Decod_queue::function_one_fifo_transition"
22	void Decod_queue::function_one_fifo_transition (void)
23	{
24	log_begin(Decod_queue,FUNCTION);
25	log_function(Decod_queue,FUNCTION,_name.c_str());
26
27	if (PORT_READ(in_NRESET) == 0)
28	{
29	while (not reg_QUEUE->empty())
30	{
31	delete reg_QUEUE->front();
32	reg_QUEUE->pop_front();
33	}
34
35	for (uint32_t i=0; i<_param->_nb_context; i++)
36	reg_NB_INST [i]=0;
37
38	reg_LAST_SLOT = 0;
39	}
40	else
41	{
42	//--------------------------------------------------------------------
43	//-----[ DECOD_IN ]---------------------------------------------------
44	//--------------------------------------------------------------------
45	decod_queue_entry_t * entry = NULL;
46	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
47	{
48	if (PORT_READ(in_DECOD_IN_VAL [i]) and internal_DECOD_IN_ACK[i])
49	{
50	log_printf(TRACE,Decod_queue,FUNCTION,_(" * DECOD_IN [%d]"),i);
51
52	if (entry == NULL)
53	{
54	// Once creation and insert in queue
55	entry = new decod_queue_entry_t (_param->_nb_inst_decod);
56	reg_QUEUE->push_back(entry);
57
58	#ifdef STATISTICS
59	if (usage_is_set(_usage,USE_STATISTICS))
60	(*_stat_sum_transaction_decod_in) ++;
61	#endif
62	}
63
64	#ifdef STATISTICS
65	if (usage_is_set(_usage,USE_STATISTICS))
66	(*_stat_sum_inst_enable) ++;
67	#endif
68
69	Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_IN_CONTEXT_ID [i]):0;
70
71	log_printf(TRACE,Decod_queue,FUNCTION,_(" * context : %d"),context);
72
73	entry->_val [i] = 1;
74	entry->_context_id [i] = context;
75	entry->_depth [i] = (_param->_have_port_depth)?PORT_READ(in_DECOD_IN_DEPTH [i]):0;
76	entry->_type [i] = PORT_READ(in_DECOD_IN_TYPE [i]);
77	entry->_operation [i] = PORT_READ(in_DECOD_IN_OPERATION [i]);
78	entry->_no_execute [i] = PORT_READ(in_DECOD_IN_NO_EXECUTE [i]);
79	entry->_is_delay_slot [i] = PORT_READ(in_DECOD_IN_IS_DELAY_SLOT [i]);
80	#ifdef DEBUG
81	entry->_address [i] = PORT_READ(in_DECOD_IN_ADDRESS [i]);
82	#endif
83	entry->_address_next [i] = PORT_READ(in_DECOD_IN_ADDRESS_NEXT [i]);
84	entry->_has_immediat [i] = PORT_READ(in_DECOD_IN_HAS_IMMEDIAT [i]);
85	entry->_immediat [i] = PORT_READ(in_DECOD_IN_IMMEDIAT [i]);
86	entry->_read_ra [i] = PORT_READ(in_DECOD_IN_READ_RA [i]);
87	entry->_num_reg_ra [i] = PORT_READ(in_DECOD_IN_NUM_REG_RA [i]);
88	entry->_read_rb [i] = PORT_READ(in_DECOD_IN_READ_RB [i]);
89	entry->_num_reg_rb [i] = PORT_READ(in_DECOD_IN_NUM_REG_RB [i]);
90	entry->_read_rc [i] = PORT_READ(in_DECOD_IN_READ_RC [i]);
91	entry->_num_reg_rc [i] = PORT_READ(in_DECOD_IN_NUM_REG_RC [i]);
92	entry->_write_rd [i] = PORT_READ(in_DECOD_IN_WRITE_RD [i]);
93	entry->_num_reg_rd [i] = PORT_READ(in_DECOD_IN_NUM_REG_RD [i]);
94	entry->_write_re [i] = PORT_READ(in_DECOD_IN_WRITE_RE [i]);
95	entry->_num_reg_re [i] = PORT_READ(in_DECOD_IN_NUM_REG_RE [i]);
96	entry->_exception_use [i] = PORT_READ(in_DECOD_IN_EXCEPTION_USE [i]);
97	entry->_exception [i] = PORT_READ(in_DECOD_IN_EXCEPTION [i]);
98
99	reg_NB_INST [context] ++;
100
101	log_printf(TRACE,Decod_queue,FUNCTION,_(" * nb_inst : %d"),reg_NB_INST [context]);
102	log_printf(TRACE,Decod_queue,FUNCTION,_(" * PUSH queue"));
103	}
104	}
105
106	//--------------------------------------------------------------------
107	//-----[ DECOD_OUT ]--------------------------------------------------
108	//--------------------------------------------------------------------
109	if (not reg_QUEUE->empty())
110	{
111	bool find = false;
112
113	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
114	{
115	// Test transaction : if ok then invalid slot
116	// In order by rename logic
117	if (internal_DECOD_OUT_VAL [i] and internal_DECOD_OUT_ACK[i])
118	{
119	log_printf(TRACE,Decod_queue,FUNCTION,_(" * DECOD_OUT [%d]"),i);
120
121	#ifdef DEBUG_TEST
122	if (reg_LAST_SLOT != i)
123	throw ERRORMORPHEO(FUNCTION,toString(_("reg_LAST_SLOT (%d) is different at decod_out port (%d)."),reg_LAST_SLOT,i));
124	#endif
125	reg_LAST_SLOT ++;
126
127	reg_QUEUE->front()->_val [i] = 0;
128
129	Tcontext_t context = reg_QUEUE->front()->_context_id [i];
130	log_printf(TRACE,Decod_queue,FUNCTION,_(" * context : %d"),context);
131
132	reg_NB_INST [context] --;
133	log_printf(TRACE,Decod_queue,FUNCTION,_(" * nb_inst : %d"),reg_NB_INST [context]);
134	}
135	// Test if slot is (again) valid, if yes, then have less one instruction in the entry
136	find \|= reg_QUEUE->front()->_val [i];
137	}
138
139	// test if can free the entry : test if have consume all entry
140	if (not find) // no valid instruction in current slot
141	{
142	log_printf(TRACE,Decod_queue,FUNCTION,_(" * POP queue"));
143
144	// can pop the slot
145	delete reg_QUEUE->front();
146	reg_QUEUE->pop_front();
147
148	reg_LAST_SLOT = 0;
149	}
150	}
151	}
152
153	#if defined(DEBUG) and defined(DEBUG_Decod_queue) and (DEBUG >= DEBUG_TRACE)
154	log_printf(TRACE,Decod_queue,FUNCTION," * Dump decod_queue");
155	log_printf(TRACE,Decod_queue,FUNCTION," * reg_LAST_SLOT : %d",reg_LAST_SLOT);
156	uint32_t x=0;
157	for (std::list<decod_queue_entry_t*>::iterator it=reg_QUEUE->begin();
158	it!=reg_QUEUE->end();
159	it++)
160	{
161	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
162	{
163	if ((*it)->_val [i])
164	log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d][%.4d] %.1d, %.3d %.2d, %.2d %.3d %.1d %.1d, 0x%.8x (0x%.8x), %.1d 0x%.8x, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d, %.1d %.2d"
165	,x
166	,i
167	,(*it)->_val [i]
168	,(*it)->_context_id [i]
169	,(*it)->_depth [i]
170	,(*it)->_type [i]
171	,(*it)->_operation [i]
172	,(*it)->_no_execute [i]
173	,(*it)->_is_delay_slot [i]
174	,(*it)->_address [i]
175	,(*it)->_address [i]<<2
176	,(*it)->_has_immediat [i]
177	,(*it)->_immediat [i]
178	,(*it)->_read_ra [i]
179	,(*it)->_num_reg_ra [i]
180	,(*it)->_read_rb [i]
181	,(*it)->_num_reg_rb [i]
182	,(*it)->_read_rc [i]
183	,(*it)->_num_reg_rc [i]
184	,(*it)->_write_rd [i]
185	,(*it)->_num_reg_rd [i]
186	,(*it)->_write_re [i]
187	,(*it)->_num_reg_re [i]
188	,(*it)->_exception_use [i]
189	,(*it)->_exception [i]
190	);
191	else
192	log_printf(TRACE,Decod_queue,FUNCTION," * [%.4d][%.4d] %d"
193	,x
194	,i
195	,(*it)->_val [i]
196	);
197
198	}
199	x++;
200	}
201	#endif
202
203	#ifdef STATISTICS
204	if (usage_is_set(_usage,USE_STATISTICS))
205	{
206	*(_stat_use_queue) += reg_QUEUE->size();
207	for (uint32_t i=0; i<_param->_nb_context; i++)
208	*(_stat_nb_inst [i]) += reg_NB_INST [i];
209	}
210	#endif
211
212	log_end(Decod_queue,FUNCTION);
213	};
214
215	}; // end namespace decod_queue
216	}; // end namespace decod_unit
217	}; // end namespace front_end
218	}; // end namespace multi_front_end
219	}; // end namespace core
220
221	}; // end namespace behavioural
222	}; // end namespace morpheo
223	#endif

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