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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/test.cpp @ 87

Last change on this file since 87 was 87, checked in by rosiere, 16 years ago
Test Decod and Decod_unit.
Property svn:keywords set to `Id`
File size: 29.1 KB

Line
1	/*
2	* $Id: test.cpp 87 2008-05-15 19:23:42Z rosiere $
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#define NB_ITERATION 1
10	#define CYCLE_MAX (10240*NB_ITERATION)
11
12	#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/include/test.h"
13	#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/include/Decod_request.h"
14	#include "Common/include/Test.h"
15	#include "Behavioural/include/Allocation.h"
16
17	void test (string name,
18	morpheo::behavioural::core::multi_front_end::front_end::decod_unit::Parameters * _param)
19	{
20	msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
21
22	#ifdef STATISTICS
23	morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX);
24	#endif
25
26	Tusage_t _usage = USE_ALL;
27
28	// _usage = usage_unset(_usage,USE_SYSTEMC );
29	// _usage = usage_unset(_usage,USE_VHDL );
30	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH );
31	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
32	// _usage = usage_unset(_usage,USE_POSITION );
33	// _usage = usage_unset(_usage,USE_STATISTICS );
34	// _usage = usage_unset(_usage,USE_INFORMATION );
35
36	Decod_unit * _Decod_unit = new Decod_unit
37	(name.c_str(),
38	#ifdef STATISTICS
39	_parameters_statistics,
40	#endif
41	_param,
42	_usage);
43
44	#ifdef SYSTEMC
45	if (usage_is_set(_usage,USE_SYSTEMC))
46	{
47	/*********************************************************************
48	* Déclarations des signaux
49	*********************************************************************/
50	string rename;
51
52	sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5);
53	sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
54
55	ALLOC2_SC_SIGNAL( in_IFETCH_VAL ," in_IFETCH_VAL ",Tcontrol_t ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
56	ALLOC2_SC_SIGNAL(out_IFETCH_ACK ,"out_IFETCH_ACK ",Tcontrol_t ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
57	ALLOC2_SC_SIGNAL( in_IFETCH_INSTRUCTION ," in_IFETCH_INSTRUCTION ",Tinstruction_t ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
58
59	ALLOC1_SC_SIGNAL(in_IFETCH_CONTEXT_ID ,"in_IFETCH_CONTEXT_ID ",Tcontext_t ,_param->_nb_context);
60	ALLOC1_SC_SIGNAL(in_IFETCH_ADDRESS ,"in_IFETCH_ADDRESS ",Tgeneral_address_t ,_param->_nb_context);
61	//ALLOC1_SC_SIGNAL(in_IFETCH_ADDRESS_NEXT ,"in_IFETCH_ADDRESS_NEXT ",Tgeneral_address_t ,_param->_nb_context);
62	ALLOC1_SC_SIGNAL(in_IFETCH_INST_IFETCH_PTR ,"in_IFETCH_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t ,_param->_nb_context);
63	ALLOC1_SC_SIGNAL(in_IFETCH_BRANCH_STATE ,"in_IFETCH_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_context);
64	ALLOC1_SC_SIGNAL(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ,"in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ",Tprediction_ptr_t ,_param->_nb_context);
65
66	ALLOC1_SC_SIGNAL(out_DECOD_VAL ,"out_DECOD_VAL ",Tcontrol_t ,_param->_nb_inst_decod);
67	ALLOC1_SC_SIGNAL( in_DECOD_ACK ," in_DECOD_ACK ",Tcontrol_t ,_param->_nb_inst_decod);
68	ALLOC1_SC_SIGNAL(out_DECOD_CONTEXT_ID ,"out_DECOD_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod);
69	ALLOC1_SC_SIGNAL(out_DECOD_DEPTH ,"out_DECOD_DEPTH ",Tdepth_t ,_param->_nb_inst_decod);
70	ALLOC1_SC_SIGNAL(out_DECOD_TYPE ,"out_DECOD_TYPE ",Ttype_t ,_param->_nb_inst_decod);
71	ALLOC1_SC_SIGNAL(out_DECOD_OPERATION ,"out_DECOD_OPERATION ",Toperation_t ,_param->_nb_inst_decod);
72	ALLOC1_SC_SIGNAL(out_DECOD_IS_DELAY_SLOT ,"out_DECOD_IS_DELAY_SLOT ",Tcontrol_t ,_param->_nb_inst_decod);
73	ALLOC1_SC_SIGNAL(out_DECOD_ADDRESS ,"out_DECOD_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_decod);
74	ALLOC1_SC_SIGNAL(out_DECOD_HAS_IMMEDIAT ,"out_DECOD_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_inst_decod);
75	ALLOC1_SC_SIGNAL(out_DECOD_IMMEDIAT ,"out_DECOD_IMMEDIAT ",Tgeneral_data_t ,_param->_nb_inst_decod);
76	ALLOC1_SC_SIGNAL(out_DECOD_READ_RA ,"out_DECOD_READ_RA ",Tcontrol_t ,_param->_nb_inst_decod);
77	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RA ,"out_DECOD_NUM_REG_RA ",Tgeneral_address_t ,_param->_nb_inst_decod);
78	ALLOC1_SC_SIGNAL(out_DECOD_READ_RB ,"out_DECOD_READ_RB ",Tcontrol_t ,_param->_nb_inst_decod);
79	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RB ,"out_DECOD_NUM_REG_RB ",Tgeneral_address_t ,_param->_nb_inst_decod);
80	ALLOC1_SC_SIGNAL(out_DECOD_READ_RC ,"out_DECOD_READ_RC ",Tcontrol_t ,_param->_nb_inst_decod);
81	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RC ,"out_DECOD_NUM_REG_RC ",Tspecial_address_t ,_param->_nb_inst_decod);
82	ALLOC1_SC_SIGNAL(out_DECOD_WRITE_RD ,"out_DECOD_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_decod);
83	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RD ,"out_DECOD_NUM_REG_RD ",Tgeneral_address_t ,_param->_nb_inst_decod);
84	ALLOC1_SC_SIGNAL(out_DECOD_WRITE_RE ,"out_DECOD_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_decod);
85	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RE ,"out_DECOD_NUM_REG_RE ",Tspecial_address_t ,_param->_nb_inst_decod);
86	ALLOC1_SC_SIGNAL(out_DECOD_EXCEPTION_USE ,"out_DECOD_EXCEPTION_USE ",Texception_t ,_param->_nb_inst_decod);
87
88	ALLOC1_SC_SIGNAL(out_PREDICT_VAL ,"out_PREDICT_VAL ",Tcontrol_t ,_param->_nb_inst_decod);
89	ALLOC1_SC_SIGNAL( in_PREDICT_ACK ," in_PREDICT_ACK ",Tcontrol_t ,_param->_nb_inst_decod);
90	ALLOC1_SC_SIGNAL(out_PREDICT_CONTEXT_ID ,"out_PREDICT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod);
91	ALLOC1_SC_SIGNAL(out_PREDICT_MATCH_INST_IFETCH_PTR ,"out_PREDICT_MATCH_INST_IFETCH_PTR ",Tcontrol_t ,_param->_nb_inst_decod);
92	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STATE ,"out_PREDICT_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_inst_decod);
93	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"out_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t ,_param->_nb_inst_decod);
94	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_CONDITION ,"out_PREDICT_BRANCH_CONDITION ",Tbranch_condition_t,_param->_nb_inst_decod);
95	//ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STACK_WRITE ,"out_PREDICT_BRANCH_STACK_WRITE ",Tcontrol_t ,_param->_nb_inst_decod);
96	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_DIRECTION ,"out_PREDICT_BRANCH_DIRECTION ",Tcontrol_t ,_param->_nb_inst_decod);
97	ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC ,"out_PREDICT_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_decod);
98	ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST ,"out_PREDICT_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_decod);
99	//ALLOC1_SC_SIGNAL( in_PREDICT_CAN_CONTINUE ," in_PREDICT_CAN_CONTINUE ",Tcontrol_t ,_param->_nb_inst_decod);
100
101	ALLOC1_SC_SIGNAL( in_DEPTH_TAIL ," in_DEPTH_TAIL ",Tdepth_t ,_param->_nb_context);
102	ALLOC1_SC_SIGNAL( in_DEPTH_NB_BRANCH ," in_DEPTH_NB_BRANCH ",Tdepth_t ,_param->_nb_context);
103
104	ALLOC1_SC_SIGNAL(out_NB_INST_DECOD_ALL ,"out_NB_INST_DECOD_ALL ",Tcounter_t ,_param->_nb_context);
105
106	ALLOC1_SC_SIGNAL( in_CONTEXT_DECOD_ENABLE ," in_CONTEXT_DECOD_ENABLE ",Tcontrol_t ,_param->_nb_context);
107	ALLOC1_SC_SIGNAL( in_CONTEXT_DEPTH ," in_CONTEXT_DEPTH ",Tdepth_t ,_param->_nb_context);
108
109	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_VAL ,"out_CONTEXT_EVENT_VAL ",Tcontrol_t );
110	ALLOC_SC_SIGNAL( in_CONTEXT_EVENT_ACK ," in_CONTEXT_EVENT_ACK ",Tcontrol_t );
111	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_CONTEXT_ID ,"out_CONTEXT_EVENT_CONTEXT_ID ",Tcontext_t );
112	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_TYPE ,"out_CONTEXT_EVENT_TYPE ",Tevent_type_t );
113	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_IS_DELAY_SLOT ,"out_CONTEXT_EVENT_IS_DELAY_SLOT ",Tcontrol_t );
114	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS ,"out_CONTEXT_EVENT_ADDRESS ",Tgeneral_data_t );
115	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS_EPCR ,"out_CONTEXT_EVENT_ADDRESS_EPCR ",Tgeneral_data_t );
116
117	/********************************************************
118	* Instanciation
119	********************************************************/
120
121	msg(_("<%s> : Instanciation of _Decod_unit.\n"),name.c_str());
122
123	((_Decod_unit->in_CLOCK)) ((in_CLOCK));
124	((_Decod_unit->in_NRESET)) ((in_NRESET));
125
126	INSTANCE2_SC_SIGNAL(_Decod_unit, in_IFETCH_VAL ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
127	INSTANCE2_SC_SIGNAL(_Decod_unit,out_IFETCH_ACK ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
128	INSTANCE2_SC_SIGNAL(_Decod_unit, in_IFETCH_INSTRUCTION ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
129	if (_param->_have_port_context_id)
130	INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_CONTEXT_ID ,_param->_nb_context);
131	INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_ADDRESS ,_param->_nb_context);
132	//INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_ADDRESS_NEXT ,_param->_nb_context);
133	if (_param->_have_port_inst_ifetch_ptr)
134	INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_INST_IFETCH_PTR ,_param->_nb_context);
135	INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_BRANCH_STATE ,_param->_nb_context);
136	if (_param->_have_port_branch_update_prediction_id)
137	INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ,_param->_nb_context);
138
139	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_VAL ,_param->_nb_inst_decod);
140	INSTANCE1_SC_SIGNAL(_Decod_unit, in_DECOD_ACK ,_param->_nb_inst_decod);
141	if (_param->_have_port_context_id)
142	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_CONTEXT_ID ,_param->_nb_inst_decod);
143	if (_param->_have_port_depth)
144	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_DEPTH ,_param->_nb_inst_decod);
145	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_TYPE ,_param->_nb_inst_decod);
146	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_OPERATION ,_param->_nb_inst_decod);
147	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_IS_DELAY_SLOT ,_param->_nb_inst_decod);
148	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_ADDRESS ,_param->_nb_inst_decod);
149	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_HAS_IMMEDIAT ,_param->_nb_inst_decod);
150	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_IMMEDIAT ,_param->_nb_inst_decod);
151	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_READ_RA ,_param->_nb_inst_decod);
152	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RA ,_param->_nb_inst_decod);
153	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_READ_RB ,_param->_nb_inst_decod);
154	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RB ,_param->_nb_inst_decod);
155	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_READ_RC ,_param->_nb_inst_decod);
156	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RC ,_param->_nb_inst_decod);
157	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_WRITE_RD ,_param->_nb_inst_decod);
158	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RD ,_param->_nb_inst_decod);
159	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_WRITE_RE ,_param->_nb_inst_decod);
160	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RE ,_param->_nb_inst_decod);
161	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_EXCEPTION_USE ,_param->_nb_inst_decod);
162
163	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_VAL ,_param->_nb_inst_decod);
164	INSTANCE1_SC_SIGNAL(_Decod_unit, in_PREDICT_ACK ,_param->_nb_inst_decod);
165	if (_param->_have_port_context_id)
166	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_CONTEXT_ID ,_param->_nb_inst_decod);
167	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_MATCH_INST_IFETCH_PTR ,_param->_nb_inst_decod);
168	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_STATE ,_param->_nb_inst_decod);
169	if (_param->_have_port_branch_update_prediction_id)
170	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_inst_decod);
171	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_CONDITION ,_param->_nb_inst_decod);
172	//INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_STACK_WRITE ,_param->_nb_inst_decod);
173	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_DIRECTION ,_param->_nb_inst_decod);
174	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_ADDRESS_SRC ,_param->_nb_inst_decod);
175	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_ADDRESS_DEST ,_param->_nb_inst_decod);
176	//INSTANCE1_SC_SIGNAL(_Decod_unit, in_PREDICT_CAN_CONTINUE ,_param->_nb_inst_decod);
177
178	if (_param->_have_port_depth)
179	{
180	INSTANCE1_SC_SIGNAL(_Decod_unit, in_DEPTH_TAIL ,_param->_nb_context);
181	INSTANCE1_SC_SIGNAL(_Decod_unit, in_DEPTH_NB_BRANCH ,_param->_nb_context);
182	}
183
184	INSTANCE1_SC_SIGNAL(_Decod_unit,out_NB_INST_DECOD_ALL ,_param->_nb_context);
185
186	INSTANCE1_SC_SIGNAL(_Decod_unit, in_CONTEXT_DECOD_ENABLE ,_param->_nb_context);
187	if (_param->_have_port_depth)
188	INSTANCE1_SC_SIGNAL(_Decod_unit, in_CONTEXT_DEPTH ,_param->_nb_context);
189
190	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_VAL );
191	INSTANCE_SC_SIGNAL( _Decod_unit, in_CONTEXT_EVENT_ACK );
192	if (_param->_have_port_context_id)
193	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_CONTEXT_ID );
194	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_TYPE );
195	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_IS_DELAY_SLOT );
196	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_ADDRESS );
197	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_ADDRESS_EPCR );
198
199
200	msg(_("<%s> : Start Simulation ............\n"),name.c_str());
201
202	Time * _time = new Time();
203
204	/********************************************************
205	* Simulation - Begin
206	********************************************************/
207
208	// Initialisation
209
210	const uint32_t seed = 0;
211	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
212
213	const int32_t percent_transaction_ifetch = 100;
214	const int32_t percent_transaction_decod = 100;
215	const int32_t percent_transaction_predict = 100;
216	const int32_t percent_transaction_event = 100;
217
218	srand(seed);
219
220	SC_START(0);
221	LABEL("Initialisation");
222
223	LABEL("Reset");
224	in_NRESET->write(0);
225	SC_START(5);
226	in_NRESET->write(1);
227
228	LABEL("Loop of Test");
229
230	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
231	{
232	LABEL("Iteration %d",iteration);
233
234	Decod_request request [_param->_nb_context];
235	list<entry_t> respons [_param->_nb_context];
236
237	uint32_t nb_request = 0;
238
239	uint32_t delay_slot_previous [_param->_nb_context];
240	uint32_t delay_slot_current [_param->_nb_context];
241	uint32_t delay_slot_next [_param->_nb_context];
242
243	for (uint32_t i=0; i<_param->_nb_context; i++)
244	{
245	nb_request += request[i].size();
246	delay_slot_current [i] = false;
247	delay_slot_next [i] = false;
248
249	in_DEPTH_TAIL [i]->write(0);
250	in_DEPTH_NB_BRANCH [i]->write(0);
251	in_CONTEXT_DEPTH [i]->write(0);
252	}
253
254	while (nb_request > 0)
255	{
256	for (uint32_t i=0; i<_param->_nb_context; i++)
257	{
258	delay_slot_previous [i] = false;
259
260	in_CONTEXT_DECOD_ENABLE [i]->write((rand()%100)<percent_transaction_decod);
261
262	for (uint32_t j=0; j<_param->_nb_inst_fetch[i]; j++)
263	in_IFETCH_VAL [i][j]->write(0);
264
265	if ((rand()%100)<percent_transaction_ifetch)
266	{
267	list<entry_t>::iterator it = request[i].begin();
268
269	if (it!=request [i].end())
270	{
271	uint32_t lsb = it->_address%_param->_nb_inst_fetch[i];
272
273	in_IFETCH_ADDRESS [i]->write(it->_address-lsb);
274	in_IFETCH_BRANCH_STATE [i]->write(BRANCH_STATE_NONE);
275	if (_param->_have_port_inst_ifetch_ptr)
276	in_IFETCH_INST_IFETCH_PTR [i]->write(0);
277
278	// Alignement
279	for (uint32_t j=lsb; j<_param->_nb_inst_fetch[i]; j++)
280	{
281	in_IFETCH_VAL [i][j]->write(1);
282	in_IFETCH_INSTRUCTION [i][j]->write(it->_instruction);
283	// in_IFETCH_ADDRESS_NEXT [i]->write(it->_address_next);
284	if (it->_type == TYPE_BRANCH)
285	in_IFETCH_BRANCH_STATE [i]->write(it->_branch_state);
286	in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [i]->write(it->_branch_update_prediction_id);
287
288	if ((it->_is_delay_slot) or
289	((++it)==request [i].end()))
290	break;
291	}
292	}
293	}
294	}
295
296	{
297	bool previous_ack = true;
298
299	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
300	{
301	bool ack = previous_ack and ((rand()%100)<percent_transaction_decod);
302	in_DECOD_ACK [i]->write(ack);
303
304	previous_ack = ack;
305
306	in_PREDICT_ACK [i]->write((rand()%100)<percent_transaction_predict);
307	// in_PREDICT_CAN_CONTINUE [i]->write(0);
308	}
309	}
310
311	in_CONTEXT_EVENT_ACK->write((rand()%100)<percent_transaction_event);
312
313	SC_START(0);
314
315	uint32_t find_event = false;
316	for (uint32_t i=0; i<_param->_nb_context; i++)
317	for (uint32_t j=0; j<_param->_nb_inst_fetch[i]; j++)
318	if (in_IFETCH_VAL[i][j]->read() and out_IFETCH_ACK[i][j]->read())
319	{
320	LABEL("IFETCH [%d][%d] : transaction",i,j);
321
322	entry_t entry = request [i].front();
323	LABEL(" * address 0x%x",entry._address);
324
325	respons [i].push_back(entry);
326	request [i].pop_front();
327
328	if (entry._type == TYPE_BRANCH)
329	{
330	delay_slot_next [i] = true;
331
332	// find good decod
333	uint32_t x;
334
335	for (x=0; x<=_param->_nb_inst_decod; x++)
336	{
337	if (x==_param->_nb_inst_decod)
338	TEST_KO("No find predict transaction");
339
340	Tcontext_t ctxt = (_param->_have_port_context_id)?out_PREDICT_CONTEXT_ID[x]->read():0;
341
342	if ((ctxt == i) and
343	(out_PREDICT_VAL [x]->read() and in_PREDICT_ACK [x]->read()))
344	break;
345	}
346
347	LABEL("PREDICT [%d] : transaction",x );
348
349
350	TEST(Tcontrol_t , out_PREDICT_MATCH_INST_IFETCH_PTR [x]->read(),((entry._address)%_param->_nb_inst_fetch[i]) == 0);
351	TEST(Tbranch_state_t , out_PREDICT_BRANCH_STATE [x]->read(), entry._branch_state );
352	if (_param->_have_port_branch_update_prediction_id)
353	TEST(Tprediction_ptr_t , out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x]->read(), entry._branch_update_prediction_id);
354	TEST(Tbranch_condition_t, out_PREDICT_BRANCH_CONDITION [x]->read(), entry._branch_condition );
355	// TEST(Tcontrol_t , out_PREDICT_BRANCH_STACK_WRITE [x]->read(), entry._branch_stack_write );
356	TEST(Tcontrol_t , out_PREDICT_BRANCH_DIRECTION [x]->read(), entry._branch_direction );
357	TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_SRC [x]->read(), entry._address );
358	TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_DEST [x]->read(), entry._branch_address_dest );
359	}
360
361	// TEST(bool, find_event, false); // can continue decod after event
362	if (entry._context_event_type != EVENT_TYPE_NONE)
363	{
364	find_event = true;
365
366	LABEL("CONTEXT_EVENT : transaction");
367
368	if (_param->_have_port_context_id)
369	TEST(Tcontext_t ,out_CONTEXT_EVENT_CONTEXT_ID ->read(), i);
370	TEST(Tevent_type_t ,out_CONTEXT_EVENT_TYPE ->read(), entry._context_event_type);
371	TEST(Tcontrol_t ,out_CONTEXT_EVENT_IS_DELAY_SLOT->read(), entry._is_delay_slot);
372	TEST(Tgeneral_data_t,out_CONTEXT_EVENT_ADDRESS ->read(), entry._address );
373	TEST(Tgeneral_data_t,out_CONTEXT_EVENT_ADDRESS_EPCR ->read(), entry._address_next );
374	}
375
376	TEST(bool, delay_slot_previous [i], false); // can't continue
377	delay_slot_previous [i] = delay_slot_current [i];
378	delay_slot_current [i] = delay_slot_next [i];
379	delay_slot_next [i] = false;
380	}
381
382	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
383	if (out_DECOD_VAL[i]->read() and in_DECOD_ACK[i]->read())
384	{
385	Tcontext_t context = (_param->_have_port_context_id)?out_DECOD_CONTEXT_ID[i]->read():0;
386
387	LABEL("DECOD [%d] : transaction",i );
388
389	TEST(bool ,respons [context].empty(), false);
390
391	LABEL(" * context : %d",context);
392	LABEL(" * instruction : 0x%x",respons [context].front()._instruction);
393
394	if (_param->_have_port_depth)
395	TEST(Tdepth_t , out_DECOD_DEPTH [i]->read(), respons [context].front()._depth );
396	TEST(Ttype_t , out_DECOD_TYPE [i]->read(), respons [context].front()._type );
397	TEST(Toperation_t , out_DECOD_OPERATION [i]->read(), respons [context].front()._operation );
398	TEST(Tcontrol_t , out_DECOD_IS_DELAY_SLOT [i]->read(), respons [context].front()._is_delay_slot);
399	TEST(Tgeneral_data_t , out_DECOD_ADDRESS [i]->read(), respons [context].front()._address );
400	TEST(Tcontrol_t , out_DECOD_HAS_IMMEDIAT [i]->read(), respons [context].front()._has_immediat );
401	if (respons [context].front()._has_immediat)
402	TEST(Tgeneral_data_t , out_DECOD_IMMEDIAT [i]->read(), respons [context].front()._immediat );
403	TEST(Tcontrol_t , out_DECOD_READ_RA [i]->read(), respons [context].front()._read_ra );
404	if (respons [context].front()._read_ra)
405	TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RA [i]->read(), respons [context].front()._num_reg_ra );
406	TEST(Tcontrol_t , out_DECOD_READ_RB [i]->read(), respons [context].front()._read_rb );
407	if (respons [context].front()._read_rb)
408	TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RB [i]->read(), respons [context].front()._num_reg_rb );
409	TEST(Tcontrol_t , out_DECOD_READ_RC [i]->read(), respons [context].front()._read_rc );
410	if (respons [context].front()._read_rc)
411	TEST(Tspecial_address_t, out_DECOD_NUM_REG_RC [i]->read(), respons [context].front()._num_reg_rc );
412	TEST(Tcontrol_t , out_DECOD_WRITE_RD [i]->read(), respons [context].front()._write_rd );
413	if (respons [context].front()._write_rd)
414	TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RD [i]->read(), respons [context].front()._num_reg_rd );
415	TEST(Tcontrol_t , out_DECOD_WRITE_RE [i]->read(), respons [context].front()._write_re );
416	if (respons [context].front()._write_re)
417	TEST(Tspecial_address_t, out_DECOD_NUM_REG_RE [i]->read(), respons [context].front()._num_reg_re );
418	TEST(Texception_t , out_DECOD_EXCEPTION_USE [i]->read(), respons [context].front()._exception_use);
419
420	respons [context].pop_front();
421	nb_request --;
422	}
423
424	TEST(bool, (out_CONTEXT_EVENT_VAL->read() and in_CONTEXT_EVENT_ACK->read()), find_event);
425
426	SC_START(1);
427	}
428
429	for (uint32_t i=0; i<_param->_nb_context; i++)
430	{
431	TEST(Tcounter_t,out_NB_INST_DECOD_ALL [i]->read(), respons[i].size());
432
433	}
434	}
435
436	/********************************************************
437	* Simulation - End
438	********************************************************/
439
440	TEST_OK ("End of Simulation");
441	delete _time;
442
443	msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
444
445	delete in_CLOCK;
446	delete in_NRESET;
447
448	DELETE2_SC_SIGNAL( in_IFETCH_VAL ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
449	DELETE2_SC_SIGNAL(out_IFETCH_ACK ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
450	DELETE2_SC_SIGNAL( in_IFETCH_INSTRUCTION ,_param->_nb_context, _param->_nb_inst_fetch[alloc_signal_it1]);
451	DELETE1_SC_SIGNAL(in_IFETCH_CONTEXT_ID ,_param->_nb_context);
452	DELETE1_SC_SIGNAL(in_IFETCH_ADDRESS ,_param->_nb_context);
453	//DELETE1_SC_SIGNAL(in_IFETCH_ADDRESS_NEXT ,_param->_nb_context);
454	DELETE1_SC_SIGNAL(in_IFETCH_INST_IFETCH_PTR ,_param->_nb_context);
455	DELETE1_SC_SIGNAL(in_IFETCH_BRANCH_STATE ,_param->_nb_context);
456	DELETE1_SC_SIGNAL(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ,_param->_nb_context);
457
458	DELETE1_SC_SIGNAL(out_DECOD_VAL ,_param->_nb_inst_decod);
459	DELETE1_SC_SIGNAL( in_DECOD_ACK ,_param->_nb_inst_decod);
460	DELETE1_SC_SIGNAL(out_DECOD_CONTEXT_ID ,_param->_nb_inst_decod);
461	DELETE1_SC_SIGNAL(out_DECOD_DEPTH ,_param->_nb_inst_decod);
462	DELETE1_SC_SIGNAL(out_DECOD_TYPE ,_param->_nb_inst_decod);
463	DELETE1_SC_SIGNAL(out_DECOD_OPERATION ,_param->_nb_inst_decod);
464	DELETE1_SC_SIGNAL(out_DECOD_IS_DELAY_SLOT ,_param->_nb_inst_decod);
465	DELETE1_SC_SIGNAL(out_DECOD_ADDRESS ,_param->_nb_inst_decod);
466	DELETE1_SC_SIGNAL(out_DECOD_HAS_IMMEDIAT ,_param->_nb_inst_decod);
467	DELETE1_SC_SIGNAL(out_DECOD_IMMEDIAT ,_param->_nb_inst_decod);
468	DELETE1_SC_SIGNAL(out_DECOD_READ_RA ,_param->_nb_inst_decod);
469	DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RA ,_param->_nb_inst_decod);
470	DELETE1_SC_SIGNAL(out_DECOD_READ_RB ,_param->_nb_inst_decod);
471	DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RB ,_param->_nb_inst_decod);
472	DELETE1_SC_SIGNAL(out_DECOD_READ_RC ,_param->_nb_inst_decod);
473	DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RC ,_param->_nb_inst_decod);
474	DELETE1_SC_SIGNAL(out_DECOD_WRITE_RD ,_param->_nb_inst_decod);
475	DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RD ,_param->_nb_inst_decod);
476	DELETE1_SC_SIGNAL(out_DECOD_WRITE_RE ,_param->_nb_inst_decod);
477	DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RE ,_param->_nb_inst_decod);
478	DELETE1_SC_SIGNAL(out_DECOD_EXCEPTION_USE ,_param->_nb_inst_decod);
479
480	DELETE1_SC_SIGNAL(out_PREDICT_VAL ,_param->_nb_inst_decod);
481	DELETE1_SC_SIGNAL( in_PREDICT_ACK ,_param->_nb_inst_decod);
482	DELETE1_SC_SIGNAL(out_PREDICT_CONTEXT_ID ,_param->_nb_inst_decod);
483	DELETE1_SC_SIGNAL(out_PREDICT_MATCH_INST_IFETCH_PTR ,_param->_nb_inst_decod);
484	DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_STATE ,_param->_nb_inst_decod);
485	DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_inst_decod);
486	DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_CONDITION ,_param->_nb_inst_decod);
487	//DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_STACK_WRITE ,_param->_nb_inst_decod);
488	DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_DIRECTION ,_param->_nb_inst_decod);
489	DELETE1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC ,_param->_nb_inst_decod);
490	DELETE1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST ,_param->_nb_inst_decod);
491	//DELETE1_SC_SIGNAL( in_PREDICT_CAN_CONTINUE ,_param->_nb_inst_decod);
492
493	DELETE1_SC_SIGNAL( in_DEPTH_TAIL ,_param->_nb_context);
494	DELETE1_SC_SIGNAL( in_DEPTH_NB_BRANCH ,_param->_nb_context);
495
496	DELETE1_SC_SIGNAL(out_NB_INST_DECOD_ALL ,_param->_nb_context);
497
498	DELETE1_SC_SIGNAL( in_CONTEXT_DECOD_ENABLE ,_param->_nb_context);
499	DELETE1_SC_SIGNAL( in_CONTEXT_DEPTH ,_param->_nb_context);
500
501	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_VAL );
502	DELETE_SC_SIGNAL( in_CONTEXT_EVENT_ACK );
503	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_CONTEXT_ID );
504	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_TYPE );
505	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_IS_DELAY_SLOT );
506	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS );
507	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS_EPCR );
508	}
509	#endif
510
511	delete _Decod_unit;
512	#ifdef STATISTICS
513	delete _parameters_statistics;
514	#endif
515	}

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