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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/test.cpp @ 101

Last change on this file since 101 was 101, checked in by rosiere, 15 years ago
1) Add soc test 2) fix bug (Pc management, Decod and execute, Update prediction ...)
Property svn:keywords set to `Id`
File size: 31.3 KB

Line
1	/*
2	* $Id: test.cpp 101 2009-01-15 17:19:08Z rosiere $
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#define NB_ITERATION 1
10	#define CYCLE_MAX (10240*NB_ITERATION)
11
12	#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/include/test.h"
13	#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/include/Decod_request.h"
14	#include "Common/include/Test.h"
15	#include "Behavioural/include/Allocation.h"
16
17	void test (string name,
18	morpheo::behavioural::core::multi_front_end::front_end::decod_unit::Parameters * _param)
19	{
20	msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
21
22	#ifdef STATISTICS
23	morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX);
24	#endif
25
26	Tusage_t _usage = USE_ALL;
27
28	// _usage = usage_unset(_usage,USE_SYSTEMC );
29	// _usage = usage_unset(_usage,USE_VHDL );
30	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH );
31	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
32	// _usage = usage_unset(_usage,USE_POSITION );
33	// _usage = usage_unset(_usage,USE_STATISTICS );
34	// _usage = usage_unset(_usage,USE_INFORMATION );
35
36	Decod_unit * _Decod_unit = new Decod_unit
37	(name.c_str(),
38	#ifdef STATISTICS
39	_parameters_statistics,
40	#endif
41	_param,
42	_usage);
43
44	#ifdef SYSTEMC
45	if (usage_is_set(_usage,USE_SYSTEMC))
46	{
47	/*********************************************************************
48	* Déclarations des signaux
49	*********************************************************************/
50	string rename;
51
52	sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5);
53	sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
54
55	ALLOC2_SC_SIGNAL( in_IFETCH_VAL ," in_IFETCH_VAL ",Tcontrol_t ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
56	ALLOC2_SC_SIGNAL(out_IFETCH_ACK ,"out_IFETCH_ACK ",Tcontrol_t ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
57	ALLOC2_SC_SIGNAL( in_IFETCH_INSTRUCTION ," in_IFETCH_INSTRUCTION ",Tinstruction_t ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
58
59	ALLOC1_SC_SIGNAL(in_IFETCH_CONTEXT_ID ,"in_IFETCH_CONTEXT_ID ",Tcontext_t ,_param->_nb_context);
60	ALLOC1_SC_SIGNAL(in_IFETCH_ADDRESS ,"in_IFETCH_ADDRESS ",Tgeneral_address_t ,_param->_nb_context);
61	//ALLOC1_SC_SIGNAL(in_IFETCH_ADDRESS_NEXT ,"in_IFETCH_ADDRESS_NEXT ",Tgeneral_address_t ,_param->_nb_context);
62	ALLOC1_SC_SIGNAL(in_IFETCH_INST_IFETCH_PTR ,"in_IFETCH_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t ,_param->_nb_context);
63	ALLOC1_SC_SIGNAL(in_IFETCH_BRANCH_STATE ,"in_IFETCH_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_context);
64	ALLOC1_SC_SIGNAL(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ,"in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ",Tprediction_ptr_t ,_param->_nb_context);
65	ALLOC1_SC_SIGNAL(in_IFETCH_EXCEPTION ,"in_IFETCH_EXCEPTION ",Texception_t ,_param->_nb_context);
66
67	ALLOC1_SC_SIGNAL(out_DECOD_VAL ,"out_DECOD_VAL ",Tcontrol_t ,_param->_nb_inst_decod);
68	ALLOC1_SC_SIGNAL( in_DECOD_ACK ," in_DECOD_ACK ",Tcontrol_t ,_param->_nb_inst_decod);
69	ALLOC1_SC_SIGNAL(out_DECOD_CONTEXT_ID ,"out_DECOD_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod);
70	ALLOC1_SC_SIGNAL(out_DECOD_DEPTH ,"out_DECOD_DEPTH ",Tdepth_t ,_param->_nb_inst_decod);
71	ALLOC1_SC_SIGNAL(out_DECOD_TYPE ,"out_DECOD_TYPE ",Ttype_t ,_param->_nb_inst_decod);
72	ALLOC1_SC_SIGNAL(out_DECOD_OPERATION ,"out_DECOD_OPERATION ",Toperation_t ,_param->_nb_inst_decod);
73	ALLOC1_SC_SIGNAL(out_DECOD_NO_EXECUTE ,"out_DECOD_NO_EXECUTE ",Tcontrol_t ,_param->_nb_inst_decod);
74	ALLOC1_SC_SIGNAL(out_DECOD_IS_DELAY_SLOT ,"out_DECOD_IS_DELAY_SLOT ",Tcontrol_t ,_param->_nb_inst_decod);
75	ALLOC1_SC_SIGNAL(out_DECOD_ADDRESS ,"out_DECOD_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_decod);
76	ALLOC1_SC_SIGNAL(out_DECOD_HAS_IMMEDIAT ,"out_DECOD_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_inst_decod);
77	ALLOC1_SC_SIGNAL(out_DECOD_IMMEDIAT ,"out_DECOD_IMMEDIAT ",Tgeneral_data_t ,_param->_nb_inst_decod);
78	ALLOC1_SC_SIGNAL(out_DECOD_READ_RA ,"out_DECOD_READ_RA ",Tcontrol_t ,_param->_nb_inst_decod);
79	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RA ,"out_DECOD_NUM_REG_RA ",Tgeneral_address_t ,_param->_nb_inst_decod);
80	ALLOC1_SC_SIGNAL(out_DECOD_READ_RB ,"out_DECOD_READ_RB ",Tcontrol_t ,_param->_nb_inst_decod);
81	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RB ,"out_DECOD_NUM_REG_RB ",Tgeneral_address_t ,_param->_nb_inst_decod);
82	ALLOC1_SC_SIGNAL(out_DECOD_READ_RC ,"out_DECOD_READ_RC ",Tcontrol_t ,_param->_nb_inst_decod);
83	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RC ,"out_DECOD_NUM_REG_RC ",Tspecial_address_t ,_param->_nb_inst_decod);
84	ALLOC1_SC_SIGNAL(out_DECOD_WRITE_RD ,"out_DECOD_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_decod);
85	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RD ,"out_DECOD_NUM_REG_RD ",Tgeneral_address_t ,_param->_nb_inst_decod);
86	ALLOC1_SC_SIGNAL(out_DECOD_WRITE_RE ,"out_DECOD_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_decod);
87	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RE ,"out_DECOD_NUM_REG_RE ",Tspecial_address_t ,_param->_nb_inst_decod);
88	ALLOC1_SC_SIGNAL(out_DECOD_EXCEPTION_USE ,"out_DECOD_EXCEPTION_USE ",Texception_t ,_param->_nb_inst_decod);
89	ALLOC1_SC_SIGNAL(out_DECOD_EXCEPTION ,"out_DECOD_EXCEPTION ",Texception_t ,_param->_nb_inst_decod);
90
91	ALLOC1_SC_SIGNAL(out_PREDICT_VAL ,"out_PREDICT_VAL ",Tcontrol_t ,_param->_nb_inst_decod);
92	ALLOC1_SC_SIGNAL( in_PREDICT_ACK ," in_PREDICT_ACK ",Tcontrol_t ,_param->_nb_inst_decod);
93	ALLOC1_SC_SIGNAL(out_PREDICT_CONTEXT_ID ,"out_PREDICT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod);
94	ALLOC1_SC_SIGNAL(out_PREDICT_MATCH_INST_IFETCH_PTR ,"out_PREDICT_MATCH_INST_IFETCH_PTR ",Tcontrol_t ,_param->_nb_inst_decod);
95	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STATE ,"out_PREDICT_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_inst_decod);
96	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"out_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t ,_param->_nb_inst_decod);
97	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_CONDITION ,"out_PREDICT_BRANCH_CONDITION ",Tbranch_condition_t,_param->_nb_inst_decod);
98	//ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STACK_WRITE ,"out_PREDICT_BRANCH_STACK_WRITE ",Tcontrol_t ,_param->_nb_inst_decod);
99	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_DIRECTION ,"out_PREDICT_BRANCH_DIRECTION ",Tcontrol_t ,_param->_nb_inst_decod);
100	ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC ,"out_PREDICT_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_decod);
101	ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST ,"out_PREDICT_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_decod);
102	//ALLOC1_SC_SIGNAL( in_PREDICT_CAN_CONTINUE ," in_PREDICT_CAN_CONTINUE ",Tcontrol_t ,_param->_nb_inst_decod);
103
104	ALLOC1_SC_SIGNAL( in_DEPTH_MIN ," in_DEPTH_MIN ",Tdepth_t ,_param->_nb_context);
105	ALLOC1_SC_SIGNAL( in_DEPTH_MAX ," in_DEPTH_MAX ",Tdepth_t ,_param->_nb_context);
106	ALLOC1_SC_SIGNAL( in_DEPTH_FULL ," in_DEPTH_FULL ",Tcontrol_t ,_param->_nb_context);
107
108	ALLOC1_SC_SIGNAL(out_NB_INST_DECOD_ALL ,"out_NB_INST_DECOD_ALL ",Tcounter_t ,_param->_nb_context);
109
110	ALLOC1_SC_SIGNAL( in_CONTEXT_DECOD_ENABLE ," in_CONTEXT_DECOD_ENABLE ",Tcontrol_t ,_param->_nb_context);
111	ALLOC1_SC_SIGNAL( in_CONTEXT_DEPTH_VAL ," in_CONTEXT_DEPTH_VAL ",Tcontrol_t ,_param->_nb_context);
112	ALLOC1_SC_SIGNAL( in_CONTEXT_DEPTH ," in_CONTEXT_DEPTH ",Tdepth_t ,_param->_nb_context);
113
114	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_VAL ,"out_CONTEXT_EVENT_VAL ",Tcontrol_t );
115	ALLOC_SC_SIGNAL( in_CONTEXT_EVENT_ACK ," in_CONTEXT_EVENT_ACK ",Tcontrol_t );
116	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_CONTEXT_ID ,"out_CONTEXT_EVENT_CONTEXT_ID ",Tcontext_t );
117	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_DEPTH ,"out_CONTEXT_EVENT_DEPTH ",Tdepth_t );
118	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_TYPE ,"out_CONTEXT_EVENT_TYPE ",Tevent_type_t );
119	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_IS_DELAY_SLOT ,"out_CONTEXT_EVENT_IS_DELAY_SLOT ",Tcontrol_t );
120	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS ,"out_CONTEXT_EVENT_ADDRESS ",Tgeneral_data_t );
121	ALLOC_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS_EPCR ,"out_CONTEXT_EVENT_ADDRESS_EPCR ",Tgeneral_data_t );
122
123	/********************************************************
124	* Instanciation
125	********************************************************/
126
127	msg(_("<%s> : Instanciation of _Decod_unit.\n"),name.c_str());
128
129	((_Decod_unit->in_CLOCK)) ((in_CLOCK));
130	((_Decod_unit->in_NRESET)) ((in_NRESET));
131
132	INSTANCE2_SC_SIGNAL(_Decod_unit, in_IFETCH_VAL ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
133	INSTANCE2_SC_SIGNAL(_Decod_unit,out_IFETCH_ACK ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
134	INSTANCE2_SC_SIGNAL(_Decod_unit, in_IFETCH_INSTRUCTION ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
135	if (_param->_have_port_context_id)
136	INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_CONTEXT_ID ,_param->_nb_context);
137	INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_ADDRESS ,_param->_nb_context);
138	//INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_ADDRESS_NEXT ,_param->_nb_context);
139
140	for (uint32_t i=0; i<_param->_nb_context; ++i)
141	{
142	if (_param->_have_port_inst_ifetch_ptr)
143	INSTANCE_SC_SIGNAL(_Decod_unit,in_IFETCH_INST_IFETCH_PTR[i]);
144	if (_param->_have_port_depth)
145	INSTANCE_SC_SIGNAL(_Decod_unit,in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [i]);
146	}
147
148	INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_BRANCH_STATE ,_param->_nb_context);
149	INSTANCE1_SC_SIGNAL(_Decod_unit,in_IFETCH_EXCEPTION ,_param->_nb_context);
150
151	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_VAL ,_param->_nb_inst_decod);
152	INSTANCE1_SC_SIGNAL(_Decod_unit, in_DECOD_ACK ,_param->_nb_inst_decod);
153	if (_param->_have_port_context_id)
154	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_CONTEXT_ID ,_param->_nb_inst_decod);
155	if (_param->_have_port_depth)
156	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_DEPTH ,_param->_nb_inst_decod);
157	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_TYPE ,_param->_nb_inst_decod);
158	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_OPERATION ,_param->_nb_inst_decod);
159	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NO_EXECUTE ,_param->_nb_inst_decod);
160	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_IS_DELAY_SLOT ,_param->_nb_inst_decod);
161	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_ADDRESS ,_param->_nb_inst_decod);
162	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_HAS_IMMEDIAT ,_param->_nb_inst_decod);
163	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_IMMEDIAT ,_param->_nb_inst_decod);
164	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_READ_RA ,_param->_nb_inst_decod);
165	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RA ,_param->_nb_inst_decod);
166	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_READ_RB ,_param->_nb_inst_decod);
167	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RB ,_param->_nb_inst_decod);
168	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_READ_RC ,_param->_nb_inst_decod);
169	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RC ,_param->_nb_inst_decod);
170	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_WRITE_RD ,_param->_nb_inst_decod);
171	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RD ,_param->_nb_inst_decod);
172	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_WRITE_RE ,_param->_nb_inst_decod);
173	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_NUM_REG_RE ,_param->_nb_inst_decod);
174	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_EXCEPTION_USE ,_param->_nb_inst_decod);
175	INSTANCE1_SC_SIGNAL(_Decod_unit,out_DECOD_EXCEPTION ,_param->_nb_inst_decod);
176
177	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_VAL ,_param->_nb_inst_decod);
178	INSTANCE1_SC_SIGNAL(_Decod_unit, in_PREDICT_ACK ,_param->_nb_inst_decod);
179	if (_param->_have_port_context_id)
180	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_CONTEXT_ID ,_param->_nb_inst_decod);
181	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_MATCH_INST_IFETCH_PTR ,_param->_nb_inst_decod);
182	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_STATE ,_param->_nb_inst_decod);
183	if (_param->_have_port_depth)
184	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_inst_decod);
185	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_CONDITION ,_param->_nb_inst_decod);
186	//INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_STACK_WRITE ,_param->_nb_inst_decod);
187	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_BRANCH_DIRECTION ,_param->_nb_inst_decod);
188	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_ADDRESS_SRC ,_param->_nb_inst_decod);
189	INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_ADDRESS_DEST ,_param->_nb_inst_decod);
190	//INSTANCE1_SC_SIGNAL(_Decod_unit, in_PREDICT_CAN_CONTINUE ,_param->_nb_inst_decod);
191
192	if (_param->_have_port_depth)
193	{
194	INSTANCE1_SC_SIGNAL(_Decod_unit, in_DEPTH_MIN ,_param->_nb_context);
195	INSTANCE1_SC_SIGNAL(_Decod_unit, in_DEPTH_MAX ,_param->_nb_context);
196	}
197	INSTANCE1_SC_SIGNAL(_Decod_unit, in_DEPTH_FULL ,_param->_nb_context);
198	INSTANCE1_SC_SIGNAL(_Decod_unit,out_NB_INST_DECOD_ALL ,_param->_nb_context);
199
200	INSTANCE1_SC_SIGNAL(_Decod_unit, in_CONTEXT_DECOD_ENABLE ,_param->_nb_context);
201
202	INSTANCE1_SC_SIGNAL(_Decod_unit, in_CONTEXT_DEPTH_VAL ,_param->_nb_context);
203	if (_param->_have_port_depth)
204	INSTANCE1_SC_SIGNAL(_Decod_unit, in_CONTEXT_DEPTH ,_param->_nb_context);
205
206	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_VAL );
207	INSTANCE_SC_SIGNAL( _Decod_unit, in_CONTEXT_EVENT_ACK );
208	if (_param->_have_port_context_id)
209	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_CONTEXT_ID );
210	if (_param->_have_port_depth)
211	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_DEPTH );
212	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_TYPE );
213	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_IS_DELAY_SLOT );
214	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_ADDRESS );
215	INSTANCE_SC_SIGNAL( _Decod_unit,out_CONTEXT_EVENT_ADDRESS_EPCR );
216
217	msg(_("<%s> : Start Simulation ............\n"),name.c_str());
218
219	Time * _time = new Time();
220
221	/********************************************************
222	* Simulation - Begin
223	********************************************************/
224
225	// Initialisation
226
227	const uint32_t seed = 0;
228	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
229
230	const int32_t percent_transaction_ifetch = 100;
231	const int32_t percent_transaction_decod = 100;
232	const int32_t percent_transaction_predict = 100;
233	const int32_t percent_transaction_event = 100;
234
235	srand(seed);
236
237	SC_START(0);
238	LABEL("Initialisation");
239
240	LABEL("Reset");
241	in_NRESET->write(0);
242	SC_START(5);
243	in_NRESET->write(1);
244
245	for (uint32_t i=0; i<_param->_nb_context; i++)
246	in_CONTEXT_DEPTH_VAL [i]->write(1);
247
248	LABEL("Loop of Test");
249
250	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
251	{
252	LABEL("Iteration %d",iteration);
253
254	Decod_request request [_param->_nb_context];
255	list<entry_t> respons [_param->_nb_context];
256
257	uint32_t nb_request = 0;
258
259	uint32_t delay_slot_previous [_param->_nb_context];
260	uint32_t delay_slot_current [_param->_nb_context];
261	uint32_t delay_slot_next [_param->_nb_context];
262
263	for (uint32_t i=0; i<_param->_nb_context; i++)
264	{
265	nb_request += request[i].size();
266	delay_slot_current [i] = false;
267	delay_slot_next [i] = false;
268
269	in_DEPTH_MIN [i]->write(0);
270	in_DEPTH_MAX [i]->write(0);
271	in_CONTEXT_DEPTH [i]->write(0);
272	}
273
274	while (nb_request > 0)
275	{
276	for (uint32_t i=0; i<_param->_nb_context; i++)
277	{
278	delay_slot_previous [i] = false;
279
280	in_CONTEXT_DECOD_ENABLE [i]->write((rand()%100)<percent_transaction_decod);
281
282	for (uint32_t j=0; j<_param->_nb_inst_fetch[i]; j++)
283	in_IFETCH_VAL [i][j]->write(0);
284
285	if ((rand()%100)<percent_transaction_ifetch)
286	{
287	list<entry_t>::iterator it = request[i].begin();
288
289	if (it!=request [i].end())
290	{
291	uint32_t lsb = it->_address%_param->_nb_inst_fetch[i];
292
293	in_IFETCH_ADDRESS [i]->write(it->_address-lsb);
294	in_IFETCH_BRANCH_STATE [i]->write(BRANCH_STATE_NONE);
295	if (_param->_have_port_inst_ifetch_ptr)
296	in_IFETCH_INST_IFETCH_PTR [i]->write(0);
297
298	// Alignement
299	for (uint32_t j=lsb; j<_param->_nb_inst_fetch[i]; j++)
300	{
301	in_IFETCH_VAL [i][j]->write(1);
302	in_IFETCH_INSTRUCTION [i][j]->write(it->_instruction);
303	// in_IFETCH_ADDRESS_NEXT [i]->write(it->_address_next);
304	if (it->_type == TYPE_BRANCH)
305	in_IFETCH_BRANCH_STATE [i]->write(it->_branch_state);
306	in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [i]->write(it->_branch_update_prediction_id);
307	in_IFETCH_EXCEPTION [i]->write(it->_exception_ifetch);
308
309	if ((it->_is_delay_slot) or
310	((++it)==request [i].end()))
311	break;
312	}
313	}
314	}
315	}
316
317	{
318	bool previous_ack = true;
319
320	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
321	{
322	bool ack = previous_ack and ((rand()%100)<percent_transaction_decod);
323	in_DECOD_ACK [i]->write(ack);
324
325	previous_ack = ack;
326
327	in_PREDICT_ACK [i]->write((rand()%100)<percent_transaction_predict);
328	// in_PREDICT_CAN_CONTINUE [i]->write(0);
329	}
330	}
331
332	in_CONTEXT_EVENT_ACK->write((rand()%100)<percent_transaction_event);
333
334	SC_START(0);
335
336	uint32_t find_event = false;
337	for (uint32_t i=0; i<_param->_nb_context; i++)
338	for (uint32_t j=0; j<_param->_nb_inst_fetch[i]; j++)
339	if (in_IFETCH_VAL[i][j]->read() and out_IFETCH_ACK[i][j]->read())
340	{
341	LABEL("IFETCH [%d][%d] : transaction",i,j);
342
343	entry_t entry = request [i].front();
344	LABEL(" * address 0x%x",entry._address);
345
346	respons [i].push_back(entry);
347	request [i].pop_front();
348
349	if (entry._type == TYPE_BRANCH)
350	{
351	delay_slot_next [i] = true;
352
353	// find good decod
354	uint32_t x;
355
356	for (x=0; x<=_param->_nb_inst_decod; x++)
357	{
358	if (x==_param->_nb_inst_decod)
359	TEST_KO("No find predict transaction");
360
361	Tcontext_t ctxt = (_param->_have_port_context_id)?out_PREDICT_CONTEXT_ID[x]->read():0;
362
363	if ((ctxt == i) and
364	(out_PREDICT_VAL [x]->read() and in_PREDICT_ACK [x]->read()))
365	break;
366	}
367
368	LABEL("PREDICT [%d] : transaction",x );
369
370
371	TEST(Tcontrol_t , out_PREDICT_MATCH_INST_IFETCH_PTR [x]->read(),((entry._address)%_param->_nb_inst_fetch[i]) == 0);
372	TEST(Tbranch_state_t , out_PREDICT_BRANCH_STATE [x]->read(), entry._branch_state );
373	if (_param->_have_port_depth)
374	TEST(Tprediction_ptr_t , out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [x]->read(), entry._branch_update_prediction_id);
375	TEST(Tbranch_condition_t, out_PREDICT_BRANCH_CONDITION [x]->read(), entry._branch_condition );
376	// TEST(Tcontrol_t , out_PREDICT_BRANCH_STACK_WRITE [x]->read(), entry._branch_stack_write );
377	TEST(Tcontrol_t , out_PREDICT_BRANCH_DIRECTION [x]->read(), entry._branch_direction );
378	TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_SRC [x]->read(), entry._address );
379	TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_DEST [x]->read(), entry._branch_address_dest );
380	}
381
382	// TEST(bool, find_event, false); // can continue decod after event
383	if (entry._context_event_type != EVENT_TYPE_NONE)
384	{
385	find_event = true;
386
387	LABEL("CONTEXT_EVENT : transaction");
388
389	if (_param->_have_port_context_id)
390	TEST(Tcontext_t ,out_CONTEXT_EVENT_CONTEXT_ID ->read(), i);
391	if (_param->_have_port_depth)
392	TEST(Tcontext_t ,out_CONTEXT_EVENT_DEPTH ->read(), entry._depth);
393	TEST(Tevent_type_t ,out_CONTEXT_EVENT_TYPE ->read(), entry._context_event_type);
394	TEST(Tcontrol_t ,out_CONTEXT_EVENT_IS_DELAY_SLOT->read(), entry._is_delay_slot);
395	TEST(Tgeneral_data_t,out_CONTEXT_EVENT_ADDRESS ->read(), entry._address );
396	TEST(Tgeneral_data_t,out_CONTEXT_EVENT_ADDRESS_EPCR ->read(), entry._address_next );
397	}
398
399	TEST(bool, delay_slot_previous [i], false); // can't continue
400	delay_slot_previous [i] = delay_slot_current [i];
401	delay_slot_current [i] = delay_slot_next [i];
402	delay_slot_next [i] = false;
403	}
404
405	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
406	if (out_DECOD_VAL[i]->read() and in_DECOD_ACK[i]->read())
407	{
408	Tcontext_t context = (_param->_have_port_context_id)?out_DECOD_CONTEXT_ID[i]->read():0;
409
410	LABEL("DECOD [%d] : transaction",i );
411
412	TEST(bool ,respons [context].empty(), false);
413
414	LABEL(" * context : %d",context);
415	LABEL(" * instruction : 0x%x",respons [context].front()._instruction);
416
417	if (_param->_have_port_depth)
418	TEST(Tdepth_t , out_DECOD_DEPTH [i]->read(), respons [context].front()._depth );
419	TEST(Ttype_t , out_DECOD_TYPE [i]->read(), respons [context].front()._type );
420	TEST(Toperation_t , out_DECOD_OPERATION [i]->read(), respons [context].front()._operation );
421	// TEST(Tcontrol_t , out_DECOD_NO_EXECUTE [i]->read(), respons [context].front()._no_execute );
422	TEST(Tcontrol_t , out_DECOD_IS_DELAY_SLOT [i]->read(), respons [context].front()._is_delay_slot);
423	TEST(Tgeneral_data_t , out_DECOD_ADDRESS [i]->read(), respons [context].front()._address );
424	TEST(Tcontrol_t , out_DECOD_HAS_IMMEDIAT [i]->read(), respons [context].front()._has_immediat );
425	if (respons [context].front()._has_immediat)
426	TEST(Tgeneral_data_t , out_DECOD_IMMEDIAT [i]->read(), respons [context].front()._immediat );
427	TEST(Tcontrol_t , out_DECOD_READ_RA [i]->read(), respons [context].front()._read_ra );
428	if (respons [context].front()._read_ra)
429	TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RA [i]->read(), respons [context].front()._num_reg_ra );
430	TEST(Tcontrol_t , out_DECOD_READ_RB [i]->read(), respons [context].front()._read_rb );
431	if (respons [context].front()._read_rb)
432	TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RB [i]->read(), respons [context].front()._num_reg_rb );
433	TEST(Tcontrol_t , out_DECOD_READ_RC [i]->read(), respons [context].front()._read_rc );
434	if (respons [context].front()._read_rc)
435	TEST(Tspecial_address_t, out_DECOD_NUM_REG_RC [i]->read(), respons [context].front()._num_reg_rc );
436	TEST(Tcontrol_t , out_DECOD_WRITE_RD [i]->read(), respons [context].front()._write_rd );
437	if (respons [context].front()._write_rd)
438	TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RD [i]->read(), respons [context].front()._num_reg_rd );
439	TEST(Tcontrol_t , out_DECOD_WRITE_RE [i]->read(), respons [context].front()._write_re );
440	if (respons [context].front()._write_re)
441	TEST(Tspecial_address_t, out_DECOD_NUM_REG_RE [i]->read(), respons [context].front()._num_reg_re );
442	TEST(Texception_t , out_DECOD_EXCEPTION_USE [i]->read(), respons [context].front()._exception_use);
443	// TEST(Texception_t , out_DECOD_EXCEPTION [i]->read(), respons [context].front()._exception );
444
445	respons [context].pop_front();
446	nb_request --;
447	}
448
449	TEST(bool, (out_CONTEXT_EVENT_VAL->read() and in_CONTEXT_EVENT_ACK->read()), find_event);
450
451	SC_START(1);
452	}
453
454	for (uint32_t i=0; i<_param->_nb_context; i++)
455	{
456	TEST(Tcounter_t,out_NB_INST_DECOD_ALL [i]->read(), respons[i].size());
457
458	}
459	}
460
461	/********************************************************
462	* Simulation - End
463	********************************************************/
464
465	TEST_OK ("End of Simulation");
466	delete _time;
467
468	msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
469
470	delete in_CLOCK;
471	delete in_NRESET;
472
473	DELETE2_SC_SIGNAL( in_IFETCH_VAL ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
474	DELETE2_SC_SIGNAL(out_IFETCH_ACK ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
475	DELETE2_SC_SIGNAL( in_IFETCH_INSTRUCTION ,_param->_nb_context, _param->_nb_inst_fetch[it1]);
476	DELETE1_SC_SIGNAL(in_IFETCH_CONTEXT_ID ,_param->_nb_context);
477	DELETE1_SC_SIGNAL(in_IFETCH_ADDRESS ,_param->_nb_context);
478	//DELETE1_SC_SIGNAL(in_IFETCH_ADDRESS_NEXT ,_param->_nb_context);
479	DELETE1_SC_SIGNAL(in_IFETCH_INST_IFETCH_PTR ,_param->_nb_context);
480	DELETE1_SC_SIGNAL(in_IFETCH_BRANCH_STATE ,_param->_nb_context);
481	DELETE1_SC_SIGNAL(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ,_param->_nb_context);
482	DELETE1_SC_SIGNAL(in_IFETCH_EXCEPTION ,_param->_nb_context);
483
484	DELETE1_SC_SIGNAL(out_DECOD_VAL ,_param->_nb_inst_decod);
485	DELETE1_SC_SIGNAL( in_DECOD_ACK ,_param->_nb_inst_decod);
486	DELETE1_SC_SIGNAL(out_DECOD_CONTEXT_ID ,_param->_nb_inst_decod);
487	DELETE1_SC_SIGNAL(out_DECOD_DEPTH ,_param->_nb_inst_decod);
488	DELETE1_SC_SIGNAL(out_DECOD_TYPE ,_param->_nb_inst_decod);
489	DELETE1_SC_SIGNAL(out_DECOD_OPERATION ,_param->_nb_inst_decod);
490	DELETE1_SC_SIGNAL(out_DECOD_NO_EXECUTE ,_param->_nb_inst_decod);
491	DELETE1_SC_SIGNAL(out_DECOD_IS_DELAY_SLOT ,_param->_nb_inst_decod);
492	DELETE1_SC_SIGNAL(out_DECOD_ADDRESS ,_param->_nb_inst_decod);
493	DELETE1_SC_SIGNAL(out_DECOD_HAS_IMMEDIAT ,_param->_nb_inst_decod);
494	DELETE1_SC_SIGNAL(out_DECOD_IMMEDIAT ,_param->_nb_inst_decod);
495	DELETE1_SC_SIGNAL(out_DECOD_READ_RA ,_param->_nb_inst_decod);
496	DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RA ,_param->_nb_inst_decod);
497	DELETE1_SC_SIGNAL(out_DECOD_READ_RB ,_param->_nb_inst_decod);
498	DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RB ,_param->_nb_inst_decod);
499	DELETE1_SC_SIGNAL(out_DECOD_READ_RC ,_param->_nb_inst_decod);
500	DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RC ,_param->_nb_inst_decod);
501	DELETE1_SC_SIGNAL(out_DECOD_WRITE_RD ,_param->_nb_inst_decod);
502	DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RD ,_param->_nb_inst_decod);
503	DELETE1_SC_SIGNAL(out_DECOD_WRITE_RE ,_param->_nb_inst_decod);
504	DELETE1_SC_SIGNAL(out_DECOD_NUM_REG_RE ,_param->_nb_inst_decod);
505	DELETE1_SC_SIGNAL(out_DECOD_EXCEPTION_USE ,_param->_nb_inst_decod);
506	DELETE1_SC_SIGNAL(out_DECOD_EXCEPTION ,_param->_nb_inst_decod);
507
508	DELETE1_SC_SIGNAL(out_PREDICT_VAL ,_param->_nb_inst_decod);
509	DELETE1_SC_SIGNAL( in_PREDICT_ACK ,_param->_nb_inst_decod);
510	DELETE1_SC_SIGNAL(out_PREDICT_CONTEXT_ID ,_param->_nb_inst_decod);
511	DELETE1_SC_SIGNAL(out_PREDICT_MATCH_INST_IFETCH_PTR ,_param->_nb_inst_decod);
512	DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_STATE ,_param->_nb_inst_decod);
513	DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_inst_decod);
514	DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_CONDITION ,_param->_nb_inst_decod);
515	//DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_STACK_WRITE ,_param->_nb_inst_decod);
516	DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_DIRECTION ,_param->_nb_inst_decod);
517	DELETE1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC ,_param->_nb_inst_decod);
518	DELETE1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST ,_param->_nb_inst_decod);
519	//DELETE1_SC_SIGNAL( in_PREDICT_CAN_CONTINUE ,_param->_nb_inst_decod);
520
521	DELETE1_SC_SIGNAL( in_DEPTH_MIN ,_param->_nb_context);
522	DELETE1_SC_SIGNAL( in_DEPTH_MAX ,_param->_nb_context);
523	DELETE1_SC_SIGNAL( in_DEPTH_FULL ,_param->_nb_context);
524
525	DELETE1_SC_SIGNAL(out_NB_INST_DECOD_ALL ,_param->_nb_context);
526
527	DELETE1_SC_SIGNAL( in_CONTEXT_DECOD_ENABLE ,_param->_nb_context);
528	DELETE1_SC_SIGNAL( in_CONTEXT_DEPTH_VAL ,_param->_nb_context);
529	DELETE1_SC_SIGNAL( in_CONTEXT_DEPTH ,_param->_nb_context);
530
531	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_VAL );
532	DELETE_SC_SIGNAL( in_CONTEXT_EVENT_ACK );
533	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_CONTEXT_ID );
534	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_DEPTH );
535	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_TYPE );
536	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_IS_DELAY_SLOT );
537	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS );
538	DELETE_SC_SIGNAL( out_CONTEXT_EVENT_ADDRESS_EPCR );
539	}
540	#endif
541
542	delete _Decod_unit;
543	#ifdef STATISTICS
544	delete _parameters_statistics;
545	#endif
546	}

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